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authorJohn Crispin <john@openwrt.org>2014-04-12 21:21:53 +0000
committerJohn Crispin <john@openwrt.org>2014-04-12 21:21:53 +0000
commit73160c1ad61927a5a91381dab82458911f363a2a (patch)
tree21f59b09498a4aabd2643b26c7ef2986336b215f
parent76133009c90284c6c0eab59207f01980a3222213 (diff)
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Add wmac clock for rt2880
Signed-off-by: Roman Yeryomin <roman@advem.lv> SVN-Revision: 40491
-rw-r--r--target/linux/ramips/patches-3.10/0218-rt2880-add-wmac-clock.patch21
1 files changed, 21 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.10/0218-rt2880-add-wmac-clock.patch b/target/linux/ramips/patches-3.10/0218-rt2880-add-wmac-clock.patch
new file mode 100644
index 0000000..20b186b
--- /dev/null
+++ b/target/linux/ramips/patches-3.10/0218-rt2880-add-wmac-clock.patch
@@ -0,0 +1,21 @@
+Index: linux-3.10.34/arch/mips/ralink/rt288x.c
+===================================================================
+--- linux-3.10.34.orig/arch/mips/ralink/rt288x.c
++++ linux-3.10.34/arch/mips/ralink/rt288x.c
+@@ -52,7 +52,7 @@ static void rt288x_wdt_reset(void)
+
+ void __init ralink_clk_init(void)
+ {
+- unsigned long cpu_rate;
++ unsigned long cpu_rate, wmac_rate = 40000000;
+ u32 t = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG);
+ t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
+
+@@ -78,6 +78,7 @@ void __init ralink_clk_init(void)
+ ralink_clk_add("300500.uart", cpu_rate / 2);
+ ralink_clk_add("300c00.uartlite", cpu_rate / 2);
+ ralink_clk_add("400000.ethernet", cpu_rate / 2);
++ ralink_clk_add("480000.wmac", wmac_rate);
+ }
+
+ void __init ralink_of_remap(void)