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authorPiotr Dymacz <pepe2k@gmail.com>2017-03-12 23:50:36 +0100
committerPiotr Dymacz <pepe2k@gmail.com>2017-04-02 15:09:09 +0200
commit1bdd23231b9de6f98b5c51360167abc7b5e92716 (patch)
tree8f33aff51c6299e91bb0c5814f66acee09087665
parent0cb669b46976a83b94bba26b4a54424e513dafc4 (diff)
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ar71xx: fix Wallys DR344 ethernet MAC addresses offsets
Without this fix, ethernet interfaces on Wallys DR344 use random MAC addresses. Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c
index e2155e3..c24e5aa 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c
@@ -134,6 +134,7 @@ static struct mdio_board_info dr344_mdio0_info[] = {
static void __init dr344_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f03f810);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dr344_leds_gpio),
@@ -158,8 +159,8 @@ static void __init dr344_setup(void)
ath79_register_mdio(1, 0x0);
ath79_register_mdio(0, 0x0);
- ath79_init_mac(ath79_eth0_data.mac_addr, art + DR344_MAC0_OFFSET, 0);
- ath79_init_mac(ath79_eth1_data.mac_addr, art + DR344_MAC1_OFFSET, 0);
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac + DR344_MAC0_OFFSET, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac + DR344_MAC1_OFFSET, 0);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_SW_ONLY_MODE);