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authorJohn Crispin <john@openwrt.org>2014-11-14 16:52:47 +0000
committerJohn Crispin <john@openwrt.org>2014-11-14 16:52:47 +0000
commitbf8bb5b611e382a897ee8b7d5d02e3bbd47446e1 (patch)
tree116cf959dd093f3a95338f5f3a3b7339ba1e7f47
parent194ca6127ee18cd3a95da4d03f02e43b5428c0bb (diff)
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ralink: fix the 10mbit bug on mt7621
a missing "val =" caused the AN bit in the phy0 reg to be flushed. Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 43246
-rw-r--r--target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c
index 58c2098..df85929 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c
@@ -596,7 +596,7 @@ static void gsw_hw_init_mt7621(struct mt7620_gsw *gsw, struct device_node *np)
/* turn off all PHYs */
for (i = 0; i <= 4; i++) {
- _mt7620_mii_read(gsw, i, 0x0);
+ val = _mt7620_mii_read(gsw, i, 0x0);
val |= (0x1 << 11);
_mt7620_mii_write(gsw, i, 0x0, val);
}