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| author | Yutang Jiang <yutang.jiang@nxp.com> | 2016-12-01 23:01:27 +0800 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2016-12-12 09:57:40 +0100 |
| commit | d5fc7430ca293213dd4f1de7f52446c17d4def6a (patch) | |
| tree | 4d884312e45871f219a0f1993c80299cc1cc61a6 /package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch | |
| parent | b0ac825884e7bfe3f68385109df3234e37022c71 (diff) | |
| download | mtk-20170518-d5fc7430ca293213dd4f1de7f52446c17d4def6a.zip mtk-20170518-d5fc7430ca293213dd4f1de7f52446c17d4def6a.tar.gz mtk-20170518-d5fc7430ca293213dd4f1de7f52446c17d4def6a.tar.bz2 | |
layerscape: uboot-layerscape: prefer github over git.freescale.com
In order to prevent the impact of the merger of the company and the potential
rebase of the SDK repositories, migrate the u-boot source to github.
Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
Diffstat (limited to 'package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch')
| -rw-r--r-- | package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch | 69 |
1 files changed, 0 insertions, 69 deletions
diff --git a/package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch b/package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch deleted file mode 100644 index 17542dd..0000000 --- a/package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 63acb257c32bd86abbad5abcc002d6c78b72f0ab Mon Sep 17 00:00:00 2001 -From: Anji J <anji.jagarlmudi@freescale.com> -Date: Mon, 16 May 2016 20:21:38 +0530 -Subject: [PATCH 42/93] DNCPE-138 Rest external PHYs - -Need to reset external PHYs through IO expander for proper function. - -Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>> -Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> ---- - board/freescale/ls1012ardb/eth.c | 14 ++++++++++++++ - include/configs/ls1012ardb.h | 9 +++++++++ - 2 files changed, 23 insertions(+) - -diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c -index 29830e8..24fdd83 100644 ---- a/board/freescale/ls1012ardb/eth.c -+++ b/board/freescale/ls1012ardb/eth.c -@@ -20,6 +20,20 @@ - - #define DEFAULT_PFE_MDIO_NAME "PFE_MDIO" - -+ -+void reset_phy(void) -+{ -+ -+ /*Through reset IO expander reset both RGMII and SGMII PHYs */ -+ i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 6, __PHY_MASK); -+ i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 2, __PHY_ETH2_MASK); -+ mdelay(10); -+ i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 2, __PHY_ETH1_MASK); -+ mdelay(10); -+ i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 2, 0xFF); -+ mdelay(50); -+} -+ - int board_eth_init(bd_t *bis) - { - #ifdef CONFIG_FSL_PPFE -diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h -index 1b72bf1..23722e0 100644 ---- a/include/configs/ls1012ardb.h -+++ b/include/configs/ls1012ardb.h -@@ -24,6 +24,7 @@ - #define EMAC2_PHY_ADDR 0x1 - #define CONFIG_PHYLIB - #define CONFIG_PHY_REALTEK -+#define CONFIG_RESET_PHY_R - #endif - - /* -@@ -128,6 +129,14 @@ - #define __SW_REV_A 0xF8 - #define __SW_REV_B 0xF0 - -+/* -+ *I2C RESET expander -+ */ -+#define CONFIG_SYS_I2C_RESET_IO_EXPANDER 0x25 -+#define __PHY_MASK 0xF9 -+#define __PHY_ETH2_MASK 0xFB -+#define __PHY_ETH1_MASK 0xFD -+ - #define CONFIG_CMD_MEMINFO - #define CONFIG_CMD_MEMTEST - #define CONFIG_SYS_MEMTEST_START 0x80000000 --- -1.7.9.5 - |