ath9k: merge ar9580/ar955x initval updates

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 43029

2 files changed, 199 insertions, 0 deletions

diff --git a/package/kernel/mac80211/patches/338-ath9k-Update-AR9580-initvals.patch b/package/kernel/mac80211/patches/338-ath9k-Update-AR9580-initvals.patch
new file mode 100644
index 0000000..af69b06
--- /dev/null
+++ b/package/kernel/mac80211/patches/338-ath9k-Update-AR9580-initvals.patch
@@ -0,0 +1,162 @@
+From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Wed, 22 Oct 2014 12:21:44 +0530
+Subject: [PATCH] ath9k: Update AR9580 initvals
+
+This fixes RX sensitivity issues with AR9580.
+
+Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+---
+
+--- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
+@@ -24,7 +24,149 @@
+ 
+ #define ar9580_1p0_soc_postamble ar9300_2p2_soc_postamble
+ 
+-#define ar9580_1p0_radio_core ar9300_2p2_radio_core
++static const u32 ar9580_1p0_radio_core[][2] = {
++	/* Addr      allmodes  */
++	{0x00016000, 0x36db2db6},
++	{0x00016004, 0x6db6db40},
++	{0x00016008, 0x73f00000},
++	{0x0001600c, 0x00000000},
++	{0x00016040, 0x7f80fff8},
++	{0x0001604c, 0x76d005b5},
++	{0x00016050, 0x556cf031},
++	{0x00016054, 0x13449440},
++	{0x00016058, 0x0c51c92c},
++	{0x0001605c, 0x3db7fffc},
++	{0x00016060, 0xfffffffc},
++	{0x00016064, 0x000f0278},
++	{0x0001606c, 0x6db60000},
++	{0x00016080, 0x00000000},
++	{0x00016084, 0x0e48048c},
++	{0x00016088, 0x54214514},
++	{0x0001608c, 0x119f481e},
++	{0x00016090, 0x24926490},
++	{0x00016098, 0xd2888888},
++	{0x000160a0, 0x0a108ffe},
++	{0x000160a4, 0x812fc370},
++	{0x000160a8, 0x423c8000},
++	{0x000160b4, 0x92480080},
++	{0x000160c0, 0x00adb6d0},
++	{0x000160c4, 0x6db6db60},
++	{0x000160c8, 0x6db6db6c},
++	{0x000160cc, 0x01e6c000},
++	{0x00016100, 0x3fffbe01},
++	{0x00016104, 0xfff80000},
++	{0x00016108, 0x00080010},
++	{0x00016144, 0x02084080},
++	{0x00016148, 0x00000000},
++	{0x00016280, 0x058a0001},
++	{0x00016284, 0x3d840208},
++	{0x00016288, 0x05a20408},
++	{0x0001628c, 0x00038c07},
++	{0x00016290, 0x00000004},
++	{0x00016294, 0x458a214f},
++	{0x00016380, 0x00000000},
++	{0x00016384, 0x00000000},
++	{0x00016388, 0x00800700},
++	{0x0001638c, 0x00800700},
++	{0x00016390, 0x00800700},
++	{0x00016394, 0x00000000},
++	{0x00016398, 0x00000000},
++	{0x0001639c, 0x00000000},
++	{0x000163a0, 0x00000001},
++	{0x000163a4, 0x00000001},
++	{0x000163a8, 0x00000000},
++	{0x000163ac, 0x00000000},
++	{0x000163b0, 0x00000000},
++	{0x000163b4, 0x00000000},
++	{0x000163b8, 0x00000000},
++	{0x000163bc, 0x00000000},
++	{0x000163c0, 0x000000a0},
++	{0x000163c4, 0x000c0000},
++	{0x000163c8, 0x14021402},
++	{0x000163cc, 0x00001402},
++	{0x000163d0, 0x00000000},
++	{0x000163d4, 0x00000000},
++	{0x00016400, 0x36db2db6},
++	{0x00016404, 0x6db6db40},
++	{0x00016408, 0x73f00000},
++	{0x0001640c, 0x00000000},
++	{0x00016440, 0x7f80fff8},
++	{0x0001644c, 0x76d005b5},
++	{0x00016450, 0x556cf031},
++	{0x00016454, 0x13449440},
++	{0x00016458, 0x0c51c92c},
++	{0x0001645c, 0x3db7fffc},
++	{0x00016460, 0xfffffffc},
++	{0x00016464, 0x000f0278},
++	{0x0001646c, 0x6db60000},
++	{0x00016500, 0x3fffbe01},
++	{0x00016504, 0xfff80000},
++	{0x00016508, 0x00080010},
++	{0x00016544, 0x02084080},
++	{0x00016548, 0x00000000},
++	{0x00016780, 0x00000000},
++	{0x00016784, 0x00000000},
++	{0x00016788, 0x00800700},
++	{0x0001678c, 0x00800700},
++	{0x00016790, 0x00800700},
++	{0x00016794, 0x00000000},
++	{0x00016798, 0x00000000},
++	{0x0001679c, 0x00000000},
++	{0x000167a0, 0x00000001},
++	{0x000167a4, 0x00000001},
++	{0x000167a8, 0x00000000},
++	{0x000167ac, 0x00000000},
++	{0x000167b0, 0x00000000},
++	{0x000167b4, 0x00000000},
++	{0x000167b8, 0x00000000},
++	{0x000167bc, 0x00000000},
++	{0x000167c0, 0x000000a0},
++	{0x000167c4, 0x000c0000},
++	{0x000167c8, 0x14021402},
++	{0x000167cc, 0x00001402},
++	{0x000167d0, 0x00000000},
++	{0x000167d4, 0x00000000},
++	{0x00016800, 0x36db2db6},
++	{0x00016804, 0x6db6db40},
++	{0x00016808, 0x73f00000},
++	{0x0001680c, 0x00000000},
++	{0x00016840, 0x7f80fff8},
++	{0x0001684c, 0x76d005b5},
++	{0x00016850, 0x556cf031},
++	{0x00016854, 0x13449440},
++	{0x00016858, 0x0c51c92c},
++	{0x0001685c, 0x3db7fffc},
++	{0x00016860, 0xfffffffc},
++	{0x00016864, 0x000f0278},
++	{0x0001686c, 0x6db60000},
++	{0x00016900, 0x3fffbe01},
++	{0x00016904, 0xfff80000},
++	{0x00016908, 0x00080010},
++	{0x00016944, 0x02084080},
++	{0x00016948, 0x00000000},
++	{0x00016b80, 0x00000000},
++	{0x00016b84, 0x00000000},
++	{0x00016b88, 0x00800700},
++	{0x00016b8c, 0x00800700},
++	{0x00016b90, 0x00800700},
++	{0x00016b94, 0x00000000},
++	{0x00016b98, 0x00000000},
++	{0x00016b9c, 0x00000000},
++	{0x00016ba0, 0x00000001},
++	{0x00016ba4, 0x00000001},
++	{0x00016ba8, 0x00000000},
++	{0x00016bac, 0x00000000},
++	{0x00016bb0, 0x00000000},
++	{0x00016bb4, 0x00000000},
++	{0x00016bb8, 0x00000000},
++	{0x00016bbc, 0x00000000},
++	{0x00016bc0, 0x000000a0},
++	{0x00016bc4, 0x000c0000},
++	{0x00016bc8, 0x14021402},
++	{0x00016bcc, 0x00001402},
++	{0x00016bd0, 0x00000000},
++	{0x00016bd4, 0x00000000},
++};
+ 
+ #define ar9580_1p0_mac_postamble ar9300_2p2_mac_postamble
+ 
diff --git a/package/kernel/mac80211/patches/339-ath9k-Update-AR955x-initvals.patch b/package/kernel/mac80211/patches/339-ath9k-Update-AR955x-initvals.patch
new file mode 100644
index 0000000..04dca91
--- /dev/null
+++ b/package/kernel/mac80211/patches/339-ath9k-Update-AR955x-initvals.patch
@@ -0,0 +1,37 @@
+From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Wed, 22 Oct 2014 12:21:45 +0530
+Subject: [PATCH] ath9k: Update AR955x initvals
+
+* Fix a 11b/EVM issue by adjusting
+  FIR filter coefficients.
+
+* Fix a problem with receiving probe request
+  frames sent at 11b rate.
+
+Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+---
+
+--- a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
+@@ -507,7 +507,7 @@ static const u32 ar955x_1p0_baseband_cor
+ 	{0x00009d04, 0x40206c10},
+ 	{0x00009d08, 0x009c4060},
+ 	{0x00009d0c, 0x9883800a},
+-	{0x00009d10, 0x01834061},
++	{0x00009d10, 0x01884061},
+ 	{0x00009d14, 0x00c0040b},
+ 	{0x00009d18, 0x00000000},
+ 	{0x00009e08, 0x0038230c},
+@@ -545,9 +545,9 @@ static const u32 ar955x_1p0_baseband_cor
+ 	{0x0000a370, 0x00000000},
+ 	{0x0000a390, 0x00000001},
+ 	{0x0000a394, 0x00000444},
+-	{0x0000a398, 0x1f020503},
+-	{0x0000a39c, 0x29180c03},
+-	{0x0000a3a0, 0x9a8b6844},
++	{0x0000a398, 0x001f0e0f},
++	{0x0000a39c, 0x0075393f},
++	{0x0000a3a0, 0xb79f6427},
+ 	{0x0000a3a4, 0x00000000},
+ 	{0x0000a3a8, 0xaaaaaaaa},
+ 	{0x0000a3ac, 0x3c466478},