diff options
| author | Felix Fietkau <nbd@openwrt.org> | 2012-07-11 16:45:58 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2012-07-11 16:45:58 +0000 |
| commit | d23e0491f025a7140202eaeef9e8f6936fb90fa4 (patch) | |
| tree | eaecd49a85edb7ffad9933ce90a2eeb427834dbe /package/mac80211/patches/571-ath9k_xpa_timing_control.patch | |
| parent | 883e3080165380a65f58842a0e7f833040d3f033 (diff) | |
| download | mtk-20170518-d23e0491f025a7140202eaeef9e8f6936fb90fa4.zip mtk-20170518-d23e0491f025a7140202eaeef9e8f6936fb90fa4.tar.gz mtk-20170518-d23e0491f025a7140202eaeef9e8f6936fb90fa4.tar.bz2 | |
ath9k: add a number of ar93xx eeprom related fixes / enhancements
SVN-Revision: 32669
Diffstat (limited to 'package/mac80211/patches/571-ath9k_xpa_timing_control.patch')
| -rw-r--r-- | package/mac80211/patches/571-ath9k_xpa_timing_control.patch | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/package/mac80211/patches/571-ath9k_xpa_timing_control.patch b/package/mac80211/patches/571-ath9k_xpa_timing_control.patch new file mode 100644 index 0000000..3efaeaf --- /dev/null +++ b/package/mac80211/patches/571-ath9k_xpa_timing_control.patch @@ -0,0 +1,35 @@ +--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c ++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +@@ -3962,9 +3962,32 @@ static void ar9003_hw_txend_to_xpa_off_a + AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value); + } + ++static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is_2ghz) ++{ ++ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; ++ u8 xpa_ctl; ++ ++ if (!(eep->baseEepHeader.featureEnable & 0x80)) ++ return; ++ ++ if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah)) ++ return; ++ ++ if (is_2ghz) { ++ xpa_ctl = eep->modalHeader2G.txFrameToXpaOn; ++ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL, ++ AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl); ++ } else { ++ xpa_ctl = eep->modalHeader5G.txFrameToXpaOn; ++ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL, ++ AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl); ++ } ++} ++ + static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah, + struct ath9k_channel *chan) + { ++ ar9003_hw_xpa_timing_control_apply(ah, IS_CHAN_2GHZ(chan)); + ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan)); + ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan)); + ar9003_hw_drive_strength_apply(ah); |