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authorFelix Fietkau <nbd@openwrt.org>2012-07-16 23:50:54 +0000
committerFelix Fietkau <nbd@openwrt.org>2012-07-16 23:50:54 +0000
commitcf9bca8dedb00b41c42a994ae08b91c37d11895c (patch)
tree70272e7b9e0d26608ba3e5805ab01855a9717ac7 /package/mac80211/patches/571-ath9k_xpa_timing_control.patch
parent84585b45d6ab5a71a805e45df889b01217950484 (diff)
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mac80211: update to latest wireless-testing + some monitor mode fixes and some libertas driver fixes
SVN-Revision: 32760
Diffstat (limited to 'package/mac80211/patches/571-ath9k_xpa_timing_control.patch')
-rw-r--r--package/mac80211/patches/571-ath9k_xpa_timing_control.patch35
1 files changed, 0 insertions, 35 deletions
diff --git a/package/mac80211/patches/571-ath9k_xpa_timing_control.patch b/package/mac80211/patches/571-ath9k_xpa_timing_control.patch
deleted file mode 100644
index 3efaeaf..0000000
--- a/package/mac80211/patches/571-ath9k_xpa_timing_control.patch
+++ /dev/null
@@ -1,35 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -3962,9 +3962,32 @@ static void ar9003_hw_txend_to_xpa_off_a
- AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
- }
-
-+static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is_2ghz)
-+{
-+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-+ u8 xpa_ctl;
-+
-+ if (!(eep->baseEepHeader.featureEnable & 0x80))
-+ return;
-+
-+ if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
-+ return;
-+
-+ if (is_2ghz) {
-+ xpa_ctl = eep->modalHeader2G.txFrameToXpaOn;
-+ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
-+ AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
-+ } else {
-+ xpa_ctl = eep->modalHeader5G.txFrameToXpaOn;
-+ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
-+ AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
-+ }
-+}
-+
- static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
- struct ath9k_channel *chan)
- {
-+ ar9003_hw_xpa_timing_control_apply(ah, IS_CHAN_2GHZ(chan));
- ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
- ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
- ar9003_hw_drive_strength_apply(ah);