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author | Gabor Juhos <juhosg@openwrt.org> | 2009-06-21 14:38:15 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2009-06-21 14:38:15 +0000 |
commit | 77bb9494c2b517576d3f9fac636c20c28cfb76ed (patch) | |
tree | bd50b03e391ddd23aa73e595772976c9aca4675d /package/mac80211/patches | |
parent | 6e42b25c88119d50df668e12f0e62579c622d0ca (diff) | |
download | mtk-20170518-77bb9494c2b517576d3f9fac636c20c28cfb76ed.zip mtk-20170518-77bb9494c2b517576d3f9fac636c20c28cfb76ed.tar.gz mtk-20170518-77bb9494c2b517576d3f9fac636c20c28cfb76ed.tar.bz2 |
mac80211/ath5k: add workaround for the AR71xx PCI bug
SVN-Revision: 16535
Diffstat (limited to 'package/mac80211/patches')
-rw-r--r-- | package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch new file mode 100644 index 0000000..ca04786 --- /dev/null +++ b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch @@ -0,0 +1,32 @@ +--- a/drivers/net/wireless/ath/ath5k/reset.c ++++ b/drivers/net/wireless/ath/ath5k/reset.c +@@ -1297,8 +1297,14 @@ int ath5k_hw_reset(struct ath5k_hw *ah, + if (ah->ah_version != AR5K_AR5210) { + AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG, + AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B); ++#ifndef CONFIG_ATHEROS_AR71XX + AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG, + AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_128B); ++#else ++ /* WAR for AR71xx PCI bug */ ++ AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG, ++ AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B); ++#endif + } + + /* Pre-enable interrupts on 5211/5212*/ +--- a/drivers/net/wireless/ath/ath5k/initvals.c ++++ b/drivers/net/wireless/ath/ath5k/initvals.c +@@ -59,7 +59,12 @@ static const struct ath5k_ini ar5210_ini + { AR5K_IER, AR5K_IER_DISABLE }, + { AR5K_BSR, 0, AR5K_INI_READ }, + { AR5K_TXCFG, AR5K_DMASIZE_128B }, ++#ifndef CONFIG_ATHEROS_AR71XX + { AR5K_RXCFG, AR5K_DMASIZE_128B }, ++#else ++ /* WAR for AR71xx PCI bug */ ++ { AR5K_RXCFG, AR5K_DMASIZE_4B }, ++#endif + { AR5K_CFG, AR5K_INIT_CFG }, + { AR5K_TOPS, 8 }, + { AR5K_RXNOFRM, 8 }, |