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| author | Felix Fietkau <nbd@openwrt.org> | 2016-03-07 11:03:41 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2016-03-07 11:03:41 +0000 |
| commit | fa5688c4320bd60b19d6fb08fb644faab3c8780e (patch) | |
| tree | e86d7f96faf61c90ba7a7561d103e6435385d0f0 /package/network | |
| parent | 0d40211fad0b58f9de6616ea6cc1371cbcc8ff53 (diff) | |
| download | mtk-20170518-fa5688c4320bd60b19d6fb08fb644faab3c8780e.zip mtk-20170518-fa5688c4320bd60b19d6fb08fb644faab3c8780e.tar.gz mtk-20170518-fa5688c4320bd60b19d6fb08fb644faab3c8780e.tar.bz2 | |
ltq-vdsl-app: do not set the reserved bit 4 in the xTSE 8
I do not know if this causes any problems now, but we should not set
it, because it is reserved. Some more recent versions of the Lantiq DSL
API driver and Control is checking if only valid bits are set.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 48948
Diffstat (limited to 'package/network')
| -rw-r--r-- | package/network/config/ltq-vdsl-app/files/dsl_control | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/package/network/config/ltq-vdsl-app/files/dsl_control b/package/network/config/ltq-vdsl-app/files/dsl_control index 6d254da..5ca1b12 100644 --- a/package/network/config/ltq-vdsl-app/files/dsl_control +++ b/package/network/config/ltq-vdsl-app/files/dsl_control @@ -21,14 +21,14 @@ EXTRA_HELP=" status Get DSL status information # G.992.5 Annex A / M # G.993.2 Annex A/B/C # G.993.5 Annex A/B/C -xtse_xdsl_a="05_01_04_00_4C_01_04_0F" +xtse_xdsl_a="05_01_04_00_4C_01_04_07" # G.992.1 Annex B # G.992.3 Annex B # G.992.5 Annex B # G.993.2 Annex A/B/C # G.993.5 Annex A/B/C -xtse_xdsl_b="10_00_10_00_00_04_00_0F" +xtse_xdsl_b="10_00_10_00_00_04_00_07" # G.992.1 Annex B # G.992.3 Annex B @@ -37,7 +37,7 @@ xtse_xdsl_b="10_00_10_00_00_04_00_0F" # G.992.5 Annex J # G.993.2 Annex A/B/C # G.993.5 Annex A/B/C -xtse_xdsl_j="10_00_10_40_00_04_01_0F" +xtse_xdsl_j="10_00_10_40_00_04_01_07" # G.992.1 Annex B xtse_xdsl_bdmt="10_00_00_00_00_00_00_00" |