add ltq-ptm

SVN-Revision: 34690

27 files changed, 9005 insertions, 0 deletions

diff --git a/package/platform/lantiq/ltq-ptm/Makefile b/package/platform/lantiq/ltq-ptm/Makefile
new file mode 100644
index 0000000..f0fb25a
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/Makefile
@@ -0,0 +1,52 @@
+# Copyright (C) 2012 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_NAME:=ltq-ptm
+PKG_RELEASE:=1
+PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/ltq-ptm-$(BUILD_VARIANT)
+
+PKG_MAINTAINER:=John Crispin <blogic@openwrt.org>
+
+include $(INCLUDE_DIR)/package.mk
+
+define KernelPackage/ltq-ptm-template
+  SECTION:=sys
+  CATEGORY:=Kernel modules
+  SUBMENU:=Network Devices
+  TITLE:=ptm driver for $(1)
+  URL:=http://www.lantiq.com/
+  VARIANT:=$(1)
+  DEPENDS:=@TARGET_lantiq_$(2)
+  FILES:=$(PKG_BUILD_DIR)/ltq_ptm_$(1).ko 
+  AUTOLOAD:=$(call AutoLoad,52,ltq_ptm_$(1))
+endef
+
+KernelPackage/ltq-ptm-danube=$(call KernelPackage/ltq-ptm-template,danube,xway)
+KernelPackage/ltq-ptm-ar9=$(call KernelPackage/ltq-ptm-template,ar9,xway)
+KernelPackage/ltq-ptm-ase=$(call KernelPackage/ltq-ptm-template,ase,ase)
+KernelPackage/ltq-ptm-vr9=$(call KernelPackage/ltq-ptm-template,vr9,xway)
+
+define Build/Prepare
+	$(INSTALL_DIR) $(PKG_BUILD_DIR)
+	$(CP) ./src/* $(PKG_BUILD_DIR)
+endef
+
+define Build/Configure
+endef
+
+define Build/Compile
+	cd $(LINUX_DIR); \
+		ARCH=mips CROSS_COMPILE="$(KERNEL_CROSS)" \
+		$(MAKE) BUILD_VARIANT=$(BUILD_VARIANT) M=$(PKG_BUILD_DIR) V=1 modules
+endef
+
+$(eval $(call KernelPackage,ltq-ptm-danube))
+$(eval $(call KernelPackage,ltq-ptm-ase))
+$(eval $(call KernelPackage,ltq-ptm-ar9))
+$(eval $(call KernelPackage,ltq-ptm-vr9))
diff --git a/package/platform/lantiq/ltq-ptm/src/Makefile b/package/platform/lantiq/ltq-ptm/src/Makefile
new file mode 100644
index 0000000..0d0bda5
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/Makefile
@@ -0,0 +1,23 @@
+ifeq ($(BUILD_VARIANT),danube)
+  CFLAGS_MODULE+=-DCONFIG_DANUBE
+  obj-m = ltq_ptm_danube.o
+  ltq_ptm_danube-objs = ifxmips_ptm_adsl.o ifxmips_ptm_danube.o
+endif
+
+ifeq ($(BUILD_VARIANT),ase)
+  CFLAGS_MODULE+=-DCONFIG_AMAZON_SE
+  obj-m = ltq_ptm_ase.o
+  ltq_ptm_ase-objs = ifxmips_ptm_adsl.o ifxmips_ptm_amazon_se.o
+endif
+
+ifeq ($(BUILD_VARIANT),ar9)
+  CFLAGS_MODULE+=-DCONFIG_AR9
+  obj-m = ltq_ptm_ar9.o
+  ltq_ptm_ar9-objs = ifxmips_ptm_adsl.o ifxmips_ptm_ar9.o
+endif
+
+ifeq ($(BUILD_VARIANT),vr9)
+  CFLAGS_MODULE+=-DCONFIG_VR9
+  obj-m = ltq_ptm_vr9.o
+  ltq_ptm_vr9-objs = ifxmips_ptm_vdsl.o ifxmips_ptm_vr9.o
+endif
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_adsl.c b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_adsl.c
new file mode 100644
index 0000000..58a581e
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_adsl.c
@@ -0,0 +1,1551 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_adsl.c
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver common source file (core functions for Danube/
+**                Amazon-SE/AR9)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+/*
+ * ####################################
+ *              Head File
+ * ####################################
+ */
+
+/*
+ *  Common Head File
+ */
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/ioctl.h>
+#include <linux/etherdevice.h>
+#include <linux/interrupt.h>
+#include <asm/io.h>
+
+/*
+ *  Chip Specific Head File
+ */
+#include "ifxmips_ptm_adsl.h"
+
+
+#include <lantiq_soc.h>
+
+/*
+ * ####################################
+ *        Kernel Version Adaption
+ * ####################################
+ */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11)
+  #define MODULE_PARM_ARRAY(a, b)   module_param_array(a, int, NULL, 0)
+  #define MODULE_PARM(a, b)         module_param(a, int, 0)
+#else
+  #define MODULE_PARM_ARRAY(a, b)   MODULE_PARM(a, b)
+#endif
+
+
+
+/*
+ * ####################################
+ *   Parameters to Configure PPE
+ * ####################################
+ */
+
+static int write_desc_delay     = 0x20;         /*  Write descriptor delay                          */
+
+static int rx_max_packet_size   = ETH_MAX_FRAME_LENGTH;
+                                                /*  Max packet size for RX                          */
+
+static int dma_rx_descriptor_length = 24;       /*  Number of descriptors per DMA RX channel        */
+static int dma_tx_descriptor_length = 24;       /*  Number of descriptors per DMA TX channel        */
+
+static int eth_efmtc_crc_cfg = 0x03100710;      /*  default: tx_eth_crc_check: 1, tx_tc_crc_check: 1, tx_tc_crc_len = 16    */
+                                                /*           rx_eth_crc_present: 1, rx_eth_crc_check: 1, rx_tc_crc_check: 1, rx_tc_crc_len = 16 */
+
+MODULE_PARM(write_desc_delay, "i");
+MODULE_PARM_DESC(write_desc_delay, "PPE core clock cycles between descriptor write and effectiveness in external RAM");
+
+MODULE_PARM(rx_max_packet_size, "i");
+MODULE_PARM_DESC(rx_max_packet_size, "Max packet size in byte for downstream ethernet frames");
+
+MODULE_PARM(dma_rx_descriptor_length, "i");
+MODULE_PARM_DESC(dma_rx_descriptor_length, "Number of descriptor assigned to DMA RX channel (>16)");
+MODULE_PARM(dma_tx_descriptor_length, "i");
+MODULE_PARM_DESC(dma_tx_descriptor_length, "Number of descriptor assigned to DMA TX channel (>16)");
+
+MODULE_PARM(eth_efmtc_crc_cfg, "i");
+MODULE_PARM_DESC(eth_efmtc_crc_cfg, "Configuration for PTM TX/RX ethernet/efm-tc CRC");
+
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+
+#define DUMP_SKB_LEN                            ~0
+
+
+
+/*
+ * ####################################
+ *             Declaration
+ * ####################################
+ */
+
+/*
+ *  Network Operations
+ */
+static void ptm_setup(struct net_device *, int);
+static struct net_device_stats *ptm_get_stats(struct net_device *);
+static int ptm_open(struct net_device *);
+static int ptm_stop(struct net_device *);
+  static unsigned int ptm_poll(int, unsigned int);
+  static int ptm_napi_poll(struct napi_struct *, int);
+static int ptm_hard_start_xmit(struct sk_buff *, struct net_device *);
+static int ptm_ioctl(struct net_device *, struct ifreq *, int);
+static void ptm_tx_timeout(struct net_device *);
+
+/*
+ *  DSL Data LED
+ */
+static INLINE void adsl_led_flash(void);
+
+/*
+ *  buffer manage functions
+ */
+static INLINE struct sk_buff* alloc_skb_rx(void);
+//static INLINE struct sk_buff* alloc_skb_tx(unsigned int);
+static INLINE struct sk_buff *get_skb_rx_pointer(unsigned int);
+static INLINE int get_tx_desc(unsigned int, unsigned int *);
+
+/*
+ *  Mailbox handler and signal function
+ */
+static INLINE int mailbox_rx_irq_handler(unsigned int);
+static irqreturn_t mailbox_irq_handler(int, void *);
+static INLINE void mailbox_signal(unsigned int, int);
+#ifdef CONFIG_IFX_PTM_RX_TASKLET
+  static void do_ptm_tasklet(unsigned long);
+#endif
+
+/*
+ *  Debug Functions
+ */
+#if defined(DEBUG_DUMP_SKB) && DEBUG_DUMP_SKB
+  static void dump_skb(struct sk_buff *, u32, char *, int, int, int);
+#else
+  #define dump_skb(skb, len, title, port, ch, is_tx)    do {} while (0)
+#endif
+#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC
+  static void skb_swap(struct sk_buff *);
+#else
+  #define skb_swap(skb)                                 do {} while (0)
+#endif
+
+/*
+ *  Proc File Functions
+ */
+static INLINE void proc_file_create(void);
+static INLINE void proc_file_delete(void);
+static int proc_read_version(char *, char **, off_t, int, int *, void *);
+static int proc_read_wanmib(char *, char **, off_t, int, int *, void *);
+static int proc_write_wanmib(struct file *, const char *, unsigned long, void *);
+#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC
+  static int proc_read_genconf(char *, char **, off_t, int, int *, void *);
+#endif
+#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC
+  static int proc_read_dbg(char *, char **, off_t, int, int *, void *);
+  static int proc_write_dbg(struct file *, const char *, unsigned long, void *);
+#endif
+
+/*
+ *  Proc Help Functions
+ */
+static INLINE int stricmp(const char *, const char *);
+#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC
+  static INLINE int strincmp(const char *, const char *, int);
+#endif
+static INLINE int ifx_ptm_version(char *);
+
+/*
+ *  Init & clean-up functions
+ */
+static INLINE void check_parameters(void);
+static INLINE int init_priv_data(void);
+static INLINE void clear_priv_data(void);
+static INLINE void init_tables(void);
+
+/*
+ *  Exteranl Function
+ */
+#if defined(CONFIG_IFXMIPS_DSL_CPE_MEI) || defined(CONFIG_IFXMIPS_DSL_CPE_MEI_MODULE)
+  extern int ifx_mei_atm_showtime_check(int *is_showtime, struct port_cell_info *port_cell, void **xdata_addr);
+#else
+  static inline int ifx_mei_atm_showtime_check(int *is_showtime, struct port_cell_info *port_cell, void **xdata_addr)
+  {
+    if ( is_showtime != NULL )
+        *is_showtime = 0;
+    return 0;
+  }
+#endif
+
+/*
+ *  External variable
+ */
+#if defined(CONFIG_IFXMIPS_DSL_CPE_MEI) || defined(CONFIG_IFXMIPS_DSL_CPE_MEI_MODULE)
+  extern int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *);
+  extern int (*ifx_mei_atm_showtime_exit)(void);
+#else
+  int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) = NULL;
+  EXPORT_SYMBOL(ifx_mei_atm_showtime_enter);
+  int (*ifx_mei_atm_showtime_exit)(void) = NULL;
+  EXPORT_SYMBOL(ifx_mei_atm_showtime_exit);
+#endif
+
+
+
+/*
+ * ####################################
+ *            Local Variable
+ * ####################################
+ */
+
+static struct ptm_priv_data g_ptm_priv_data;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
+static struct net_device_ops g_ptm_netdev_ops = {
+    .ndo_get_stats       = ptm_get_stats,
+    .ndo_open            = ptm_open,
+    .ndo_stop            = ptm_stop,
+    .ndo_start_xmit      = ptm_hard_start_xmit,
+    .ndo_validate_addr   = eth_validate_addr,
+    .ndo_set_mac_address = eth_mac_addr,
+    .ndo_change_mtu      = eth_change_mtu,
+    .ndo_do_ioctl        = ptm_ioctl,
+    .ndo_tx_timeout      = ptm_tx_timeout,
+};
+#endif
+
+static struct net_device *g_net_dev[2] = {0};
+static char *g_net_dev_name[2] = {"ptm0", "ptmfast0"};
+
+#ifdef CONFIG_IFX_PTM_RX_TASKLET
+  static struct tasklet_struct g_ptm_tasklet[] = {
+    {NULL, 0, ATOMIC_INIT(0), do_ptm_tasklet, 0},
+    {NULL, 0, ATOMIC_INIT(0), do_ptm_tasklet, 1},
+  };
+#endif
+
+unsigned int ifx_ptm_dbg_enable = DBG_ENABLE_MASK_ERR;
+
+static struct proc_dir_entry* g_ptm_dir = NULL;
+
+static int g_showtime = 0;
+
+
+
+/*
+ * ####################################
+ *            Local Function
+ * ####################################
+ */
+
+static void ptm_setup(struct net_device *dev, int ndev)
+{
+    /*  hook network operations */
+    dev->netdev_ops      = &g_ptm_netdev_ops;
+    netif_napi_add(dev, &g_ptm_priv_data.itf[ndev].napi, ptm_napi_poll, 25);
+    dev->watchdog_timeo  = ETH_WATCHDOG_TIMEOUT;
+
+    dev->dev_addr[0] = 0x00;
+    dev->dev_addr[1] = 0x20;
+    dev->dev_addr[2] = 0xda;
+    dev->dev_addr[3] = 0x86;
+    dev->dev_addr[4] = 0x23;
+    dev->dev_addr[5] = 0x75 + ndev;
+}
+
+static struct net_device_stats *ptm_get_stats(struct net_device *dev)
+{
+    int ndev;
+
+    for ( ndev = 0; ndev < ARRAY_SIZE(g_net_dev) && g_net_dev[ndev] != dev; ndev++ );
+    ASSERT(ndev >= 0 && ndev < ARRAY_SIZE(g_net_dev), "ndev = %d (wrong value)", ndev);
+
+    g_ptm_priv_data.itf[ndev].stats.rx_errors   = WAN_MIB_TABLE[ndev].wrx_tccrc_err_pdu + WAN_MIB_TABLE[ndev].wrx_ethcrc_err_pdu;
+    g_ptm_priv_data.itf[ndev].stats.rx_dropped  = WAN_MIB_TABLE[ndev].wrx_nodesc_drop_pdu + WAN_MIB_TABLE[ndev].wrx_len_violation_drop_pdu + (WAN_MIB_TABLE[ndev].wrx_correct_pdu - g_ptm_priv_data.itf[ndev].stats.rx_packets);
+
+    return &g_ptm_priv_data.itf[ndev].stats;
+}
+
+static int ptm_open(struct net_device *dev)
+{
+    int ndev;
+
+    for ( ndev = 0; ndev < ARRAY_SIZE(g_net_dev) && g_net_dev[ndev] != dev; ndev++ );
+    ASSERT(ndev >= 0 && ndev < ARRAY_SIZE(g_net_dev), "ndev = %d (wrong value)", ndev);
+
+    napi_enable(&g_ptm_priv_data.itf[ndev].napi);
+
+    IFX_REG_W32_MASK(0, 1 << ndev, MBOX_IGU1_IER);
+
+    netif_start_queue(dev);
+
+    return 0;
+}
+
+static int ptm_stop(struct net_device *dev)
+{
+    int ndev;
+
+    for ( ndev = 0; ndev < ARRAY_SIZE(g_net_dev) && g_net_dev[ndev] != dev; ndev++ );
+    ASSERT(ndev >= 0 && ndev < ARRAY_SIZE(g_net_dev), "ndev = %d (wrong value)", ndev);
+
+    IFX_REG_W32_MASK((1 << ndev) | (1 << (ndev + 16)), 0, MBOX_IGU1_IER);
+
+    napi_disable(&g_ptm_priv_data.itf[ndev].napi);
+
+    netif_stop_queue(dev);
+
+    return 0;
+}
+
+static unsigned int ptm_poll(int ndev, unsigned int work_to_do)
+{
+    unsigned int work_done = 0;
+
+    ASSERT(ndev >= 0 && ndev < ARRAY_SIZE(g_net_dev), "ndev = %d (wrong value)", ndev);
+
+    while ( work_done < work_to_do && WRX_DMA_CHANNEL_CONFIG(ndev)->vlddes > 0 ) {
+        if ( mailbox_rx_irq_handler(ndev) < 0 )
+            break;
+
+        work_done++;
+    }
+
+    return work_done;
+}
+static int ptm_napi_poll(struct napi_struct *napi, int budget)
+{
+    int ndev;
+    unsigned int work_done;
+
+    for ( ndev = 0; ndev < ARRAY_SIZE(g_net_dev) && g_net_dev[ndev] != napi->dev; ndev++ );
+
+    work_done = ptm_poll(ndev, budget);
+
+    //  interface down
+    if ( !netif_running(napi->dev) ) {
+        napi_complete(napi);
+        return work_done;
+    }
+
+    //  no more traffic
+    if ( WRX_DMA_CHANNEL_CONFIG(ndev)->vlddes == 0 ) {
+        //  clear interrupt
+        IFX_REG_W32_MASK(0, 1 << ndev, MBOX_IGU1_ISRC);
+        //  double check
+        if ( WRX_DMA_CHANNEL_CONFIG(ndev)->vlddes == 0 ) {
+            napi_complete(napi);
+            IFX_REG_W32_MASK(0, 1 << ndev, MBOX_IGU1_IER);
+            return work_done;
+        }
+    }
+
+    //  next round
+    return work_done;
+}
+
+static int ptm_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+    int ndev;
+    unsigned int f_full;
+    int desc_base;
+    register struct tx_descriptor reg_desc = {0};
+
+    for ( ndev = 0; ndev < ARRAY_SIZE(g_net_dev) && g_net_dev[ndev] != dev; ndev++ );
+    ASSERT(ndev >= 0 && ndev < ARRAY_SIZE(g_net_dev), "ndev = %d (wrong value)", ndev);
+
+    if ( !g_showtime ) {
+        err("not in showtime");
+        goto PTM_HARD_START_XMIT_FAIL;
+    }
+
+    /*  allocate descriptor */
+    desc_base = get_tx_desc(ndev, &f_full);
+    if ( f_full ) {
+        dev->trans_start = jiffies;
+        netif_stop_queue(dev);
+
+        IFX_REG_W32_MASK(0, 1 << (ndev + 16), MBOX_IGU1_ISRC);
+        IFX_REG_W32_MASK(0, 1 << (ndev + 16), MBOX_IGU1_IER);
+    }
+    if ( desc_base < 0 )
+        goto PTM_HARD_START_XMIT_FAIL;
+
+    if ( g_ptm_priv_data.itf[ndev].tx_skb[desc_base] != NULL )
+        dev_kfree_skb_any(g_ptm_priv_data.itf[ndev].tx_skb[desc_base]);
+    g_ptm_priv_data.itf[ndev].tx_skb[desc_base] = skb;
+
+    reg_desc.dataptr = (unsigned int)skb->data >> 2;
+    reg_desc.datalen = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
+    reg_desc.byteoff = (unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1);
+    reg_desc.own     = 1;
+    reg_desc.c       = 1;
+    reg_desc.sop = reg_desc.eop = 1;
+
+    /*  write discriptor to memory and write back cache */
+    g_ptm_priv_data.itf[ndev].tx_desc[desc_base] = reg_desc;
+    dma_cache_wback((unsigned long)skb->data, skb->len);
+    wmb();
+
+    dump_skb(skb, DUMP_SKB_LEN, (char *)__func__, ndev, ndev, 1);
+
+    if ( (ifx_ptm_dbg_enable & DBG_ENABLE_MASK_MAC_SWAP) ) {
+        skb_swap(skb);
+    }
+
+    g_ptm_priv_data.itf[ndev].stats.tx_packets++;
+    g_ptm_priv_data.itf[ndev].stats.tx_bytes += reg_desc.datalen;
+
+    dev->trans_start = jiffies;
+    mailbox_signal(ndev, 1);
+
+    adsl_led_flash();
+
+    return NETDEV_TX_OK;
+
+PTM_HARD_START_XMIT_FAIL:
+    dev_kfree_skb_any(skb);
+    g_ptm_priv_data.itf[ndev].stats.tx_dropped++;
+    return NETDEV_TX_OK;
+}
+
+static int ptm_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+{
+    int ndev;
+
+    for ( ndev = 0; ndev < ARRAY_SIZE(g_net_dev) && g_net_dev[ndev] != dev; ndev++ );
+    ASSERT(ndev >= 0 && ndev < ARRAY_SIZE(g_net_dev), "ndev = %d (wrong value)", ndev);
+
+    switch ( cmd )
+    {
+    case IFX_PTM_MIB_CW_GET:
+        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxNoIdleCodewords   = WAN_MIB_TABLE[ndev].wrx_nonidle_cw;
+        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxIdleCodewords     = WAN_MIB_TABLE[ndev].wrx_idle_cw;
+        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxCodingViolation   = WAN_MIB_TABLE[ndev].wrx_err_cw;
+        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifTxNoIdleCodewords   = 0;
+        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifTxIdleCodewords     = 0;
+        break;
+    case IFX_PTM_MIB_FRAME_GET:
+        ((PTM_FRAME_MIB_T *)ifr->ifr_data)->RxCorrect   = WAN_MIB_TABLE[ndev].wrx_correct_pdu;
+        ((PTM_FRAME_MIB_T *)ifr->ifr_data)->TC_CrcError = WAN_MIB_TABLE[ndev].wrx_tccrc_err_pdu;
+        ((PTM_FRAME_MIB_T *)ifr->ifr_data)->RxDropped   = WAN_MIB_TABLE[ndev].wrx_nodesc_drop_pdu + WAN_MIB_TABLE[ndev].wrx_len_violation_drop_pdu;
+        ((PTM_FRAME_MIB_T *)ifr->ifr_data)->TxSend      = WAN_MIB_TABLE[ndev].wtx_total_pdu;
+        break;
+    case IFX_PTM_CFG_GET:
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcPresent = CFG_ETH_EFMTC_CRC->rx_eth_crc_present;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcCheck   = CFG_ETH_EFMTC_CRC->rx_eth_crc_check;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcCheck    = CFG_ETH_EFMTC_CRC->rx_tc_crc_check;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen      = CFG_ETH_EFMTC_CRC->rx_tc_crc_len;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxEthCrcGen     = CFG_ETH_EFMTC_CRC->tx_eth_crc_gen;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcGen      = CFG_ETH_EFMTC_CRC->tx_tc_crc_gen;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen      = CFG_ETH_EFMTC_CRC->tx_tc_crc_len;
+        break;
+    case IFX_PTM_CFG_SET:
+        CFG_ETH_EFMTC_CRC->rx_eth_crc_present   = ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcPresent ? 1 : 0;
+        CFG_ETH_EFMTC_CRC->rx_eth_crc_check     = ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcCheck ? 1 : 0;
+        if ( ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcCheck && (((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen == 16 || ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen == 32) )
+        {
+            CFG_ETH_EFMTC_CRC->rx_tc_crc_check  = 1;
+            CFG_ETH_EFMTC_CRC->rx_tc_crc_len    = ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen;
+        }
+        else
+        {
+            CFG_ETH_EFMTC_CRC->rx_tc_crc_check  = 0;
+            CFG_ETH_EFMTC_CRC->rx_tc_crc_len    = 0;
+        }
+        CFG_ETH_EFMTC_CRC->tx_eth_crc_gen       = ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxEthCrcGen ? 1 : 0;
+        if ( ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcGen && (((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen == 16 || ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen == 32) )
+        {
+            CFG_ETH_EFMTC_CRC->tx_tc_crc_gen    = 1;
+            CFG_ETH_EFMTC_CRC->tx_tc_crc_len    = ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen;
+        }
+        else
+        {
+            CFG_ETH_EFMTC_CRC->tx_tc_crc_gen    = 0;
+            CFG_ETH_EFMTC_CRC->tx_tc_crc_len    = 0;
+        }
+        break;
+    default:
+        return -EOPNOTSUPP;
+    }
+
+    return 0;
+}
+
+static void ptm_tx_timeout(struct net_device *dev)
+{
+    int ndev;
+
+    for ( ndev = 0; ndev < ARRAY_SIZE(g_net_dev) && g_net_dev[ndev] != dev; ndev++ );
+    ASSERT(ndev >= 0 && ndev < ARRAY_SIZE(g_net_dev), "ndev = %d (wrong value)", ndev);
+
+    /*  disable TX irq, release skb when sending new packet */
+    IFX_REG_W32_MASK(1 << (ndev + 16), 0, MBOX_IGU1_IER);
+
+    /*  wake up TX queue    */
+    netif_wake_queue(dev);
+
+    return;
+}
+
+static INLINE void adsl_led_flash(void)
+{
+}
+
+static INLINE struct sk_buff* alloc_skb_rx(void)
+{
+    struct sk_buff *skb;
+
+    /*  allocate memroy including trailer and padding   */
+    skb = dev_alloc_skb(rx_max_packet_size + RX_HEAD_MAC_ADDR_ALIGNMENT + DATA_BUFFER_ALIGNMENT);
+    if ( skb != NULL ) {
+        /*  must be burst length alignment and reserve two more bytes for MAC address alignment  */
+        if ( ((unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1)) != 0 )
+            skb_reserve(skb, ~((unsigned int)skb->data + (DATA_BUFFER_ALIGNMENT - 1)) & (DATA_BUFFER_ALIGNMENT - 1));
+        /*  pub skb in reserved area "skb->data - 4"    */
+        *((struct sk_buff **)skb->data - 1) = skb;
+        wmb();
+        /*  write back and invalidate cache    */
+        dma_cache_wback_inv((unsigned long)skb->data - sizeof(skb), sizeof(skb));
+        /*  invalidate cache    */
+        dma_cache_inv((unsigned long)skb->data, (unsigned int)skb->end - (unsigned int)skb->data);
+    }
+
+    return skb;
+}
+
+#if 0
+static INLINE struct sk_buff* alloc_skb_tx(unsigned int size)
+{
+    struct sk_buff *skb;
+
+    /*  allocate memory including padding   */
+    size = (size + DATA_BUFFER_ALIGNMENT - 1) & ~(DATA_BUFFER_ALIGNMENT - 1);
+    skb = dev_alloc_skb(size + DATA_BUFFER_ALIGNMENT);
+    /*  must be burst length alignment  */
+    if ( skb != NULL )
+        skb_reserve(skb, ~((unsigned int)skb->data + (DATA_BUFFER_ALIGNMENT - 1)) & (DATA_BUFFER_ALIGNMENT - 1));
+    return skb;
+}
+#endif
+
+static INLINE struct sk_buff *get_skb_rx_pointer(unsigned int dataptr)
+{
+    unsigned int skb_dataptr;
+    struct sk_buff *skb;
+
+    skb_dataptr = ((dataptr - 1) << 2) | KSEG1;
+    skb = *(struct sk_buff **)skb_dataptr;
+
+    ASSERT((unsigned int)skb >= KSEG0, "invalid skb - skb = %#08x, dataptr = %#08x", (unsigned int)skb, dataptr);
+    ASSERT(((unsigned int)skb->data | KSEG1) == ((dataptr << 2) | KSEG1), "invalid skb - skb = %#08x, skb->data = %#08x, dataptr = %#08x", (unsigned int)skb, (unsigned int)skb->data, dataptr);
+
+    return skb;
+}
+
+static INLINE int get_tx_desc(unsigned int itf, unsigned int *f_full)
+{
+    int desc_base = -1;
+    struct ptm_itf *p_itf = &g_ptm_priv_data.itf[itf];
+
+    //  assume TX is serial operation
+    //  no protection provided
+
+    *f_full = 1;
+
+    if ( p_itf->tx_desc[p_itf->tx_desc_pos].own == 0 ) {
+        desc_base = p_itf->tx_desc_pos;
+        if ( ++(p_itf->tx_desc_pos) == dma_tx_descriptor_length )
+            p_itf->tx_desc_pos = 0;
+        if ( p_itf->tx_desc[p_itf->tx_desc_pos].own == 0 )
+            *f_full = 0;
+    }
+
+    return desc_base;
+}
+
+static INLINE int mailbox_rx_irq_handler(unsigned int ch)   //  return: < 0 - descriptor not available, 0 - received one packet
+{
+    unsigned int ndev = ch;
+    struct sk_buff *skb;
+    struct sk_buff *new_skb;
+    volatile struct rx_descriptor *desc;
+    struct rx_descriptor reg_desc;
+    int netif_rx_ret;
+
+    desc = &g_ptm_priv_data.itf[ndev].rx_desc[g_ptm_priv_data.itf[ndev].rx_desc_pos];
+    if ( desc->own || !desc->c )    //  if PP32 hold descriptor or descriptor not completed
+        return -EAGAIN;
+    if ( ++g_ptm_priv_data.itf[ndev].rx_desc_pos == dma_rx_descriptor_length )
+        g_ptm_priv_data.itf[ndev].rx_desc_pos = 0;
+
+    reg_desc = *desc;
+    skb = get_skb_rx_pointer(reg_desc.dataptr);
+
+    if ( !reg_desc.err ) {
+        new_skb = alloc_skb_rx();
+        if ( new_skb != NULL ) {
+            skb_reserve(skb, reg_desc.byteoff);
+            skb_put(skb, reg_desc.datalen);
+
+            dump_skb(skb, DUMP_SKB_LEN, (char *)__func__, ndev, ndev, 0);
+
+            //  parse protocol header
+            skb->dev = g_net_dev[ndev];
+            skb->protocol = eth_type_trans(skb, skb->dev);
+
+            g_net_dev[ndev]->last_rx = jiffies;
+
+            netif_rx_ret = netif_receive_skb(skb);
+
+            if ( netif_rx_ret != NET_RX_DROP ) {
+                g_ptm_priv_data.itf[ndev].stats.rx_packets++;
+                g_ptm_priv_data.itf[ndev].stats.rx_bytes += reg_desc.datalen;
+            }
+
+            reg_desc.dataptr = ((unsigned int)new_skb->data >> 2) & 0x0FFFFFFF;
+            reg_desc.byteoff = RX_HEAD_MAC_ADDR_ALIGNMENT;
+        }
+    }
+    else
+        reg_desc.err = 0;
+
+    reg_desc.datalen = rx_max_packet_size;
+    reg_desc.own     = 1;
+    reg_desc.c       = 0;
+
+    //  update descriptor
+    *desc = reg_desc;
+    wmb();
+
+    mailbox_signal(ndev, 0);
+
+    adsl_led_flash();
+
+    return 0;
+}
+
+static irqreturn_t mailbox_irq_handler(int irq, void *dev_id)
+{
+    unsigned int isr;
+    int i;
+
+    isr = IFX_REG_R32(MBOX_IGU1_ISR);
+    IFX_REG_W32(isr, MBOX_IGU1_ISRC);
+    isr &= IFX_REG_R32(MBOX_IGU1_IER);
+
+    while ( (i = __fls(isr)) >= 0 ) {
+        isr ^= 1 << i;
+
+        if ( i >= 16 ) {
+            //  TX
+            IFX_REG_W32_MASK(1 << i, 0, MBOX_IGU1_IER);
+            i -= 16;
+            if ( i < MAX_ITF_NUMBER )
+                netif_wake_queue(g_net_dev[i]);
+        }
+        else {
+            //  RX
+#ifdef CONFIG_IFX_PTM_RX_INTERRUPT
+            while ( WRX_DMA_CHANNEL_CONFIG(i)->vlddes > 0 )
+                mailbox_rx_irq_handler(i);
+#else
+            IFX_REG_W32_MASK(1 << i, 0, MBOX_IGU1_IER);
+            napi_schedule(&g_ptm_priv_data.itf[i].napi);
+#endif
+        }
+    }
+
+    return IRQ_HANDLED;
+}
+
+static INLINE void mailbox_signal(unsigned int itf, int is_tx)
+{
+    int count = 1000;
+
+    if ( is_tx ) {
+        while ( MBOX_IGU3_ISR_ISR(itf + 16) && count > 0 )
+            count--;
+        IFX_REG_W32(MBOX_IGU3_ISRS_SET(itf + 16), MBOX_IGU3_ISRS);
+    }
+    else {
+        while ( MBOX_IGU3_ISR_ISR(itf) && count > 0 )
+            count--;
+        IFX_REG_W32(MBOX_IGU3_ISRS_SET(itf), MBOX_IGU3_ISRS);
+    }
+
+    ASSERT(count != 0, "MBOX_IGU3_ISR = 0x%08x", IFX_REG_R32(MBOX_IGU3_ISR));
+}
+
+#ifdef CONFIG_IFX_PTM_RX_TASKLET
+static void do_ptm_tasklet(unsigned long arg)
+{
+    unsigned int work_to_do = 25;
+    unsigned int work_done = 0;
+
+    ASSERT(arg >= 0 && arg < ARRAY_SIZE(g_net_dev), "arg = %lu (wrong value)", arg);
+
+    while ( work_done < work_to_do && WRX_DMA_CHANNEL_CONFIG(arg)->vlddes > 0 ) {
+        if ( mailbox_rx_irq_handler(arg) < 0 )
+            break;
+
+        work_done++;
+    }
+
+    //  interface down
+    if ( !netif_running(g_net_dev[arg]) )
+        return;
+
+    //  no more traffic
+    if ( WRX_DMA_CHANNEL_CONFIG(arg)->vlddes == 0 ) {
+        //  clear interrupt
+        IFX_REG_W32_MASK(0, 1 << arg, MBOX_IGU1_ISRC);
+        //  double check
+        if ( WRX_DMA_CHANNEL_CONFIG(arg)->vlddes == 0 ) {
+            IFX_REG_W32_MASK(0, 1 << arg, MBOX_IGU1_IER);
+            return;
+        }
+    }
+
+    //  next round
+    tasklet_schedule(&g_ptm_tasklet[arg]);
+}
+#endif
+
+#if defined(DEBUG_DUMP_SKB) && DEBUG_DUMP_SKB
+static void dump_skb(struct sk_buff *skb, u32 len, char *title, int port, int ch, int is_tx)
+{
+    int i;
+
+    if ( !(ifx_ptm_dbg_enable & (is_tx ? DBG_ENABLE_MASK_DUMP_SKB_TX : DBG_ENABLE_MASK_DUMP_SKB_RX)) )
+        return;
+
+    if ( skb->len < len )
+        len = skb->len;
+
+    if ( len > rx_max_packet_size ) {
+        printk("too big data length: skb = %08x, skb->data = %08x, skb->len = %d\n", (u32)skb, (u32)skb->data, skb->len);
+        return;
+    }
+
+    if ( ch >= 0 )
+        printk("%s (port %d, ch %d)\n", title, port, ch);
+    else
+        printk("%s\n", title);
+    printk("  skb->data = %08X, skb->tail = %08X, skb->len = %d\n", (u32)skb->data, (u32)skb->tail, (int)skb->len);
+    for ( i = 1; i <= len; i++ ) {
+        if ( i % 16 == 1 )
+            printk("  %4d:", i - 1);
+        printk(" %02X", (int)(*((char*)skb->data + i - 1) & 0xFF));
+        if ( i % 16 == 0 )
+            printk("\n");
+    }
+    if ( (i - 1) % 16 != 0 )
+        printk("\n");
+}
+#endif
+
+#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC
+static void skb_swap(struct sk_buff *skb)
+{
+    unsigned char tmp[8];
+    unsigned char *p = skb->data;
+
+    if ( !(p[0] & 0x01) ) { //  bypass broadcast/multicast
+        //  swap MAC
+        memcpy(tmp, p, 6);
+        memcpy(p, p + 6, 6);
+        memcpy(p + 6, tmp, 6);
+        p += 12;
+
+        //  bypass VLAN
+        while ( p[0] == 0x81 && p[1] == 0x00 )
+            p += 4;
+
+        //  IP
+        if ( p[0] == 0x08 && p[1] == 0x00 ) {
+            p += 14;
+            memcpy(tmp, p, 4);
+            memcpy(p, p + 4, 4);
+            memcpy(p + 4, tmp, 4);
+            p += 8;
+        }
+
+        dma_cache_wback((unsigned long)skb->data, (unsigned long)p - (unsigned long)skb->data);
+    }
+}
+#endif
+
+static INLINE void proc_file_create(void)
+{
+    struct proc_dir_entry *res;
+
+    g_ptm_dir = proc_mkdir("driver/ifx_ptm", NULL);
+
+    create_proc_read_entry("version",
+                            0,
+                            g_ptm_dir,
+                            proc_read_version,
+                            NULL);
+
+    res = create_proc_entry("wanmib",
+                            0,
+                            g_ptm_dir);
+    if ( res != NULL ) {
+        res->read_proc  = proc_read_wanmib;
+        res->write_proc = proc_write_wanmib;
+    }
+
+#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC
+    create_proc_read_entry("genconf",
+                            0,
+                            g_ptm_dir,
+                            proc_read_genconf,
+                            NULL);
+
+  #ifdef CONFIG_AR9
+    create_proc_read_entry("regs",
+                            0,
+                            g_ptm_dir,
+                            ifx_ptm_proc_read_regs,
+                            NULL);
+  #endif
+#endif
+
+#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC
+    res = create_proc_entry("dbg",
+                            0,
+                            g_ptm_dir);
+    if ( res != NULL ) {
+        res->read_proc  = proc_read_dbg;
+        res->write_proc = proc_write_dbg;
+    }
+#endif
+}
+
+static INLINE void proc_file_delete(void)
+{
+#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC
+    remove_proc_entry("dbg", g_ptm_dir);
+#endif
+
+#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC
+  #ifdef CONFIG_AR9
+    remove_proc_entry("regs", g_ptm_dir);
+  #endif
+
+    remove_proc_entry("genconf", g_ptm_dir);
+#endif
+
+    remove_proc_entry("wanmib", g_ptm_dir);
+
+    remove_proc_entry("version", g_ptm_dir);
+
+    remove_proc_entry("driver/ifx_ptm", NULL);
+}
+
+static int proc_read_version(char *buf, char **start, off_t offset, int count, int *eof, void *data)
+{
+    int len = 0;
+
+    len += ifx_ptm_version(buf + len);
+
+    if ( offset >= len ) {
+        *start = buf;
+        *eof = 1;
+        return 0;
+    }
+    *start = buf + offset;
+    if ( (len -= offset) > count )
+        return count;
+    *eof = 1;
+    return len;
+}
+
+static int proc_read_wanmib(char *page, char **start, off_t off, int count, int *eof, void *data)
+{
+    int len = 0;
+    int i;
+    char *title[] = {
+        "ptm0\n",
+        "ptmfast0\n"
+    };
+
+    for ( i = 0; i < ARRAY_SIZE(title); i++ ) {
+        len += sprintf(page + off + len, title[i]);
+        len += sprintf(page + off + len, "  wrx_correct_pdu            = %d\n", WAN_MIB_TABLE[i].wrx_correct_pdu);
+        len += sprintf(page + off + len, "  wrx_correct_pdu_bytes      = %d\n", WAN_MIB_TABLE[i].wrx_correct_pdu_bytes);
+        len += sprintf(page + off + len, "  wrx_tccrc_err_pdu          = %d\n", WAN_MIB_TABLE[i].wrx_tccrc_err_pdu);
+        len += sprintf(page + off + len, "  wrx_tccrc_err_pdu_bytes    = %d\n", WAN_MIB_TABLE[i].wrx_tccrc_err_pdu_bytes);
+        len += sprintf(page + off + len, "  wrx_ethcrc_err_pdu         = %d\n", WAN_MIB_TABLE[i].wrx_ethcrc_err_pdu);
+        len += sprintf(page + off + len, "  wrx_ethcrc_err_pdu_bytes   = %d\n", WAN_MIB_TABLE[i].wrx_ethcrc_err_pdu_bytes);
+        len += sprintf(page + off + len, "  wrx_nodesc_drop_pdu        = %d\n", WAN_MIB_TABLE[i].wrx_nodesc_drop_pdu);
+        len += sprintf(page + off + len, "  wrx_len_violation_drop_pdu = %d\n", WAN_MIB_TABLE[i].wrx_len_violation_drop_pdu);
+        len += sprintf(page + off + len, "  wrx_idle_bytes             = %d\n", WAN_MIB_TABLE[i].wrx_idle_bytes);
+        len += sprintf(page + off + len, "  wrx_nonidle_cw             = %d\n", WAN_MIB_TABLE[i].wrx_nonidle_cw);
+        len += sprintf(page + off + len, "  wrx_idle_cw                = %d\n", WAN_MIB_TABLE[i].wrx_idle_cw);
+        len += sprintf(page + off + len, "  wrx_err_cw                 = %d\n", WAN_MIB_TABLE[i].wrx_err_cw);
+        len += sprintf(page + off + len, "  wtx_total_pdu              = %d\n", WAN_MIB_TABLE[i].wtx_total_pdu);
+        len += sprintf(page + off + len, "  wtx_total_bytes            = %d\n", WAN_MIB_TABLE[i].wtx_total_bytes);
+    }
+
+    *eof = 1;
+
+    return len;
+}
+
+static int proc_write_wanmib(struct file *file, const char *buf, unsigned long count, void *data)
+{
+    char str[2048];
+    char *p;
+    int len, rlen;
+
+    int i;
+
+    len = count < sizeof(str) ? count : sizeof(str) - 1;
+    rlen = len - copy_from_user(str, buf, len);
+    while ( rlen && str[rlen - 1] <= ' ' )
+        rlen--;
+    str[rlen] = 0;
+    for ( p = str; *p && *p <= ' '; p++, rlen-- );
+    if ( !*p )
+        return count;
+
+    if ( stricmp(p, "clear") == 0 || stricmp(p, "clean") == 0 ) {
+        for ( i = 0; i < 2; i++ )
+            memset((void*)&WAN_MIB_TABLE[i], 0, sizeof(WAN_MIB_TABLE[i]));
+    }
+
+    return count;
+}
+
+#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC
+
+static int proc_read_genconf(char *page, char **start, off_t off, int count, int *eof, void *data)
+{
+    int len = 0;
+    int len_max = off + count;
+    char *pstr;
+    char str[2048];
+    int llen = 0;
+    int i;
+    unsigned long bit;
+
+    pstr = *start = page;
+
+    __sync();
+
+    llen += sprintf(str + llen, "CFG_WAN_WRDES_DELAY (0x%08X): %d\n", (unsigned int)CFG_WAN_WRDES_DELAY, IFX_REG_R32(CFG_WAN_WRDES_DELAY));
+    llen += sprintf(str + llen, "CFG_WRX_DMACH_ON    (0x%08X):", (unsigned int)CFG_WRX_DMACH_ON);
+    for ( i = 0, bit = 1; i < MAX_RX_DMA_CHANNEL_NUMBER; i++, bit <<= 1 )
+        llen += sprintf(str + llen, " %d - %s", i, (IFX_REG_R32(CFG_WRX_DMACH_ON) & bit) ? "on " : "off");
+    llen += sprintf(str + llen, "\n");
+    llen += sprintf(str + llen, "CFG_WTX_DMACH_ON    (0x%08X):", (unsigned int)CFG_WTX_DMACH_ON);
+    for ( i = 0, bit = 1; i < MAX_TX_DMA_CHANNEL_NUMBER; i++, bit <<= 1 )
+        llen += sprintf(str + llen, " %d - %s", i, (IFX_REG_R32(CFG_WTX_DMACH_ON) & bit) ? "on " : "off");
+    llen += sprintf(str + llen, "\n");
+    llen += sprintf(str + llen, "CFG_WRX_LOOK_BITTH  (0x%08X): %d\n", (unsigned int)CFG_WRX_LOOK_BITTH, IFX_REG_R32(CFG_WRX_LOOK_BITTH));
+    llen += sprintf(str + llen, "CFG_ETH_EFMTC_CRC   (0x%08X): rx_tc_crc_len    - %2d,  rx_tc_crc_check    - %s\n", (unsigned int)CFG_ETH_EFMTC_CRC, CFG_ETH_EFMTC_CRC->rx_tc_crc_len, CFG_ETH_EFMTC_CRC->rx_tc_crc_check ? " on" : "off");
+    llen += sprintf(str + llen, "                                  rx_eth_crc_check - %s, rx_eth_crc_present - %s\n",   CFG_ETH_EFMTC_CRC->rx_eth_crc_check ? " on" : "off", CFG_ETH_EFMTC_CRC->rx_eth_crc_present ? " on" : "off");
+    llen += sprintf(str + llen, "                                  tx_tc_crc_len    - %2d,  tx_tc_crc_gen      - %s\n", CFG_ETH_EFMTC_CRC->tx_tc_crc_len, CFG_ETH_EFMTC_CRC->tx_tc_crc_gen ? " on" : "off");
+    llen += sprintf(str + llen, "                                  tx_eth_crc_gen   - %s\n", CFG_ETH_EFMTC_CRC->tx_eth_crc_gen ? " on" : "off");
+
+    llen += sprintf(str + llen, "RX Port:\n");
+    for ( i = 0; i < MAX_RX_DMA_CHANNEL_NUMBER; i++ )
+        llen += sprintf(str + llen, "  %d (0x%08X). mfs - %5d, dmach - %d, local_state - %d, partner_state - %d\n", i, (unsigned int)WRX_PORT_CONFIG(i), WRX_PORT_CONFIG(i)->mfs, WRX_PORT_CONFIG(i)->dmach, WRX_PORT_CONFIG(i)->local_state, WRX_PORT_CONFIG(i)->partner_state);
+    llen += sprintf(str + llen, "RX DMA Channel:\n");
+    for ( i = 0; i < MAX_RX_DMA_CHANNEL_NUMBER; i++ )
+        llen += sprintf(str + llen, "  %d (0x%08X). desba - 0x%08X (0x%08X), deslen - %d, vlddes - %d\n", i, (unsigned int)WRX_DMA_CHANNEL_CONFIG(i), WRX_DMA_CHANNEL_CONFIG(i)->desba, ((unsigned int)WRX_DMA_CHANNEL_CONFIG(i)->desba << 2) | KSEG1, WRX_DMA_CHANNEL_CONFIG(i)->deslen, WRX_DMA_CHANNEL_CONFIG(i)->vlddes);
+
+    llen += sprintf(str + llen, "TX Port:\n");
+    for ( i = 0; i < MAX_TX_DMA_CHANNEL_NUMBER; i++ )
+        llen += sprintf(str + llen, "  %d (0x%08X). tx_cwth2 - %d, tx_cwth1 - %d\n", i, (unsigned int)WTX_PORT_CONFIG(i), WTX_PORT_CONFIG(i)->tx_cwth2, WTX_PORT_CONFIG(i)->tx_cwth1);
+    llen += sprintf(str + llen, "TX DMA Channel:\n");
+    for ( i = 0; i < MAX_TX_DMA_CHANNEL_NUMBER; i++ )
+        llen += sprintf(str + llen, "  %d (0x%08X). desba - 0x%08X (0x%08X), deslen - %d, vlddes - %d\n", i, (unsigned int)WTX_DMA_CHANNEL_CONFIG(i), WTX_DMA_CHANNEL_CONFIG(i)->desba, ((unsigned int)WTX_DMA_CHANNEL_CONFIG(i)->desba << 2) | KSEG1, WTX_DMA_CHANNEL_CONFIG(i)->deslen, WTX_DMA_CHANNEL_CONFIG(i)->vlddes);
+
+    if ( len <= off && len + llen > off )
+    {
+        memcpy(pstr, str + off - len, len + llen - off);
+        pstr += len + llen - off;
+    }
+    else if ( len > off )
+    {
+        memcpy(pstr, str, llen);
+        pstr += llen;
+    }
+    len += llen;
+    if ( len >= len_max )
+        goto PROC_READ_GENCONF_OVERRUN_END;
+
+    *eof = 1;
+
+    return len - off;
+
+PROC_READ_GENCONF_OVERRUN_END:
+    return len - llen - off;
+}
+
+#endif  //  defined(ENABLE_FW_PROC) && ENABLE_FW_PROC
+
+#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC
+
+static int proc_read_dbg(char *page, char **start, off_t off, int count, int *eof, void *data)
+{
+    int len = 0;
+
+    len += sprintf(page + off + len, "error print      - %s\n", (ifx_ptm_dbg_enable & DBG_ENABLE_MASK_ERR)              ? "enabled" : "disabled");
+    len += sprintf(page + off + len, "debug print      - %s\n", (ifx_ptm_dbg_enable & DBG_ENABLE_MASK_DEBUG_PRINT)      ? "enabled" : "disabled");
+    len += sprintf(page + off + len, "assert           - %s\n", (ifx_ptm_dbg_enable & DBG_ENABLE_MASK_ASSERT)           ? "enabled" : "disabled");
+    len += sprintf(page + off + len, "dump rx skb      - %s\n", (ifx_ptm_dbg_enable & DBG_ENABLE_MASK_DUMP_SKB_RX)      ? "enabled" : "disabled");
+    len += sprintf(page + off + len, "dump tx skb      - %s\n", (ifx_ptm_dbg_enable & DBG_ENABLE_MASK_DUMP_SKB_TX)      ? "enabled" : "disabled");
+    len += sprintf(page + off + len, "mac swap         - %s\n", (ifx_ptm_dbg_enable & DBG_ENABLE_MASK_MAC_SWAP)         ? "enabled" : "disabled");
+
+    *eof = 1;
+
+    return len;
+}
+
+static int proc_write_dbg(struct file *file, const char *buf, unsigned long count, void *data)
+{
+    static const char *dbg_enable_mask_str[] = {
+        " error print",
+        " err",
+        " debug print",
+        " dbg",
+        " assert",
+        " assert",
+        " dump rx skb",
+        " rx",
+        " dump tx skb",
+        " tx",
+        " dump init",
+        " init",
+        " dump qos",
+        " qos",
+        " mac swap",
+        " swap",
+        " all"
+    };
+    static const int dbg_enable_mask_str_len[] = {
+        12, 4,
+        12, 4,
+        7,  7,
+        12, 3,
+        12, 3,
+        10, 5,
+        9,  4,
+        9,  5,
+        4
+    };
+    unsigned int dbg_enable_mask[] = {
+        DBG_ENABLE_MASK_ERR,
+        DBG_ENABLE_MASK_DEBUG_PRINT,
+        DBG_ENABLE_MASK_ASSERT,
+        DBG_ENABLE_MASK_DUMP_SKB_RX,
+        DBG_ENABLE_MASK_DUMP_SKB_TX,
+        DBG_ENABLE_MASK_DUMP_INIT,
+        DBG_ENABLE_MASK_DUMP_QOS,
+        DBG_ENABLE_MASK_MAC_SWAP,
+        DBG_ENABLE_MASK_ALL
+    };
+
+    char str[2048];
+    char *p;
+
+    int len, rlen;
+
+    int f_enable = 0;
+    int i;
+
+    len = count < sizeof(str) ? count : sizeof(str) - 1;
+    rlen = len - copy_from_user(str, buf, len);
+    while ( rlen && str[rlen - 1] <= ' ' )
+        rlen--;
+    str[rlen] = 0;
+    for ( p = str; *p && *p <= ' '; p++, rlen-- );
+    if ( !*p )
+        return 0;
+
+    //  debugging feature for enter/leave showtime
+    if ( strincmp(p, "enter", 5) == 0 && ifx_mei_atm_showtime_enter != NULL )
+        ifx_mei_atm_showtime_enter(NULL, NULL);
+    else if ( strincmp(p, "leave", 5) == 0 && ifx_mei_atm_showtime_exit != NULL )
+        ifx_mei_atm_showtime_exit();
+
+    if ( strincmp(p, "enable", 6) == 0 ) {
+        p += 6;
+        f_enable = 1;
+    }
+    else if ( strincmp(p, "disable", 7) == 0 ) {
+        p += 7;
+        f_enable = -1;
+    }
+    else if ( strincmp(p, "help", 4) == 0 || *p == '?' ) {
+        printk("echo <enable/disable> [err/dbg/assert/rx/tx/init/qos/swap/all] > /proc/driver/ifx_ptm/dbg\n");
+    }
+
+    if ( f_enable ) {
+        if ( *p == 0 ) {
+            if ( f_enable > 0 )
+                ifx_ptm_dbg_enable |= DBG_ENABLE_MASK_ALL & ~DBG_ENABLE_MASK_MAC_SWAP;
+            else
+                ifx_ptm_dbg_enable &= ~DBG_ENABLE_MASK_ALL | DBG_ENABLE_MASK_MAC_SWAP;
+        }
+        else {
+            do {
+                for ( i = 0; i < ARRAY_SIZE(dbg_enable_mask_str); i++ )
+                    if ( strincmp(p, dbg_enable_mask_str[i], dbg_enable_mask_str_len[i]) == 0 ) {
+                        if ( f_enable > 0 )
+                            ifx_ptm_dbg_enable |= dbg_enable_mask[i >> 1];
+                        else
+                            ifx_ptm_dbg_enable &= ~dbg_enable_mask[i >> 1];
+                        p += dbg_enable_mask_str_len[i];
+                        break;
+                    }
+            } while ( i < ARRAY_SIZE(dbg_enable_mask_str) );
+        }
+    }
+
+    return count;
+}
+
+#endif  //  defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC
+
+static INLINE int stricmp(const char *p1, const char *p2)
+{
+    int c1, c2;
+
+    while ( *p1 && *p2 )
+    {
+        c1 = *p1 >= 'A' && *p1 <= 'Z' ? *p1 + 'a' - 'A' : *p1;
+        c2 = *p2 >= 'A' && *p2 <= 'Z' ? *p2 + 'a' - 'A' : *p2;
+        if ( (c1 -= c2) )
+            return c1;
+        p1++;
+        p2++;
+    }
+
+    return *p1 - *p2;
+}
+
+#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC
+static INLINE int strincmp(const char *p1, const char *p2, int n)
+{
+    int c1 = 0, c2;
+
+    while ( n && *p1 && *p2 )
+    {
+        c1 = *p1 >= 'A' && *p1 <= 'Z' ? *p1 + 'a' - 'A' : *p1;
+        c2 = *p2 >= 'A' && *p2 <= 'Z' ? *p2 + 'a' - 'A' : *p2;
+        if ( (c1 -= c2) )
+            return c1;
+        p1++;
+        p2++;
+        n--;
+    }
+
+    return n ? *p1 - *p2 : c1;
+}
+#endif
+
+static INLINE int ifx_ptm_version(char *buf)
+{
+    int len = 0;
+    unsigned int major, minor;
+
+    ifx_ptm_get_fw_ver(&major, &minor);
+
+    len += sprintf(buf + len, "PTM %d.%d.%d", IFX_PTM_VER_MAJOR, IFX_PTM_VER_MID, IFX_PTM_VER_MINOR);
+    len += sprintf(buf + len, "    PTM (E1) firmware version %d.%d\n", major, minor);
+
+    return len;
+}
+
+static INLINE void check_parameters(void)
+{
+    /*  There is a delay between PPE write descriptor and descriptor is       */
+    /*  really stored in memory. Host also has this delay when writing        */
+    /*  descriptor. So PPE will use this value to determine if the write      */
+    /*  operation makes effect.                                               */
+    if ( write_desc_delay < 0 )
+        write_desc_delay = 0;
+
+    /*  Because of the limitation of length field in descriptors, the packet  */
+    /*  size could not be larger than 64K minus overhead size.                */
+    if ( rx_max_packet_size < ETH_MIN_FRAME_LENGTH )
+        rx_max_packet_size = ETH_MIN_FRAME_LENGTH;
+    else if ( rx_max_packet_size > 65536 - 1 )
+        rx_max_packet_size = 65536 - 1;
+
+    if ( dma_rx_descriptor_length < 2 )
+        dma_rx_descriptor_length = 2;
+    if ( dma_tx_descriptor_length < 2 )
+        dma_tx_descriptor_length = 2;
+}
+
+static INLINE int init_priv_data(void)
+{
+    void *p;
+    int i;
+    struct rx_descriptor rx_desc = {0};
+    struct sk_buff *skb;
+    volatile struct rx_descriptor *p_rx_desc;
+    volatile struct tx_descriptor *p_tx_desc;
+    struct sk_buff **ppskb;
+
+    //  clear ptm private data structure
+    memset(&g_ptm_priv_data, 0, sizeof(g_ptm_priv_data));
+
+    //  allocate memory for RX descriptors
+    p = kzalloc(MAX_ITF_NUMBER * dma_rx_descriptor_length * sizeof(struct rx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL);
+    if ( p == NULL )
+        return -1;
+    dma_cache_inv((unsigned long)p, MAX_ITF_NUMBER * dma_rx_descriptor_length * sizeof(struct rx_descriptor) + DESC_ALIGNMENT);
+    g_ptm_priv_data.rx_desc_base = p;
+    //p = (void *)((((unsigned int)p + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1);
+
+    //  allocate memory for TX descriptors
+    p = kzalloc(MAX_ITF_NUMBER * dma_tx_descriptor_length * sizeof(struct tx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL);
+    if ( p == NULL )
+        return -1;
+    dma_cache_inv((unsigned long)p, MAX_ITF_NUMBER * dma_tx_descriptor_length * sizeof(struct tx_descriptor) + DESC_ALIGNMENT);
+    g_ptm_priv_data.tx_desc_base = p;
+
+    //  allocate memroy for TX skb pointers
+    p = kzalloc(MAX_ITF_NUMBER * dma_tx_descriptor_length * sizeof(struct sk_buff *) + 4, GFP_KERNEL);
+    if ( p == NULL )
+        return -1;
+    dma_cache_wback_inv((unsigned long)p, MAX_ITF_NUMBER * dma_tx_descriptor_length * sizeof(struct sk_buff *) + 4);
+    g_ptm_priv_data.tx_skb_base = p;
+
+    p_rx_desc = (volatile struct rx_descriptor *)((((unsigned int)g_ptm_priv_data.rx_desc_base + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1);
+    p_tx_desc = (volatile struct tx_descriptor *)((((unsigned int)g_ptm_priv_data.tx_desc_base + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1);
+    ppskb = (struct sk_buff **)(((unsigned int)g_ptm_priv_data.tx_skb_base + 3) & ~3);
+    for ( i = 0; i < MAX_ITF_NUMBER; i++ ) {
+        g_ptm_priv_data.itf[i].rx_desc = &p_rx_desc[i * dma_rx_descriptor_length];
+        g_ptm_priv_data.itf[i].tx_desc = &p_tx_desc[i * dma_tx_descriptor_length];
+        g_ptm_priv_data.itf[i].tx_skb = &ppskb[i * dma_tx_descriptor_length];
+    }
+
+    rx_desc.own     = 1;
+    rx_desc.c       = 0;
+    rx_desc.sop     = 1;
+    rx_desc.eop     = 1;
+    rx_desc.byteoff = RX_HEAD_MAC_ADDR_ALIGNMENT;
+    rx_desc.id      = 0;
+    rx_desc.err     = 0;
+    rx_desc.datalen = rx_max_packet_size;
+    for ( i = 0; i < MAX_ITF_NUMBER * dma_rx_descriptor_length; i++ ) {
+        skb = alloc_skb_rx();
+        if ( skb == NULL )
+            return -1;
+        rx_desc.dataptr = ((unsigned int)skb->data >> 2) & 0x0FFFFFFF;
+        p_rx_desc[i] = rx_desc;
+    }
+
+    return 0;
+}
+
+static INLINE void clear_priv_data(void)
+{
+    int i, j;
+    struct sk_buff *skb;
+
+    for ( i = 0; i < MAX_ITF_NUMBER; i++ ) {
+        if ( g_ptm_priv_data.itf[i].tx_skb != NULL ) {
+            for ( j = 0; j < dma_tx_descriptor_length; j++ )
+                if ( g_ptm_priv_data.itf[i].tx_skb[j] != NULL )
+                    dev_kfree_skb_any(g_ptm_priv_data.itf[i].tx_skb[j]);
+        }
+        if ( g_ptm_priv_data.itf[i].rx_desc != NULL ) {
+            for ( j = 0; j < dma_rx_descriptor_length; j++ ) {
+                if ( g_ptm_priv_data.itf[i].rx_desc[j].sop || g_ptm_priv_data.itf[i].rx_desc[j].eop ) {    //  descriptor initialized
+                    skb = get_skb_rx_pointer(g_ptm_priv_data.itf[i].rx_desc[j].dataptr);
+                    dev_kfree_skb_any(skb);
+                }
+            }
+        }
+    }
+
+    if ( g_ptm_priv_data.rx_desc_base != NULL )
+        kfree(g_ptm_priv_data.rx_desc_base);
+
+    if ( g_ptm_priv_data.tx_desc_base != NULL )
+        kfree(g_ptm_priv_data.tx_desc_base);
+
+    if ( g_ptm_priv_data.tx_skb_base != NULL )
+        kfree(g_ptm_priv_data.tx_skb_base);
+}
+
+static INLINE void init_tables(void)
+{
+    int i;
+    volatile unsigned int *p;
+    struct wrx_dma_channel_config rx_config = {0};
+    struct wtx_dma_channel_config tx_config = {0};
+    struct wrx_port_cfg_status    rx_port_cfg = { 0 };
+    struct wtx_port_cfg           tx_port_cfg = { 0 };
+
+    /*
+     *  CDM Block 1
+     */
+    IFX_REG_W32(CDM_CFG_RAM1_SET(0x00) | CDM_CFG_RAM0_SET(0x00), CDM_CFG);  //  CDM block 1 must be data memory and mapped to 0x5000 (dword addr)
+    p = CDM_DATA_MEMORY(0, 0);                                              //  Clear CDM block 1
+    for ( i = 0; i < CDM_DATA_MEMORY_DWLEN; i++, p++ )
+        IFX_REG_W32(0, p);
+
+    /*
+     *  General Registers
+     */
+    IFX_REG_W32(write_desc_delay, CFG_WAN_WRDES_DELAY);
+    IFX_REG_W32((1 << MAX_RX_DMA_CHANNEL_NUMBER) - 1, CFG_WRX_DMACH_ON);
+    IFX_REG_W32((1 << MAX_TX_DMA_CHANNEL_NUMBER) - 1, CFG_WTX_DMACH_ON);
+
+    IFX_REG_W32(8, CFG_WRX_LOOK_BITTH); // WAN RX EFM-TC Looking Threshold
+
+    IFX_REG_W32(eth_efmtc_crc_cfg, CFG_ETH_EFMTC_CRC);
+
+    /*
+     *  WRX DMA Channel Configuration Table
+     */
+    rx_config.deslen = dma_rx_descriptor_length;
+    rx_port_cfg.mfs = ETH_MAX_FRAME_LENGTH;
+    rx_port_cfg.local_state = 0;     // looking for sync
+    rx_port_cfg.partner_state = 0;   // parter receiver is out of sync
+
+    for ( i = 0; i < MAX_RX_DMA_CHANNEL_NUMBER; i++ ) {
+        rx_config.desba = ((unsigned int)g_ptm_priv_data.itf[i].rx_desc >> 2) & 0x0FFFFFFF;
+        *WRX_DMA_CHANNEL_CONFIG(i) = rx_config;
+
+        rx_port_cfg.dmach = i;
+        *WRX_PORT_CONFIG(i) = rx_port_cfg;
+    }
+
+    /*
+     *  WTX DMA Channel Configuration Table
+     */
+    tx_config.deslen = dma_tx_descriptor_length;
+    tx_port_cfg.tx_cwth1 = 5;
+    tx_port_cfg.tx_cwth2 = 4;
+
+    for ( i = 0; i < MAX_TX_DMA_CHANNEL_NUMBER; i++ ) {
+        tx_config.desba = ((unsigned int)g_ptm_priv_data.itf[i].tx_desc >> 2) & 0x0FFFFFFF;
+        *WTX_DMA_CHANNEL_CONFIG(i) = tx_config;
+
+        *WTX_PORT_CONFIG(i) = tx_port_cfg;
+    }
+}
+
+
+
+/*
+ * ####################################
+ *           Global Function
+ * ####################################
+ */
+
+static int ptm_showtime_enter(struct port_cell_info *port_cell, void *xdata_addr)
+{
+
+    g_showtime = 1;
+
+    printk("enter showtime\n");
+
+    return 0;
+}
+
+static int ptm_showtime_exit(void)
+{
+    if ( !g_showtime )
+        return -1;
+
+    g_showtime = 0;
+
+    printk("leave showtime\n");
+
+    return 0;
+}
+
+
+
+/*
+ * ####################################
+ *           Init/Cleanup API
+ * ####################################
+ */
+
+/*
+ *  Description:
+ *    Initialize global variables, PP32, comunication structures, register IRQ
+ *    and register device.
+ *  Input:
+ *    none
+ *  Output:
+ *    0    --- successful
+ *    else --- failure, usually it is negative value of error code
+ */
+static int __devinit ifx_ptm_init(void)
+{
+    int ret;
+    struct port_cell_info port_cell = {0};
+    void *xdata_addr = NULL;
+    int i;
+    char ver_str[256];
+
+    check_parameters();
+
+    ret = init_priv_data();
+    if ( ret != 0 ) {
+        err("INIT_PRIV_DATA_FAIL");
+        goto INIT_PRIV_DATA_FAIL;
+    }
+
+    ifx_ptm_init_chip();
+    init_tables();
+
+    for ( i = 0; i < ARRAY_SIZE(g_net_dev); i++ ) {
+        g_net_dev[i] = alloc_netdev(0, g_net_dev_name[i], ether_setup);
+        if ( g_net_dev[i] == NULL )
+            goto ALLOC_NETDEV_FAIL;
+        ptm_setup(g_net_dev[i], i);
+    }
+
+    for ( i = 0; i < ARRAY_SIZE(g_net_dev); i++ ) {
+        ret = register_netdev(g_net_dev[i]);
+        if ( ret != 0 )
+            goto REGISTER_NETDEV_FAIL;
+    }
+
+    /*  register interrupt handler  */
+    ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, IRQF_DISABLED, "ptm_mailbox_isr", &g_ptm_priv_data);
+    if ( ret ) {
+        if ( ret == -EBUSY ) {
+            err("IRQ may be occupied by other driver, please reconfig to disable it.");
+        }
+        else {
+            err("request_irq fail");
+        }
+        goto REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL;
+    }
+    disable_irq(PPE_MAILBOX_IGU1_INT);
+
+    ret = ifx_pp32_start(0);
+    if ( ret ) {
+        err("ifx_pp32_start fail!");
+        goto PP32_START_FAIL;
+    }
+    IFX_REG_W32(0, MBOX_IGU1_IER);
+    IFX_REG_W32(~0, MBOX_IGU1_ISRC);
+
+    enable_irq(PPE_MAILBOX_IGU1_INT);
+
+
+    proc_file_create();
+
+    port_cell.port_num = 1;
+    ifx_mei_atm_showtime_check(&g_showtime, &port_cell, &xdata_addr);
+
+    ifx_mei_atm_showtime_enter = ptm_showtime_enter;
+    ifx_mei_atm_showtime_exit  = ptm_showtime_exit;
+
+    ifx_ptm_version(ver_str);
+    printk(KERN_INFO "%s", ver_str);
+
+    printk("ifxmips_ptm: PTM init succeed\n");
+
+    return 0;
+
+PP32_START_FAIL:
+    free_irq(PPE_MAILBOX_IGU1_INT, &g_ptm_priv_data);
+REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL:
+    i = ARRAY_SIZE(g_net_dev);
+REGISTER_NETDEV_FAIL:
+    while ( i-- )
+        unregister_netdev(g_net_dev[i]);
+    i = ARRAY_SIZE(g_net_dev);
+ALLOC_NETDEV_FAIL:
+    while ( i-- ) {
+        free_netdev(g_net_dev[i]);
+        g_net_dev[i] = NULL;
+    }
+INIT_PRIV_DATA_FAIL:
+    clear_priv_data();
+    printk("ifxmips_ptm: PTM init failed\n");
+    return ret;
+}
+
+/*
+ *  Description:
+ *    Release memory, free IRQ, and deregister device.
+ *  Input:
+ *    none
+ *  Output:
+ *   none
+ */
+static void __exit ifx_ptm_exit(void)
+{
+    int i;
+
+    ifx_mei_atm_showtime_enter = NULL;
+    ifx_mei_atm_showtime_exit  = NULL;
+
+    proc_file_delete();
+
+
+    ifx_pp32_stop(0);
+
+    free_irq(PPE_MAILBOX_IGU1_INT, &g_ptm_priv_data);
+
+    for ( i = 0; i < ARRAY_SIZE(g_net_dev); i++ )
+        unregister_netdev(g_net_dev[i]);
+
+    for ( i = 0; i < ARRAY_SIZE(g_net_dev); i++ ) {
+        free_netdev(g_net_dev[i]);
+        g_net_dev[i] = NULL;
+    }
+
+    ifx_ptm_uninit_chip();
+
+    clear_priv_data();
+}
+
+module_init(ifx_ptm_init);
+module_exit(ifx_ptm_exit);
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_adsl.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_adsl.h
new file mode 100644
index 0000000..de307bf
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_adsl.h
@@ -0,0 +1,137 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_adsl.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (core functions for Danube/Amazon-SE/
+**                AR9)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 17 JUN 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+#ifndef IFXMIPS_PTM_ADSL_H
+#define IFXMIPS_PTM_ADSL_H
+
+
+
+#include <linux/version.h>
+#include <linux/netdevice.h>
+#include <lantiq_ptm.h>
+#include "ifxmips_ptm_common.h"
+#include "ifxmips_ptm_ppe_common.h"
+#include "ifxmips_ptm_fw_regs_adsl.h"
+
+#define CONFIG_IFXMIPS_DSL_CPE_MEI
+#define INT_NUM_IM2_IRL24	(INT_NUM_IM2_IRL0 + 24)
+
+#define IFX_REG_W32(_v, _r)               __raw_writel((_v), (volatile unsigned int *)(_r))
+#define IFX_REG_R32(_r)                    __raw_readl((volatile unsigned int *)(_r))
+#define IFX_REG_W32_MASK(_clr, _set, _r)   IFX_REG_W32((IFX_REG_R32((_r)) & ~(_clr)) | (_set), (_r))
+#define SET_BITS(x, msb, lsb, value)    (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
+
+
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+/*
+ *  Constant Definition
+ */
+#define ETH_WATCHDOG_TIMEOUT            (2 * HZ)
+
+/*
+ *  DMA RX/TX Channel Parameters
+ */
+#define MAX_ITF_NUMBER                  2
+#define MAX_RX_DMA_CHANNEL_NUMBER       MAX_ITF_NUMBER
+#define MAX_TX_DMA_CHANNEL_NUMBER       MAX_ITF_NUMBER
+#define DATA_BUFFER_ALIGNMENT           EMA_ALIGNMENT
+#define DESC_ALIGNMENT                  8
+
+/*
+ *  Ethernet Frame Definitions
+ */
+#define ETH_MAC_HEADER_LENGTH           14
+#define ETH_CRC_LENGTH                  4
+#define ETH_MIN_FRAME_LENGTH            64
+#define ETH_MAX_FRAME_LENGTH            (1518 + 4 * 2)
+
+/*
+ *  RX Frame Definitions
+ */
+#define RX_HEAD_MAC_ADDR_ALIGNMENT      2
+#define RX_TAIL_CRC_LENGTH              0   //  PTM firmware does not have ethernet frame CRC
+                                            //  The len in descriptor doesn't include ETH_CRC
+                                            //  because ETH_CRC may not present in some configuration
+
+
+
+/*
+ * ####################################
+ *              Data Type
+ * ####################################
+ */
+
+struct ptm_itf {
+    volatile struct rx_descriptor  *rx_desc;
+    unsigned int                    rx_desc_pos;
+
+    volatile struct tx_descriptor  *tx_desc;
+    unsigned int                    tx_desc_pos;
+    struct sk_buff                **tx_skb;
+
+    struct net_device_stats         stats;
+
+    struct napi_struct              napi;
+};
+
+struct ptm_priv_data {
+    struct ptm_itf                  itf[MAX_ITF_NUMBER];
+
+    void                           *rx_desc_base;
+    void                           *tx_desc_base;
+    void                           *tx_skb_base;
+};
+
+
+
+/*
+ * ####################################
+ *             Declaration
+ * ####################################
+ */
+
+extern unsigned int ifx_ptm_dbg_enable;
+
+extern void ifx_ptm_get_fw_ver(unsigned int *major, unsigned int *minor);
+
+extern void ifx_ptm_init_chip(void);
+extern void ifx_ptm_uninit_chip(void);
+
+extern int ifx_pp32_start(int pp32);
+extern void ifx_pp32_stop(int pp32);
+
+extern void ifx_reset_ppe(void);
+
+extern int ifx_ptm_proc_read_regs(char *page, char **start, off_t off, int count, int *eof, void *data);
+
+
+
+#endif  //  IFXMIPS_PTM_ADSL_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_amazon_se.c b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_amazon_se.c
new file mode 100644
index 0000000..077c900
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_amazon_se.c
@@ -0,0 +1,322 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_amazon_se.c
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver common source file (core functions)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+/*
+ * ####################################
+ *              Head File
+ * ####################################
+ */
+
+/*
+ *  Common Head File
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/ioctl.h>
+#include <asm/delay.h>
+
+/*
+ *  Chip Specific Head File
+ */
+#include <asm/ifx/ifx_types.h>
+#include <asm/ifx/ifx_regs.h>
+#include <asm/ifx/common_routines.h>
+#include <asm/ifx/ifx_pmu.h>
+#include <asm/ifx/ifx_rcu.h>
+#include "ifxmips_ptm_adsl.h"
+#include "ifxmips_ptm_fw_amazon_se.h"
+
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+/*
+ *  EMA Settings
+ */
+#define EMA_CMD_BUF_LEN      0x0040
+#define EMA_CMD_BASE_ADDR    (0x00001580 << 2)
+#define EMA_DATA_BUF_LEN     0x0100
+#define EMA_DATA_BASE_ADDR   (0x00000B00 << 2)
+#define EMA_WRITE_BURST      0x2
+#define EMA_READ_BURST       0x2
+
+
+
+/*
+ * ####################################
+ *             Declaration
+ * ####################################
+ */
+
+/*
+ *  Hardware Init/Uninit Functions
+ */
+static inline void init_pmu(void);
+static inline void uninit_pmu(void);
+static inline void reset_ppe(void);
+static inline void init_ema(void);
+static inline void init_mailbox(void);
+static inline void init_atm_tc(void);
+static inline void clear_share_buffer(void);
+
+
+
+/*
+ * ####################################
+ *            Local Variable
+ * ####################################
+ */
+
+
+
+/*
+ * ####################################
+ *            Local Function
+ * ####################################
+ */
+
+static inline void init_pmu(void)
+{
+    //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
+    //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
+    PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
+    PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
+    PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
+    //PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
+    PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
+    DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);
+}
+
+static inline void uninit_pmu(void)
+{
+    PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
+    PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
+    PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
+    //PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
+    PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
+    DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
+    //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
+}
+
+static inline void reset_ppe(void)
+{
+#ifdef MODULE
+    unsigned int etop_cfg;
+    unsigned int etop_mdio_cfg;
+    unsigned int etop_ig_plen_ctrl;
+    unsigned int enet_mac_cfg;
+
+    etop_cfg            = *IFX_PP32_ETOP_CFG;
+    etop_mdio_cfg       = *IFX_PP32_ETOP_MDIO_CFG;
+    etop_ig_plen_ctrl   = *IFX_PP32_ETOP_IG_PLEN_CTRL;
+    enet_mac_cfg        = *IFX_PP32_ENET_MAC_CFG;
+
+    *IFX_PP32_ETOP_CFG  = (*IFX_PP32_ETOP_CFG & ~0x03C0) | 0x0001;
+
+    //  reset PPE
+    ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_PTM);
+
+    *IFX_PP32_ETOP_MDIO_CFG     = etop_mdio_cfg;
+    *IFX_PP32_ETOP_IG_PLEN_CTRL = etop_ig_plen_ctrl;
+    *IFX_PP32_ENET_MAC_CFG      = enet_mac_cfg;
+    *IFX_PP32_ETOP_CFG          = etop_cfg;
+#endif
+}
+
+static inline void init_ema(void)
+{
+    //  Configure share buffer master selection
+    *SB_MST_PRI0 = 1;
+    *SB_MST_PRI1 = 1;
+
+    //  EMA Settings
+    IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG);
+    IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG);
+    IFX_REG_W32(0x000000FF, EMA_IER);
+    IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG);
+}
+
+static inline void init_mailbox(void)
+{
+    IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
+    IFX_REG_W32(0x00000000, MBOX_IGU1_IER);
+    IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC);
+    IFX_REG_W32(0x00000000, MBOX_IGU3_IER);
+}
+
+static inline void init_atm_tc(void)
+{
+    IFX_REG_W32(0x0F00,     DREG_AT_CTRL);
+    IFX_REG_W32(0x3C00,     DREG_AR_CTRL);
+    IFX_REG_W32(0x0,        DREG_AT_IDLE0);
+    IFX_REG_W32(0x0,        DREG_AT_IDLE1);
+    IFX_REG_W32(0x0,        DREG_AR_IDLE0);
+    IFX_REG_W32(0x0,        DREG_AR_IDLE1);
+    IFX_REG_W32(0x0,        RFBI_CFG);
+    IFX_REG_W32(0x0200,     SFSM_DBA0);
+    IFX_REG_W32(0x0800,     SFSM_DBA1);
+    IFX_REG_W32(0x0321,     SFSM_CBA0);
+    IFX_REG_W32(0x0921,     SFSM_CBA1);
+    IFX_REG_W32(0x14011,    SFSM_CFG0);
+    IFX_REG_W32(0x14011,    SFSM_CFG1);
+    IFX_REG_W32(0x0332,     FFSM_DBA0);
+    IFX_REG_W32(0x0932,     FFSM_DBA1);
+    IFX_REG_W32(0x3000C,    FFSM_CFG0);
+    IFX_REG_W32(0x3000C,    FFSM_CFG1);
+    IFX_REG_W32(0xF0D10000, FFSM_IDLE_HEAD_BC0);
+    IFX_REG_W32(0xF0D10000, FFSM_IDLE_HEAD_BC1);
+}
+
+static inline void clear_share_buffer(void)
+{
+    volatile u32 *p = SB_RAM0_ADDR(0);
+    unsigned int i;
+
+    for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN; i++ )
+        IFX_REG_W32(0, p++);
+}
+
+/*
+ *  Description:
+ *    Download PPE firmware binary code.
+ *  Input:
+ *    src       --- u32 *, binary code buffer
+ *    dword_len --- unsigned int, binary code length in DWORD (32-bit)
+ *  Output:
+ *    int       --- 0:    Success
+ *                  else:           Error Code
+ */
+static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
+{
+    volatile u32 *dest;
+
+    if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
+        || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
+        return -1;
+
+    if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )
+        IFX_REG_W32(0x00, CDM_CFG);
+    else
+        IFX_REG_W32(0x04, CDM_CFG);
+
+    /*  copy code   */
+    dest = CDM_CODE_MEMORY(0, 0);
+    while ( code_dword_len-- > 0 )
+        IFX_REG_W32(*code_src++, dest++);
+
+    /*  copy data   */
+    dest = CDM_DATA_MEMORY(0, 0);
+    while ( data_dword_len-- > 0 )
+        IFX_REG_W32(*data_src++, dest++);
+
+    return 0;
+}
+
+
+
+/*
+ * ####################################
+ *           Global Function
+ * ####################################
+ */
+
+extern void ifx_ptm_get_fw_ver(unsigned int *major, unsigned int *minor)
+{
+    ASSERT(major != NULL, "pointer is NULL");
+    ASSERT(minor != NULL, "pointer is NULL");
+
+    *major = FW_VER_ID->major;
+    *minor = FW_VER_ID->minor;
+}
+
+void ifx_ptm_init_chip(void)
+{
+    init_pmu();
+
+    reset_ppe();
+
+    init_ema();
+
+    init_mailbox();
+
+    init_atm_tc();
+
+    clear_share_buffer();
+}
+
+void ifx_ptm_uninit_chip(void)
+{
+    uninit_pmu();
+}
+
+/*
+ *  Description:
+ *    Initialize and start up PP32.
+ *  Input:
+ *    none
+ *  Output:
+ *    int  --- 0: Success
+ *             else:        Error Code
+ */
+int ifx_pp32_start(int pp32)
+{
+    int ret;
+
+    /*  download firmware   */
+    ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data));
+    if ( ret != 0 )
+        return ret;
+
+    /*  run PP32    */
+    IFX_REG_W32(DBG_CTRL_RESTART, PP32_DBG_CTRL(pp32));
+
+    /*  idle for a while to let PP32 init itself    */
+    udelay(10);
+
+    return 0;
+}
+
+/*
+ *  Description:
+ *    Halt PP32.
+ *  Input:
+ *    none
+ *  Output:
+ *    none
+ */
+void ifx_pp32_stop(int pp32)
+{
+    /*  halt PP32   */
+    IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL(pp32));
+}
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ar9.c b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ar9.c
new file mode 100644
index 0000000..777d5cf
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ar9.c
@@ -0,0 +1,376 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_ar9.c
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver common source file (core functions)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+/*
+ * ####################################
+ *              Head File
+ * ####################################
+ */
+
+/*
+ *  Common Head File
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/ioctl.h>
+#include <asm/delay.h>
+
+/*
+ *  Chip Specific Head File
+ */
+#include "ifxmips_ptm_adsl.h"
+#include "ifxmips_ptm_fw_ar9.h"
+
+#include <lantiq_soc.h>
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+/*
+ *  EMA Settings
+ */
+#define EMA_CMD_BUF_LEN      0x0040
+#define EMA_CMD_BASE_ADDR    (0x00001B80 << 2)
+#define EMA_DATA_BUF_LEN     0x0100
+#define EMA_DATA_BASE_ADDR   (0x00001C00 << 2)
+#define EMA_WRITE_BURST      0x2
+#define EMA_READ_BURST       0x2
+
+
+
+/*
+ * ####################################
+ *             Declaration
+ * ####################################
+ */
+
+/*
+ *  Hardware Init/Uninit Functions
+ */
+static inline void init_pmu(void);
+static inline void uninit_pmu(void);
+static inline void reset_ppe(void);
+static inline void init_ema(void);
+static inline void init_mailbox(void);
+static inline void init_atm_tc(void);
+static inline void clear_share_buffer(void);
+
+
+
+/*
+ * ####################################
+ *            Local Variable
+ * ####################################
+ */
+
+
+
+/*
+ * ####################################
+ *            Local Function
+ * ####################################
+ */
+
+#define IFX_PMU_MODULE_PPE_SLL01  BIT(19)
+#define IFX_PMU_MODULE_PPE_TC     BIT(21)
+#define IFX_PMU_MODULE_PPE_EMA    BIT(22)
+#define IFX_PMU_MODULE_PPE_QSB    BIT(18)
+#define IFX_PMU_MODULE_TPE       BIT(13)
+#define IFX_PMU_MODULE_DSL_DFE    BIT(9)
+
+
+static inline void init_pmu(void)
+{
+	ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 |
+		IFX_PMU_MODULE_PPE_TC |
+		IFX_PMU_MODULE_PPE_EMA |
+		IFX_PMU_MODULE_TPE |
+		IFX_PMU_MODULE_DSL_DFE);
+
+}
+
+static inline void uninit_pmu(void)
+{
+	ltq_pmu_disable(IFX_PMU_MODULE_PPE_SLL01 |
+		IFX_PMU_MODULE_PPE_TC |
+		IFX_PMU_MODULE_PPE_EMA |
+		IFX_PMU_MODULE_TPE |
+		IFX_PMU_MODULE_DSL_DFE);
+
+}
+
+static inline void reset_ppe(void)
+{
+#ifdef MODULE
+    //  reset PPE
+//    ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_PTM);
+#endif
+}
+
+static inline void init_ema(void)
+{
+    //  Configure share buffer master selection
+    IFX_REG_W32(1, SB_MST_PRI0);
+    IFX_REG_W32(1, SB_MST_PRI1);
+
+    //  EMA Settings
+    IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG);
+    IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG);
+    IFX_REG_W32(0x000000FF, EMA_IER);
+    IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG);
+}
+
+static inline void init_mailbox(void)
+{
+    IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
+    IFX_REG_W32(0x00000000, MBOX_IGU1_IER);
+    IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC);
+    IFX_REG_W32(0x00000000, MBOX_IGU3_IER);
+}
+
+static inline void init_atm_tc(void)
+{
+    IFX_REG_W32(0x0,        RFBI_CFG);
+    IFX_REG_W32(0x1800,     SFSM_DBA0);
+    IFX_REG_W32(0x1921,     SFSM_DBA1);
+    IFX_REG_W32(0x1A42,     SFSM_CBA0);
+    IFX_REG_W32(0x1A53,     SFSM_CBA1);
+    IFX_REG_W32(0x14011,    SFSM_CFG0);
+    IFX_REG_W32(0x14011,    SFSM_CFG1);
+    IFX_REG_W32(0x1000,     FFSM_DBA0);
+    IFX_REG_W32(0x1700,     FFSM_DBA1);
+    IFX_REG_W32(0x3000C,    FFSM_CFG0);
+    IFX_REG_W32(0x3000C,    FFSM_CFG1);
+    IFX_REG_W32(0xF0D10000, FFSM_IDLE_HEAD_BC0);
+    IFX_REG_W32(0xF0D10000, FFSM_IDLE_HEAD_BC1);
+
+    /*
+     *  0. Backup port2 value to temp
+     *  1. Disable CPU port2 in switch (link and learning)
+     *  2. wait for a while
+     *  3. Configure DM register and counter
+     *  4. restore temp to CPU port2 in switch
+     *  This code will cause network to stop working if there are heavy
+     *  traffic during bootup. This part should be moved to switch and use
+     *  the same code as ATM
+     */
+    {
+        int i;
+        u32 temp;
+
+        temp = IFX_REG_R32(SW_P2_CTL);
+
+        IFX_REG_W32(0x40020000, SW_P2_CTL);
+        for (i = 0; i < 200; i++)
+            udelay(2000);
+
+        IFX_REG_W32(0x00007028, DM_RXCFG);
+        IFX_REG_W32(0x00007028, DS_RXCFG);
+
+        IFX_REG_W32(0x00001100, DM_RXDB);
+        IFX_REG_W32(0x00001100, DS_RXDB);
+
+        IFX_REG_W32(0x00001600, DM_RXCB);
+        IFX_REG_W32(0x00001600, DS_RXCB);
+
+        /*
+         * For dynamic, must reset these counters,
+         * For once initialization, don't need to reset these counters
+         */
+        IFX_REG_W32(0x0, DM_RXPGCNT);
+        IFX_REG_W32(0x0, DS_RXPGCNT);
+        IFX_REG_W32(0x0, DM_RXPKTCNT);
+
+        IFX_REG_W32_MASK(0, 0x80000000, DM_RXCFG);
+        IFX_REG_W32_MASK(0, 0x8000, DS_RXCFG);
+
+        udelay(2000);
+        IFX_REG_W32(temp, SW_P2_CTL);
+        udelay(2000);
+    }
+}
+
+static inline void clear_share_buffer(void)
+{
+    volatile u32 *p = SB_RAM0_ADDR(0);
+    unsigned int i;
+
+    for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN + SB_RAM4_DWLEN; i++ )
+        IFX_REG_W32(0, p++);
+}
+
+/*
+ *  Description:
+ *    Download PPE firmware binary code.
+ *  Input:
+ *    src       --- u32 *, binary code buffer
+ *    dword_len --- unsigned int, binary code length in DWORD (32-bit)
+ *  Output:
+ *    int       --- 0:    Success
+ *                  else:           Error Code
+ */
+static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
+{
+    volatile u32 *dest;
+
+    if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
+        || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
+        return -1;
+
+    if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )
+        IFX_REG_W32(0x00, CDM_CFG);
+    else
+        IFX_REG_W32(0x04, CDM_CFG);
+
+    /*  copy code   */
+    dest = CDM_CODE_MEMORY(0, 0);
+    while ( code_dword_len-- > 0 )
+        IFX_REG_W32(*code_src++, dest++);
+
+    /*  copy data   */
+    dest = CDM_DATA_MEMORY(0, 0);
+    while ( data_dword_len-- > 0 )
+        IFX_REG_W32(*data_src++, dest++);
+
+    return 0;
+}
+
+
+
+/*
+ * ####################################
+ *           Global Function
+ * ####################################
+ */
+
+void ifx_ptm_get_fw_ver(unsigned int *major, unsigned int *minor)
+{
+    ASSERT(major != NULL, "pointer is NULL");
+    ASSERT(minor != NULL, "pointer is NULL");
+
+    *major = FW_VER_ID->major;
+    *minor = FW_VER_ID->minor;
+}
+
+void ifx_ptm_init_chip(void)
+{
+    init_pmu();
+
+    reset_ppe();
+
+    init_ema();
+
+    init_mailbox();
+
+    init_atm_tc();
+
+    clear_share_buffer();
+}
+
+void ifx_ptm_uninit_chip(void)
+{
+    uninit_pmu();
+}
+
+/*
+ *  Description:
+ *    Initialize and start up PP32.
+ *  Input:
+ *    none
+ *  Output:
+ *    int  --- 0: Success
+ *             else:        Error Code
+ */
+int ifx_pp32_start(int pp32)
+{
+    int ret;
+
+    /*  download firmware   */
+    ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data));
+    if ( ret != 0 )
+        return ret;
+
+    /*  run PP32    */
+    IFX_REG_W32(DBG_CTRL_RESTART, PP32_DBG_CTRL(0));
+
+    /*  idle for a while to let PP32 init itself    */
+    udelay(10);
+
+    return 0;
+}
+
+/*
+ *  Description:
+ *    Halt PP32.
+ *  Input:
+ *    none
+ *  Output:
+ *    none
+ */
+void ifx_pp32_stop(int pp32)
+{
+    /*  halt PP32   */
+    IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL(0));
+}
+
+int ifx_ptm_proc_read_regs(char *page, char **start, off_t off, int count, int *eof, void *data)
+{
+    int len = 0;
+
+    len += sprintf(page + off + len, "EMA:\n");
+    len += sprintf(page + off + len, "  SB_MST_PRI0 - 0x%08X, SB_MST_PRI1 - 0x%08X\n", IFX_REG_R32(SB_MST_PRI0), IFX_REG_R32(SB_MST_PRI1));
+    len += sprintf(page + off + len, "  EMA_CMDCFG  - 0x%08X, EMA_DATACFG - 0x%08X\n", IFX_REG_R32(EMA_CMDCFG), IFX_REG_R32(EMA_DATACFG));
+    len += sprintf(page + off + len, "  EMA_IER     - 0x%08X, EMA_CFG     - 0x%08X\n", IFX_REG_R32(EMA_IER), IFX_REG_R32(EMA_CFG));
+
+    len += sprintf(page + off + len, "Mailbox:\n");
+    len += sprintf(page + off + len, "  MBOX_IGU1_IER - 0x%08X, MBOX_IGU1_ISR - 0x%08X\n", IFX_REG_R32(MBOX_IGU1_IER), IFX_REG_R32(MBOX_IGU1_ISR));
+    len += sprintf(page + off + len, "  MBOX_IGU3_IER - 0x%08X, MBOX_IGU3_ISR - 0x%08X\n", IFX_REG_R32(MBOX_IGU3_IER), IFX_REG_R32(MBOX_IGU3_ISR));
+
+    len += sprintf(page + off + len, "TC:\n");
+    len += sprintf(page + off + len, "  RFBI_CFG  - 0x%08X\n", IFX_REG_R32(RFBI_CFG));
+    len += sprintf(page + off + len, "  SFSM_DBA0 - 0x%08X, SFSM_CBA0 - 0x%08X, SFSM_CFG0 - 0x%08X\n", IFX_REG_R32(SFSM_DBA0), IFX_REG_R32(SFSM_CBA0), IFX_REG_R32(SFSM_CFG0));
+    len += sprintf(page + off + len, "  SFSM_DBA1 - 0x%08X, SFSM_CBA1 - 0x%08X, SFSM_CFG1 - 0x%08X\n", IFX_REG_R32(SFSM_DBA1), IFX_REG_R32(SFSM_CBA1), IFX_REG_R32(SFSM_CFG1));
+    len += sprintf(page + off + len, "  FFSM_DBA0 - 0x%08X, FFSM_CFG0 - 0x%08X, IDLE_HEAD - 0x%08X\n", IFX_REG_R32(FFSM_DBA0), IFX_REG_R32(FFSM_CFG0), IFX_REG_R32(FFSM_IDLE_HEAD_BC0));
+    len += sprintf(page + off + len, "  FFSM_DBA1 - 0x%08X, FFSM_CFG1 - 0x%08X, IDLE_HEAD - 0x%08X\n", IFX_REG_R32(FFSM_DBA1), IFX_REG_R32(FFSM_CFG1), IFX_REG_R32(FFSM_IDLE_HEAD_BC1));
+
+    len += sprintf(page + off + len, "DPlus:\n");
+    len += sprintf(page + off + len, "  DM_RXDB    - 0x%08X, DM_RXCB     - 0x%08X, DM_RXCFG - 0x%08X\n", IFX_REG_R32(DM_RXDB), IFX_REG_R32(DM_RXCB), IFX_REG_R32(DM_RXCFG));
+    len += sprintf(page + off + len, "  DM_RXPGCNT - 0x%08X, DM_RXPKTCNT - 0x%08X\n", IFX_REG_R32(DM_RXPGCNT), IFX_REG_R32(DM_RXPKTCNT));
+    len += sprintf(page + off + len, "  DS_RXDB    - 0x%08X, DS_RXCB     - 0x%08X, DS_RXCFG - 0x%08X\n", IFX_REG_R32(DS_RXDB), IFX_REG_R32(DS_RXCB), IFX_REG_R32(DS_RXCFG));
+    len += sprintf(page + off + len, "  DS_RXPGCNT - 0x%08X\n", IFX_REG_R32(DS_RXPGCNT));
+
+    *eof = 1;
+
+    return len;
+}
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_common.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_common.h
new file mode 100644
index 0000000..ccd19b1
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_common.h
@@ -0,0 +1,102 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_common.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (common definitions)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 17 JUN 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+#ifndef IFXMIPS_PTM_COMMON_H
+#define IFXMIPS_PTM_COMMON_H
+
+
+
+/*
+ * ####################################
+ *              Version No.
+ * ####################################
+ */
+
+#define IFX_PTM_VER_MAJOR               1
+#define IFX_PTM_VER_MID                 0
+#define IFX_PTM_VER_MINOR               27
+
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+/*
+ *  Compile Options
+ */
+
+#define ENABLE_DEBUG                    1
+
+#define ENABLE_ASSERT                   1
+
+#define INLINE
+
+#define DEBUG_DUMP_SKB                  1
+
+#define DEBUG_QOS                       1
+
+#define ENABLE_DBG_PROC                 1
+
+#define ENABLE_FW_PROC                  1
+
+#if defined(CONFIG_DSL_MEI_CPE_DRV) && !defined(CONFIG_IFXMIPS_DSL_CPE_MEI)
+  #define CONFIG_IFXMIPS_DSL_CPE_MEI    1
+#endif
+
+/*
+ *  Debug/Assert/Error Message
+ */
+
+#define DBG_ENABLE_MASK_ERR             (1 << 0)
+#define DBG_ENABLE_MASK_DEBUG_PRINT     (1 << 1)
+#define DBG_ENABLE_MASK_ASSERT          (1 << 2)
+#define DBG_ENABLE_MASK_DUMP_SKB_RX     (1 << 8)
+#define DBG_ENABLE_MASK_DUMP_SKB_TX     (1 << 9)
+#define DBG_ENABLE_MASK_DUMP_QOS        (1 << 10)
+#define DBG_ENABLE_MASK_DUMP_INIT       (1 << 11)
+#define DBG_ENABLE_MASK_MAC_SWAP        (1 << 12)
+#define DBG_ENABLE_MASK_ALL             (DBG_ENABLE_MASK_ERR | DBG_ENABLE_MASK_DEBUG_PRINT | DBG_ENABLE_MASK_ASSERT | DBG_ENABLE_MASK_DUMP_SKB_RX | DBG_ENABLE_MASK_DUMP_SKB_TX | DBG_ENABLE_MASK_DUMP_QOS | DBG_ENABLE_MASK_DUMP_INIT | DBG_ENABLE_MASK_MAC_SWAP)
+
+#define err(format, arg...)             do { if ( (ifx_ptm_dbg_enable & DBG_ENABLE_MASK_ERR) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 )
+
+#if defined(ENABLE_DEBUG) && ENABLE_DEBUG
+  #undef  dbg
+  #define dbg(format, arg...)           do { if ( (ifx_ptm_dbg_enable & DBG_ENABLE_MASK_DEBUG_PRINT) ) printk(KERN_WARNING __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 )
+#else
+  #if !defined(dbg)
+    #define dbg(format, arg...)
+  #endif
+#endif
+
+#if defined(ENABLE_ASSERT) && ENABLE_ASSERT
+  #define ASSERT(cond, format, arg...)  do { if ( (ifx_ptm_dbg_enable & DBG_ENABLE_MASK_ASSERT) && !(cond) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 )
+#else
+  #define ASSERT(cond, format, arg...)
+#endif
+
+
+
+#endif  //  IFXMIPS_PTM_COMMON_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_danube.c b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_danube.c
new file mode 100644
index 0000000..279b03b
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_danube.c
@@ -0,0 +1,317 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_danube.c
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver common source file (core functions)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+/*
+ * ####################################
+ *              Head File
+ * ####################################
+ */
+
+/*
+ *  Common Head File
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/ioctl.h>
+#include <linux/delay.h>
+
+/*
+ *  Chip Specific Head File
+ */
+#include "ifxmips_ptm_adsl.h"
+#include "ifxmips_ptm_fw_danube.h"
+
+#include <lantiq_soc.h>
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+/*
+ *  EMA Settings
+ */
+#define EMA_CMD_BUF_LEN      0x0040
+#define EMA_CMD_BASE_ADDR    (0x00001580 << 2)
+#define EMA_DATA_BUF_LEN     0x0100
+#define EMA_DATA_BASE_ADDR   (0x00000B00 << 2)
+#define EMA_WRITE_BURST      0x2
+#define EMA_READ_BURST       0x2
+
+
+
+/*
+ * ####################################
+ *             Declaration
+ * ####################################
+ */
+
+/*
+ *  Hardware Init/Uninit Functions
+ */
+static inline void init_pmu(void);
+static inline void uninit_pmu(void);
+static inline void reset_ppe(void);
+static inline void init_ema(void);
+static inline void init_mailbox(void);
+static inline void init_atm_tc(void);
+static inline void clear_share_buffer(void);
+
+
+
+/*
+ * ####################################
+ *            Local Variable
+ * ####################################
+ */
+
+
+#define IFX_PMU_MODULE_PPE_SLL01  BIT(19)
+#define IFX_PMU_MODULE_PPE_TC     BIT(21)
+#define IFX_PMU_MODULE_PPE_EMA    BIT(22)
+#define IFX_PMU_MODULE_PPE_QSB    BIT(18)
+#define IFX_PMU_MODULE_TPE       BIT(13)
+#define IFX_PMU_MODULE_DSL_DFE    BIT(9)
+
+/*
+ * ####################################
+ *            Local Function
+ * ####################################
+ */
+
+static inline void init_pmu(void)
+{
+	ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 |
+		IFX_PMU_MODULE_PPE_TC |
+		IFX_PMU_MODULE_PPE_EMA |
+		IFX_PMU_MODULE_TPE |
+		IFX_PMU_MODULE_DSL_DFE);
+}
+
+static inline void uninit_pmu(void)
+{
+	ltq_pmu_disable(IFX_PMU_MODULE_PPE_SLL01 |
+		IFX_PMU_MODULE_PPE_TC |
+		IFX_PMU_MODULE_PPE_EMA |
+		IFX_PMU_MODULE_TPE |
+		IFX_PMU_MODULE_DSL_DFE);
+}
+
+static inline void reset_ppe(void)
+{
+#ifdef MODULE
+    /*unsigned int etop_cfg;
+    unsigned int etop_mdio_cfg;
+    unsigned int etop_ig_plen_ctrl;
+    unsigned int enet_mac_cfg;
+
+    etop_cfg            = *IFX_PP32_ETOP_CFG;
+    etop_mdio_cfg       = *IFX_PP32_ETOP_MDIO_CFG;
+    etop_ig_plen_ctrl   = *IFX_PP32_ETOP_IG_PLEN_CTRL;
+    enet_mac_cfg        = *IFX_PP32_ENET_MAC_CFG;
+
+    *IFX_PP32_ETOP_CFG &= ~0x03C0;
+
+    //  reset PPE
+    ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_PTM);
+
+    *IFX_PP32_ETOP_MDIO_CFG     = etop_mdio_cfg;
+    *IFX_PP32_ETOP_IG_PLEN_CTRL = etop_ig_plen_ctrl;
+    *IFX_PP32_ENET_MAC_CFG      = enet_mac_cfg;
+    *IFX_PP32_ETOP_CFG          = etop_cfg;*/
+#endif
+}
+
+static inline void init_ema(void)
+{
+    //  Configure share buffer master selection
+	*SB_MST_SEL |= 0x03;
+
+    //  EMA Settings
+    IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG);
+    IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG);
+    IFX_REG_W32(0x000000FF, EMA_IER);
+    IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG);
+}
+
+static inline void init_mailbox(void)
+{
+    IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
+    IFX_REG_W32(0x00000000, MBOX_IGU1_IER);
+    IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC);
+    IFX_REG_W32(0x00000000, MBOX_IGU3_IER);
+}
+
+static inline void init_atm_tc(void)
+{
+    IFX_REG_W32(0x0F00,     DREG_AT_CTRL);
+    IFX_REG_W32(0x3C00,     DREG_AR_CTRL);
+    IFX_REG_W32(0x0,        DREG_AT_IDLE0);
+    IFX_REG_W32(0x0,        DREG_AT_IDLE1);
+    IFX_REG_W32(0x0,        DREG_AR_IDLE0);
+    IFX_REG_W32(0x0,        DREG_AR_IDLE1);
+    IFX_REG_W32(0x0,        RFBI_CFG);
+    IFX_REG_W32(0x1600,     SFSM_DBA0);
+    IFX_REG_W32(0x1721,     SFSM_DBA1);
+    IFX_REG_W32(0x1842,     SFSM_CBA0);
+    IFX_REG_W32(0x1853,     SFSM_CBA1);
+    IFX_REG_W32(0x14011,    SFSM_CFG0);
+    IFX_REG_W32(0x14011,    SFSM_CFG1);
+    IFX_REG_W32(0x1864,     FFSM_DBA0);
+    IFX_REG_W32(0x1930,     FFSM_DBA1);
+    IFX_REG_W32(0x3000C,    FFSM_CFG0);
+    IFX_REG_W32(0x3000C,    FFSM_CFG1);
+    IFX_REG_W32(0xF0D10000, FFSM_IDLE_HEAD_BC0);
+    IFX_REG_W32(0xF0D10000, FFSM_IDLE_HEAD_BC1);
+}
+
+static inline void clear_share_buffer(void)
+{
+    volatile u32 *p = SB_RAM0_ADDR(0);
+    unsigned int i;
+
+    for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ )
+        IFX_REG_W32(0, p++);
+}
+
+/*
+ *  Description:
+ *    Download PPE firmware binary code.
+ *  Input:
+ *    src       --- u32 *, binary code buffer
+ *    dword_len --- unsigned int, binary code length in DWORD (32-bit)
+ *  Output:
+ *    int       --- 0:    Success
+ *                  else:           Error Code
+ */
+static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
+{
+    volatile u32 *dest;
+
+    if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
+        || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
+        return -1;
+
+    if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )
+        IFX_REG_W32(0x00, CDM_CFG);
+    else
+        IFX_REG_W32(0x04, CDM_CFG);
+
+    /*  copy code   */
+    dest = CDM_CODE_MEMORY(0, 0);
+    while ( code_dword_len-- > 0 )
+        IFX_REG_W32(*code_src++, dest++);
+
+    /*  copy data   */
+    dest = CDM_DATA_MEMORY(0, 0);
+    while ( data_dword_len-- > 0 )
+        IFX_REG_W32(*data_src++, dest++);
+
+    return 0;
+}
+
+
+
+/*
+ * ####################################
+ *           Global Function
+ * ####################################
+ */
+
+extern void ifx_ptm_get_fw_ver(unsigned int *major, unsigned int *minor)
+{
+    ASSERT(major != NULL, "pointer is NULL");
+    ASSERT(minor != NULL, "pointer is NULL");
+
+    *major = FW_VER_ID->major;
+    *minor = FW_VER_ID->minor;
+}
+
+void ifx_ptm_init_chip(void)
+{
+    init_pmu();
+
+    reset_ppe();
+
+    init_ema();
+
+    init_mailbox();
+
+    init_atm_tc();
+
+    clear_share_buffer();
+}
+
+void ifx_ptm_uninit_chip(void)
+{
+    uninit_pmu();
+}
+
+/*
+ *  Description:
+ *    Initialize and start up PP32.
+ *  Input:
+ *    none
+ *  Output:
+ *    int  --- 0: Success
+ *             else:        Error Code
+ */
+int ifx_pp32_start(int pp32)
+{
+    int ret;
+
+    /*  download firmware   */
+    ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data));
+    if ( ret != 0 )
+        return ret;
+
+    /*  run PP32    */
+    IFX_REG_W32(DBG_CTRL_START_SET(1), PP32_DBG_CTRL);
+
+    /*  idle for a while to let PP32 init itself    */
+    udelay(10);
+
+    return 0;
+}
+
+/*
+ *  Description:
+ *    Halt PP32.
+ *  Input:
+ *    none
+ *  Output:
+ *    none
+ */
+void ifx_pp32_stop(int pp32)
+{
+    /*  halt PP32   */
+    IFX_REG_W32(DBG_CTRL_STOP_SET(1), PP32_DBG_CTRL);
+}
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_amazon_se.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_amazon_se.h
new file mode 100644
index 0000000..ae33bcc
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_amazon_se.h
@@ -0,0 +1,493 @@
+#ifndef IFXMIPS_PTM_FW_AMAZON_SE_H
+#define IFXMIPS_PTM_FW_AMAZON_SE_H
+
+
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_fw_amazon_se.h
+** PROJECT      : UEIP
+** MODULES      : PTM (ADSL)
+**
+** DATE         : 1 AUG 2005
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM Driver (PP32 Firmware)
+** COPYRIGHT    :   Copyright (c) 2006
+**          Infineon Technologies AG
+**          Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+**  4 AUG 2005  Xu Liang        Initiate Version
+** 23 OCT 2006  Xu Liang        Add GPL header.
+**  9 JAN 2007  Xu Liang        First version got from Anand (IC designer)
+*******************************************************************************/
+
+
+#define PTM_FW_VER_MAJOR        0
+#define PTM_FW_VER_MINOR        17
+
+
+static unsigned int firmware_binary_code[] = {
+    0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000,
+    0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x800055e0, 0xc2000000, 0xda0800f9, 0x80005580,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x80005e58, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc10e0002, 0xd90c00f8, 0xc0004808, 0xc84000f8, 0x80005250, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc3e1fffe, 0x597dfffe, 0x593dfef4, 0x900004d9, 0x00000000, 0x00000000, 0x00000000, 0x90cc0481,
+    0x00000000, 0x00000000, 0x00000000, 0xc3e06262, 0x5bfc0022, 0xc0004802, 0xcfc000f8, 0xc0004810,
+    0xcbc000f8, 0x00000000, 0xc3800000, 0xc7f80038, 0x5fb80000, 0xc7fa0038, 0xc7bfe802, 0x5fb80000,
+    0x00000000, 0xc7bff802, 0xdbd400f9, 0xc00049a0, 0xc3800002, 0xa7ca006a, 0xc1200000, 0x5911fffe,
+    0xcd0000f9, 0xc1200000, 0x59102042, 0xcd0000f9, 0xc1000004, 0xcd0000f9, 0xc1200000, 0x59103a1e,
+    0xcd0000f9, 0x80000060, 0xc121fffe, 0x5911fffe, 0xcd0000f9, 0xc1203db8, 0x5910de82, 0xcd0000f9,
+    0xc1000006, 0xcd0000f9, 0xc120385a, 0x591033da, 0xcd0000f9, 0x5fb80002, 0x8800001a, 0x6ffe0010,
+    0x8000ff28, 0xdd7c00f9, 0xc3800000, 0xc7f86010, 0x5bb80008, 0xc3540002, 0x777da000, 0xc1000008,
+    0x4791c002, 0xcf8000f9, 0xdb900038, 0xc3800008, 0xc3720002, 0x777da000, 0xa7f00028, 0x47b9c002,
+    0xc1000000, 0xc7d26010, 0x4391c000, 0xcf8000f8, 0xdb900838, 0xc3c00000, 0xdbc800f9, 0xc0400000,
+    0xc11c0000, 0xc000082c, 0xcd05ce00, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc0400002, 0xc11c0000,
+    0xc000082c, 0xcd05ce00, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc0000824, 0x00000000, 0xcbc000f9,
+    0xcb8000f9, 0xcb4000f9, 0xcb0000f8, 0xc0004878, 0x5bfc4000, 0xcfc000f9, 0x5bb84000, 0xcf8000f9,
+    0x5b744000, 0xcf4000f9, 0x5b304000, 0xcf0000f8, 0xc0000a10, 0x00000000, 0xcbc000f9, 0xcb8000f8,
+    0xc0004874, 0x5bfc4000, 0xcfc000f9, 0x5bb84000, 0xcf8000f8, 0xc30001fe, 0xc000140a, 0xcf0000f8,
+    0xc3000000, 0x7f018000, 0xc000042e, 0xcf0000f8, 0xc000040e, 0xcf0000f8, 0xc3c1fffe, 0xc000490e,
+    0xcfc00078, 0xc000492c, 0xcfc00078, 0xc0004924, 0xcfc00038, 0xc0004912, 0xcfc00038, 0xc000498c,
+    0xcfc00038, 0xc000498e, 0xcfc00078, 0xc0004990, 0xcfc00078, 0xc3c00000, 0xc2800004, 0xc3000000,
+    0x7f018000, 0x6ff88000, 0x6fd44000, 0x4395c000, 0x5bb84a00, 0xc00049a0, 0xcb0000f8, 0x00000000,
+    0x58380006, 0xcf0000f8, 0xc321fffe, 0x5b31fffe, 0x58380024, 0xcf0000f8, 0x5bfc0002, 0xb7e8ff90,
+    0x00000000, 0xc3c00000, 0xc2800010, 0x6ff86000, 0x47bdc000, 0x5bb84c80, 0xc3400000, 0x58380004,
+    0xcb420078, 0x00000000, 0x58380008, 0xcf400078, 0x5bfc0002, 0xb7e8ffb0, 0x00000000, 0xc3c00000,
+    0xc2800004, 0xc3400022, 0xc3000000, 0x7f018000, 0xc2c00016, 0x6ff8a000, 0x47bdc000, 0x5bb84e20,
+    0x58380008, 0xcf400038, 0xc00049a8, 0xcb0000f8, 0x00000000, 0x5838000a, 0xcf0000f8, 0xc321fffe,
+    0x5b31fffe, 0x5838000c, 0xcf0000f8, 0x58380034, 0xcec00038, 0x5bfc0002, 0xb7e8ff78, 0x00000000,
+    0x00000000, 0xc0004840, 0xc3e12624, 0x5bfc2320, 0xcfc000f9, 0xc3e02f2c, 0x5bfd2a28, 0xcfc000f9,
+    0xc3e03734, 0x5bfd3230, 0xcfc000f9, 0xc3e13e3c, 0x5bfc3b38, 0xcfc000f9, 0xc3e14644, 0x5bfc4340,
+    0xcfc000f9, 0xc3e04f4c, 0x5bfd4a48, 0xcfc000f9, 0xc3e05754, 0x5bfd5250, 0xcfc000f9, 0xc3e15e5c,
+    0x5bfc5b58, 0xcfc000f9, 0xc3e06764, 0x5bfd6260, 0xcfc000f9, 0xc3e16e6c, 0x5bfc6b68, 0xcfc000f9,
+    0xc3e17674, 0x5bfc7370, 0xcfc000f9, 0xc3e07f7c, 0x5bfd7a78, 0xcfc000f9, 0xc3e18684, 0x5bfc8380,
+    0xcfc000f9, 0xc3e08f8c, 0x5bfd8a88, 0xcfc000f9, 0xc3e09794, 0x5bfd9290, 0xcfc000f9, 0xc3e19e9c,
+    0x5bfc9b98, 0xcfc000f9, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0xc1000000, 0xd91c00f8, 0xc3e01002, 0x5bfd88c0, 0xc3a00f88,
+    0x5bb839a2, 0x990068d8, 0xdbd800f8, 0xdb9800f9, 0x00000000, 0xc3c00000, 0xdf7f0038, 0xa7ccfff0,
+    0xc3800000, 0xc00048c0, 0xcb818078, 0xc0001408, 0xcfc000f8, 0xc10e0002, 0xd90c00f8, 0x5d3802a6,
+    0xc1000002, 0xd91c1f02, 0xc121fffe, 0x5911fef4, 0x14100000, 0xa9fe0270, 0xc3c00000, 0xddfc00f0,
+    0x5d3c0000, 0x84000100, 0xc0000c04, 0xcb8000f8, 0xc11c0002, 0x00000000, 0x7391c000, 0xcf8000f8,
+    0xc3800000, 0xc3400080, 0xdf780038, 0xb7b4ffea, 0xc3203002, 0x5b3188c4, 0xc2e00f88, 0x5aec100e,
+    0x990068d8, 0xdb1800f8, 0xdad800f9, 0x00000000, 0xc3800000, 0xc3400080, 0xdf780038, 0xb7b4ffea,
+    0xc3205002, 0x5b3188c8, 0xc2e00f90, 0x5aec180c, 0x990068d8, 0xdb1800f8, 0xdad800f9, 0x00000000,
+    0x80000128, 0xc00048cc, 0xca8000f8, 0x00000000, 0xc1000006, 0x76914000, 0x840000fa, 0x00000000,
+    0xa6800070, 0xc3800000, 0xc3400080, 0xdf780038, 0xb7b4ffea, 0xc3202002, 0x5b31c8c6, 0xc2e00f88,
+    0x5aec100e, 0x990068d8, 0xdb1800f8, 0xdad800f9, 0x00000000, 0xa6820068, 0xc3800000, 0xc3400080,
+    0xdf780038, 0xb7b4ffea, 0xc3204002, 0x5b31c8ca, 0xc2e00f90, 0x5aec180c, 0x990068d8, 0xdb1800f8,
+    0xdad800f9, 0x00000000, 0xc00048cc, 0xc2800000, 0xce8000f8, 0xc3a00140, 0x5bfc0002, 0x47bc8000,
+    0xc1000000, 0xc53c00fe, 0xdbdc00f0, 0x80000028, 0x00000000, 0x800004e8, 0x00000000, 0x8000fd70,
+    0xc0004918, 0xd28000f8, 0xc2000000, 0xdf600038, 0x5e600080, 0x840002b2, 0x00000000, 0xc161fffe,
+    0x5955fffe, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc000480a, 0xca0000f8, 0xc0004912, 0xca4000f8, 0xc0004924, 0xca8000f8, 0xc000498c, 0xcac000f8,
+    0xc121fffe, 0x5911fef4, 0x14100000, 0x76250000, 0x76290000, 0x762d0000, 0x840001ea, 0xc0004918,
+    0xca4000f8, 0xc28001fe, 0x76290000, 0x5a640002, 0x6a254010, 0x5ee80000, 0x8400001a, 0x6aa54000,
+    0x80000010, 0xc62800f8, 0x62818008, 0xc0004918, 0xcf0000f8, 0xc161fffe, 0x5955fffe, 0x14140000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc000498c, 0xca4000f8,
+    0xc2000002, 0x6a310000, 0x7e010000, 0x76612000, 0xce4000f8, 0xc121fffe, 0x5911fef4, 0x14100000,
+    0x6f346000, 0x4771a000, 0x5b744c80, 0xc2800000, 0x58340006, 0xca800078, 0xc2c00000, 0x58340000,
+    0xcac000d8, 0xc2400000, 0x5834000a, 0xca420078, 0x6ea82000, 0x42e9e000, 0x6f2ca000, 0x42e56000,
+    0x5aec1400, 0xc3990040, 0xc7381c18, 0xc6f80060, 0x990068d8, 0xdb9800f8, 0xdbd800f9, 0x00000000,
+    0xdea000f8, 0x46310000, 0x8400fd40, 0xc000495a, 0xc84000f8, 0x00000000, 0xc3c00002, 0x787c2000,
+    0xcc4000f8, 0xc0000838, 0xc3800000, 0xcb840028, 0x6c748000, 0x6c544000, 0x4355a000, 0x5b744a00,
+    0x5ef80000, 0x8400fca2, 0x58340004, 0xcb0000f8, 0x00000000, 0x00000000, 0xa7060020, 0x00000000,
+    0x5ef80002, 0x8400fc62, 0x5834000c, 0xc8800038, 0xc2000000, 0xc000082c, 0xca040028, 0x5a880002,
+    0xc2400000, 0xc0004958, 0xce4000f8, 0xb6280018, 0x00000000, 0xc2800000, 0x58340002, 0xc2000000,
+    0xca020008, 0xc0004956, 0xce8000f8, 0x5e600000, 0x84001ca2, 0x5e600002, 0x84004062, 0x00000000,
+    0x800021d0, 0xc0004958, 0xca0000f8, 0xc0004956, 0xca8000f8, 0x5e200000, 0x84000020, 0xc2500002,
+    0xc0000838, 0xce450800, 0x6c748000, 0x6c544000, 0x4355a000, 0x5b744a00, 0x5834000c, 0xc6900038,
+    0xcd000038, 0x8000fb38, 0xc2000000, 0xdf600038, 0x5e200080, 0x8400028a, 0x00000000, 0xc161fffe,
+    0x5955fffe, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc000480c, 0xca0000f8, 0xc0004910, 0xca4000f8, 0xc000492c, 0xca8000f8, 0xc000498e, 0xcac000f8,
+    0xc121fffe, 0x5911fef4, 0x14100000, 0x76250000, 0x76290000, 0x76e16000, 0x840001c2, 0xc0004926,
+    0xca4000f8, 0xc201fffe, 0x76e16000, 0x5a640002, 0x6ae50010, 0x5f200000, 0x8400001a, 0x6a250000,
+    0x80000010, 0xc6e000f8, 0x62014008, 0xc0004926, 0xce8000f8, 0xc161fffe, 0x5955fffe, 0x14140000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc000498e, 0xca4000f8,
+    0xc2000002, 0x6a290000, 0x7e010000, 0x76612000, 0xce4000f8, 0xc121fffe, 0x5911fef4, 0x14100000,
+    0x6eb4a000, 0x4769a000, 0x5b744e20, 0x58340002, 0xc2000000, 0xca0000d8, 0x58340036, 0xc2400000,
+    0xca400078, 0x6eb0a000, 0x47298000, 0x5b300e56, 0x5b300004, 0x6e642000, 0x4225e000, 0xc39a8024,
+    0xc7380060, 0xc6b81c18, 0x990068d8, 0xdb9800f8, 0xdbd800f9, 0x00000000, 0xc2000000, 0xdf600038,
+    0x5e200080, 0x840002da, 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc000490e, 0xca0000f8, 0xc000492a, 0xca4000f8,
+    0xc0004990, 0xcb0000f8, 0xc000498a, 0xcac000f8, 0xc121fffe, 0x5911fef4, 0x14100000, 0x77218000,
+    0x77258000, 0x8400021a, 0xc201fffe, 0x77218000, 0x5aec0002, 0x6b2d0010, 0x5ea00000, 0x8400001a,
+    0x6a2d0000, 0x80000010, 0xc72000f8, 0x62016008, 0xc000498a, 0xcec000f8, 0xc161fffe, 0x5955fffe,
+    0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0004990,
+    0xca4000f8, 0xc2000002, 0x6a2d0000, 0x7e010000, 0x76612000, 0xce4000f8, 0xc121fffe, 0x5911fef4,
+    0x14100000, 0x6ef4a000, 0x476da000, 0x5b744e20, 0x58340010, 0xc2000000, 0xca0000d8, 0x58340008,
+    0xc2400000, 0xca420078, 0x5834000e, 0xc2800000, 0xca832010, 0xc3c00000, 0x47e48000, 0x6e644010,
+    0xc7e800fc, 0x42250000, 0x4229e000, 0xc39a8008, 0x58340008, 0xcb801038, 0x58340008, 0xc2800000,
+    0xca810010, 0x6ee0a000, 0x462d0000, 0x5a20000a, 0x5a200e28, 0x42290000, 0xc6380060, 0xc6f81c18,
+    0x990068d8, 0xdb9800f8, 0xdbd800f9, 0x00000000, 0xc000495c, 0xc84000f8, 0xc3400000, 0xc3c00002,
+    0x787c2000, 0xcc4000f8, 0x6c78a000, 0x4785c000, 0x5bb84e20, 0x58380034, 0xcb410038, 0xc0000a28,
+    0xc3000000, 0xcb040028, 0xc0000a14, 0xc2c00000, 0x43358000, 0xcac40028, 0xc000490e, 0xca8000f8,
+    0x5eec0002, 0x472d8000, 0x8800f258, 0x6bc5e000, 0x76bd4000, 0x8400f240, 0x6c7ca000, 0x47c5e000,
+    0x5bfc4e20, 0x583c0008, 0xc2000000, 0xca020078, 0xc00049aa, 0x00000000, 0xca8000f9, 0xca4000f8,
+    0xc0001008, 0xce8000f8, 0xc0001006, 0xce4000f8, 0x583c000a, 0xca4000f8, 0x00000000, 0xc000100a,
+    0xce4000f8, 0xc2400006, 0xc0001000, 0xce4000f8, 0xc2600982, 0x5a643b6e, 0xc0001002, 0xce4000f8,
+    0x583c000c, 0xca4000f8, 0x00000000, 0xc0001004, 0xce4000f8, 0x583c000e, 0xcb8000f8, 0x00000000,
+    0xc2400000, 0xc7a40078, 0xc2800000, 0xc7aae020, 0xdaa000f9, 0x583c0034, 0xcb8000f8, 0x00000000,
+    0xc2c00000, 0xc7ad0038, 0xc0004978, 0xcec000f8, 0xc0800000, 0xc7880038, 0xc3400000, 0xc7b60038,
+    0xc0004980, 0xcf4000f8, 0x4661c000, 0x43a9c000, 0xc2400000, 0xc000497c, 0xce4000f8, 0xad2c0001,
+    0xc2800000, 0x00000000, 0x80000010, 0xc2800002, 0xc0004976, 0xce8000f8, 0xc2c00000, 0xc34000a0,
+    0xdb5c00f9, 0xc3400002, 0xc000497a, 0xcf4000f8, 0x5f600000, 0x84000180, 0xde2800f9, 0xc6a000f8,
+    0x47a9c000, 0x583c0000, 0xc2800000, 0xca830038, 0xc0000a28, 0xc3000000, 0xcb040028, 0xc3400000,
+    0xc0004976, 0x46b18000, 0x8800006a, 0xcf4000f8, 0x58880002, 0xc3000000, 0xc0000a14, 0xcb040028,
+    0x00000000, 0x00000000, 0xb4b001a8, 0x00000000, 0xc0800000, 0x00000000, 0x80000188, 0xc0004980,
+    0xcb4000f8, 0x00000000, 0x00000000, 0x5af40002, 0xacec0080, 0x00000000, 0xc2c00000, 0xc000497a,
+    0xadec0001, 0x00000000, 0x00000000, 0xad2c007f, 0xc2800000, 0xce8000f8, 0x80000018, 0xc2800002,
+    0xce8000f8, 0x5f6c0000, 0x840000e8, 0x00000000, 0x8000ff00, 0x5f780082, 0x88000258, 0xc3000002,
+    0xc000497c, 0xcf0000f8, 0xc2800080, 0xc1000000, 0xdd110038, 0x46914000, 0x47a94000, 0x880001d8,
+    0x4391a000, 0xc0004980, 0xcf4000f8, 0x6f684010, 0x6f77c000, 0x6f77c010, 0xc0004840, 0x40280000,
+    0xca8000f8, 0xc3000000, 0x6f506000, 0x6a908010, 0xc5300038, 0xdb1c00f9, 0x8000fe30, 0xc3400000,
+    0xc0000a10, 0xcb440060, 0x6cb04000, 0x6f288000, 0x6f744000, 0x42b14000, 0x43694000, 0xc3400000,
+    0xc6b44060, 0xc0004000, 0x40340000, 0xc321e000, 0xcf0000f8, 0x5aa80008, 0x42ad4000, 0xc3400000,
+    0xc6b44060, 0xc0004000, 0x40340000, 0xca4000f8, 0xc3000000, 0xc6f00008, 0xc1400000, 0xddd40039,
+    0x6f306000, 0xc13001fe, 0x69308010, 0x7d008000, 0x76512000, 0x6d570000, 0x6970a010, 0x42552000,
+    0xce4000f8, 0x5aa80002, 0x5aec0002, 0xacec0080, 0x00000000, 0xc2c00000, 0x5f6c0000, 0x84000118,
+    0x00000000, 0x80000040, 0x4391a000, 0x5f740080, 0xc0004980, 0xcf4000f8, 0xc3000004, 0xc000497a,
+    0xcf0000f8, 0x58880002, 0xc3400000, 0xc0000a14, 0xcb440028, 0x00000000, 0x00000000, 0xb4b40018,
+    0x00000000, 0xc0800000, 0xc3400000, 0xc0000a10, 0xcb440060, 0x6cb04000, 0x6f248000, 0x6f744000,
+    0x42712000, 0x43654000, 0xc3400000, 0xc6b44060, 0xc0004000, 0x40340000, 0xc3201e00, 0xcf0000f8,
+    0x5aa80008, 0x42ad4000, 0xc000100c, 0xcb4000f8, 0xc3000000, 0x00000000, 0xc7340060, 0xc300fffe,
+    0xc7341070, 0xcf4000f8, 0xc000100e, 0xcb4000f8, 0xc3000e28, 0x00000000, 0xc7340060, 0xc300fffe,
+    0xc7341070, 0xcf4000f8, 0xc0001010, 0xcb4000f8, 0xc3000002, 0x00000000, 0xc7341a00, 0xc7341800,
+    0xc3000000, 0xc7341900, 0xc6b40070, 0xcf4000f8, 0xc0004982, 0xce8000f8, 0x6c64a000, 0x46452000,
+    0x5a64000a, 0xc0001012, 0xcb4000f8, 0xc2800002, 0x00000000, 0xc6740260, 0xc6340008, 0xc000497c,
+    0xcb0000f8, 0xc6b41800, 0xc6b41b00, 0xc6b41c00, 0xc6b41d00, 0xc7341e00, 0xdd6800f9, 0x7e814000,
+    0x6eab2010, 0x76b14000, 0xc6b41f00, 0xc2800000, 0xc6b41900, 0xc3000080, 0x472d8000, 0xc0004982,
+    0xc90000f8, 0x47394000, 0x88000102, 0x41388000, 0xcd0000f8, 0xc7b41038, 0xc0004994, 0xce8000f8,
+    0xde1000f9, 0x45208000, 0x840000b0, 0xc1000000, 0xdd110038, 0x41388000, 0x412c8000, 0x5d100080,
+    0xc0004980, 0xcd0000f8, 0xc1000002, 0xc000497c, 0xcd0000f8, 0xc5341e00, 0xdd5000f9, 0x7d008000,
+    0xc5373f00, 0xc000497a, 0xc90000f8, 0x42390000, 0x43adc000, 0x59100002, 0xcd0000f8, 0x80000050,
+    0x42390000, 0x80000040, 0xc7341038, 0x41308000, 0xcd0000f8, 0x42310000, 0xc1000000, 0xc0004994,
+    0xcd0000f8, 0xc0001012, 0xcf4000f8, 0xc000493c, 0xce0000f8, 0xc0004984, 0xcf8000f8, 0xc000497a,
+    0xca4000f8, 0xc000497c, 0xca8000f8, 0x6c7ca000, 0x47c5e000, 0x5bfc4e20, 0xc0004976, 0xcac000f8,
+    0xc0004978, 0xca0000f8, 0x5eec0002, 0x8400008a, 0x42250000, 0xc2400000, 0xc000497a, 0xce4000f8,
+    0x583c0000, 0xc2c00000, 0xcac30038, 0x00000000, 0x00000000, 0x46e16000, 0x8800001a, 0x00000000,
+    0xad280002, 0xc000497a, 0xce0000f8, 0xc2000000, 0x5fa80000, 0x840001da, 0x00000000, 0x6c508000,
+    0xc0004880, 0x40100000, 0x58000018, 0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8,
+    0x583c000e, 0xc2c00000, 0xcac00078, 0xc1000000, 0xdd532201, 0x42d16000, 0x6c508000, 0xc0004880,
+    0x40100000, 0x5800001a, 0xc90000f8, 0x00000000, 0x00000000, 0x412c8000, 0xcd0000f8, 0x99006968,
+    0xd85800f8, 0xdbd800f9, 0x00000000, 0x990066b0, 0xc000491c, 0xc1400000, 0xc9420048, 0xc000491c,
+    0x99006b68, 0xc94000f9, 0xc98000f8, 0x00000000, 0x990068d8, 0xd95800f8, 0xd99800f9, 0x00000000,
+    0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x98c06528, 0xd85800f8, 0xdbd800f9, 0xc45800f8, 0xc121fffe, 0x5911fef4, 0x14100000,
+    0xade80003, 0xc000493c, 0xcb4000f8, 0x00000000, 0xc3000000, 0xc7701078, 0x80000010, 0xc3000000,
+    0x583c0008, 0xcf021078, 0x6e210000, 0x583c0034, 0xce010838, 0xc0004980, 0xcb8000f8, 0x583c0034,
+    0x00000000, 0x6fba0000, 0xcf821038, 0xc000490e, 0xca0000f8, 0xc2c00002, 0x6ac56000, 0x722d0000,
+    0xce0000f8, 0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8,
+    0x5fa80000, 0x84000712, 0xc00049a8, 0xca0000f8, 0x583c000a, 0x00000000, 0xce0000f8, 0xc221fffe,
+    0x5a21fffe, 0x583c000c, 0xce0000f8, 0xc0001004, 0xca0000f8, 0x00000000, 0x583c0012, 0x7e010000,
+    0xce0000f8, 0xa97000e1, 0x00000000, 0x00000000, 0xa97200c9, 0xc0001010, 0xc2740000, 0xce435a00,
+    0x6c64a000, 0x46452000, 0x5a64000a, 0x6e644000, 0xc0001012, 0xce400070, 0xc2600008, 0xce421038,
+    0xc27e0002, 0xce43ff00, 0xc2760002, 0xce437b00, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0xc1000000, 0xdd110038, 0x5d100000,
+    0x84000412, 0xc0004982, 0xca0000f8, 0xc0004984, 0xca4000f8, 0xc2800000, 0xc361fffe, 0x5b75fffe,
+    0xa96a001b, 0xdfec00f8, 0xc6ec1078, 0x7af56000, 0x6c40a000, 0x44040000, 0x58004e20, 0x58000014,
+    0xcec000f8, 0xa972001b, 0x5c000002, 0xcec000f8, 0xc0001010, 0xc2f40002, 0xcec35a00, 0x6c6ca000,
+    0x46c56000, 0x5aec000a, 0x6eec4000, 0xc0001012, 0xcec00070, 0xc0004994, 0xc98000f8, 0xc1400000,
+    0xdd150038, 0xc55c00f8, 0x45948000, 0x00000000, 0xc59c00fc, 0x5d1c0000, 0x840000d2, 0xc0001012,
+    0xc5d01038, 0xcd021038, 0xc2f60002, 0xcec37b00, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0x45948000, 0x88000052, 0xc0004994,
+    0xcd0000f8, 0xc0004980, 0xcbc000f8, 0x42150000, 0xc0004982, 0xce0000f8, 0x5ffc0000, 0x84000218,
+    0x58880002, 0xc3800000, 0xc0000a14, 0xcb840028, 0xc3c00000, 0xc0000a10, 0xb4b80018, 0x00000000,
+    0xc0800000, 0xcbc40060, 0x6cb84000, 0x6fac8000, 0x6ffc4000, 0x42f96000, 0x43ed0000, 0xc3400000,
+    0xc6344060, 0xc0004000, 0x40340000, 0xc2a1e000, 0xce8000f8, 0x5a200008, 0xc0004980, 0xcbc000f8,
+    0xc3400000, 0xc0004840, 0x6ff84010, 0xc7f40008, 0x40380000, 0xcb8000f8, 0xc2800000, 0x6f506000,
+    0x6b908010, 0xc52c1838, 0xc3400000, 0xc6344060, 0xc0004000, 0x40340000, 0xcec000f8, 0x5a200002,
+    0x5ffc0000, 0x84000092, 0xc0001010, 0xc62c0070, 0xcec00070, 0xc0001012, 0xc7ec1038, 0xcec21038,
+    0xc2f60002, 0xcec37b00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8,
+    0x00000000, 0xc1220002, 0xd90c00f8, 0xc0004994, 0xc100007e, 0x453c8000, 0xcd0000f8, 0x423d0000,
+    0xc0004982, 0xce0000f8, 0xc0004994, 0xca0000f8, 0xc0004980, 0xca4000f8, 0x5e200000, 0x8400015a,
+    0xc2000000, 0xc2800000, 0x5a640002, 0xc6684028, 0xc0004982, 0xcb0000f8, 0xc0004000, 0xc2c00000,
+    0xc72c4060, 0x402c0000, 0x6e67c000, 0x6e67c010, 0x5ee40002, 0x8400003a, 0x5ee40004, 0x8400004a,
+    0x5ee40006, 0x8400005a, 0x00000000, 0x80000060, 0xce0000b8, 0x5aa80002, 0x5b300006, 0x80000040,
+    0xce000078, 0x5aa80002, 0x5b300004, 0x80000020, 0xce000038, 0x5aa80002, 0x5b300002, 0x5ee80020,
+    0x84000052, 0xc0004000, 0xc2c00000, 0xc72c4060, 0x402c0000, 0xce0000f8, 0x5aa80002, 0x5b300008,
+    0x8000ffb8, 0x00000000, 0x80000040, 0x583c000a, 0xd7c000f8, 0xc0001004, 0xca4000f8, 0x00000000,
+    0x583c000c, 0xce4000f8, 0xc000497a, 0xca4000f8, 0xc2800002, 0xc0000a28, 0xc6780928, 0xc6b80800,
+    0xcf850830, 0x6c7ca000, 0x47c5e000, 0x5bfc4e20, 0x583c0034, 0xc4900038, 0xcd000038, 0x8000e418,
+    0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0xc0000824, 0xca0400f8, 0x6ca48000, 0x42492000,
+    0xc3000000, 0xc3400000, 0x42250000, 0x58204000, 0xca4000f8, 0x5a200002, 0xda2400f9, 0xc2800000,
+    0xc000495e, 0xce8000f8, 0xda6000f8, 0xc2800000, 0xc66b0038, 0xdaa800f8, 0x582c0010, 0x6f206010,
+    0x40200000, 0xd82800f9, 0xca0000f8, 0xc2400000, 0xc7240010, 0x6e644000, 0xda6400f8, 0x6a254010,
+    0xc3c00000, 0xc6bc0018, 0xc3800000, 0xdea000f8, 0x5e60001e, 0x8400002a, 0x5e6001e0, 0x8400001a,
+    0x00000000, 0x80000080, 0xc7f800f8, 0x5e7c0008, 0x8400006a, 0x5bbc0002, 0x5e780008, 0x84000028,
+    0x5b740002, 0xc0004960, 0xcf0000f8, 0x80000030, 0x5e780006, 0x88000022, 0xc2800002, 0xc000495e,
+    0xce8000f8, 0xde8000f9, 0xca8000f8, 0xde6000f8, 0xc240001e, 0x6a612000, 0x7e412000, 0x76a54000,
+    0x6ba12000, 0x72a54000, 0xce8000f8, 0x5e300080, 0x840000ba, 0xc2000000, 0xc7200008, 0x5e600000,
+    0x84000058, 0xde6000f9, 0x58204000, 0xca4000f8, 0x5a200002, 0xda2400f9, 0xc2800000, 0xc66b0038,
+    0xdaa800f8, 0xda6000f8, 0x80000038, 0xc2800000, 0x6e206000, 0xde2400f8, 0x6a610000, 0xc62b0038,
+    0xdaa800f8, 0x5b300002, 0x8000fde0, 0xc2000000, 0x582c0020, 0xca020078, 0x00000000, 0xc2400000,
+    0x5a200002, 0xc6241078, 0xce421078, 0xc000480e, 0xca8000f8, 0x5e740000, 0x84000160, 0x46a12000,
+    0x8800e048, 0xc2400000, 0xc0000808, 0xca440010, 0x582c0010, 0xc1400000, 0xcd4000f9, 0xcd4000f9,
+    0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd400018, 0x582c0020,
+    0xce021078, 0xc2000010, 0x5a640002, 0xb6240018, 0x00000000, 0xc2400000, 0xc6600010, 0xc0000808,
+    0xce040010, 0xc0004956, 0xca4000f8, 0xc11c0000, 0xc000082c, 0xcd05ce00, 0xc6600928, 0xc2400000,
+    0xc6600028, 0xc0000838, 0xce0400f8, 0xc2400002, 0xc0004958, 0xce4000f8, 0xc11c0002, 0xc000082c,
+    0xcd05ce00, 0x8000df00, 0xc000495e, 0xca0000f8, 0x5e740002, 0x8400dee0, 0x5e200000, 0x8400ded0,
+    0xc0004960, 0xca4000f8, 0xc2200004, 0x582c0002, 0xce021008, 0xc2000082, 0x46250000, 0xc6280030,
+    0xc0000810, 0xce840030, 0x99007000, 0x582c0002, 0xc94000f8, 0xc1a20000, 0x5e640000, 0x8400fed0,
+    0x00000000, 0x8000de40, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0xc000487c, 0xc80400f8,
+    0x00000000, 0x00000000, 0x40080000, 0xcb8000f8, 0xc42400f8, 0x00000000, 0xa78601a0, 0xc3c00000,
+    0xc2000000, 0x582c000c, 0xca010038, 0x6c508000, 0xc0004880, 0x40100000, 0x58000016, 0xc90000f8,
+    0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x5a200002, 0x582c000c, 0xc6100838, 0xcd010838,
+    0x5e600002, 0x84000020, 0xc2200004, 0x582c0002, 0xce021008, 0x5e600008, 0x84000060, 0xc2200002,
+    0x582c0002, 0xce021008, 0x582c000c, 0xcfc10838, 0xc2220002, 0xc0000a14, 0xce063100, 0xc22001a2,
+    0xc0000a1c, 0xce061038, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0x582c0004, 0xcb0000f8,
+    0xc3400000, 0x00000000, 0xa7060028, 0xcf406300, 0xc3100002, 0xc0000838, 0xcf050800, 0x582c000c,
+    0xcf421000, 0x8000dc40, 0x582c000c, 0xcfc10838, 0xc2000000, 0xc7a06010, 0x5e200000, 0x84001c08,
+    0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0xc000487c, 0xc80400f8, 0x00000000, 0x00000000,
+    0x40080000, 0xcb8000f8, 0xc42400f8, 0x00000000, 0xc2800000, 0xc3400000, 0xc7b5c030, 0xc0004970,
+    0xcf4000f8, 0xc2400000, 0xc7a4e030, 0xc000496c, 0xce4000f8, 0xc3000000, 0xc7b00010, 0xc3c00004,
+    0xc000496e, 0xcfc000f8, 0x582c000c, 0xca0000f8, 0xc2400002, 0xc0004964, 0xce4000f8, 0xa6200372,
+    0x00000000, 0x5e700004, 0x840000ea, 0x5e700006, 0x84000080, 0xc2000002, 0x582c0002, 0xce000000,
+    0xc0000a14, 0xce863100, 0x6c508000, 0xc0004880, 0x40100000, 0x58000014, 0xc90000f8, 0x00000000,
+    0x00000000, 0x59100002, 0xcd0000f8, 0x80001a58, 0x5e70000a, 0x84000040, 0xc2000000, 0x582c0002,
+    0xce000000, 0xc2220002, 0xc0000a14, 0xce063100, 0x8000ff70, 0x5e700008, 0x84000228, 0xc2200002,
+    0x582c000c, 0xce021000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000012, 0xc90000f8, 0x00000000,
+    0x00000000, 0x59100002, 0xcd0000f8, 0x5e340002, 0x6c508000, 0xc0004880, 0x40100000, 0x58000010,
+    0xc90000f8, 0x00000000, 0x00000000, 0x41208000, 0xcd0000f8, 0xc0000a14, 0xce863100, 0xc0004970,
+    0xcb4000f8, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0x582c000e, 0xc4900038, 0xcd000038,
+    0x582c000e, 0xc7500838, 0xcd010838, 0xc2800000, 0x582c0004, 0xce821078, 0x582c0004, 0xce800000,
+    0xc00049a0, 0xca4000f8, 0x00000000, 0x582c0006, 0xce4000f8, 0xc261fffe, 0x5a65fffe, 0x582c0024,
+    0xce4000f8, 0xc2060002, 0x582c0004, 0xce006300, 0xc2400002, 0xc0004958, 0xce4000f8, 0xc0004878,
+    0xc80400f8, 0x6c908000, 0x41088000, 0x40100000, 0x58000020, 0xc90000f8, 0x582c0026, 0x00000000,
+    0xcd0000f8, 0x800017e8, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000016, 0xc90000f8,
+    0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x8000faf0, 0x5e700000, 0x840000c0, 0xc3400082,
+    0xc0004970, 0xcf4000f8, 0xc2400080, 0xc000496c, 0xce4000f8, 0xc3c00002, 0xc000496e, 0xcfc000f8,
+    0xc2400000, 0xc0004964, 0xce4000f8, 0xc0004878, 0xc80400f8, 0x6c908000, 0x41088000, 0x40100000,
+    0x58000020, 0xc90000f8, 0x582c0026, 0x00000000, 0xcd0000f8, 0x80000078, 0x5e700002, 0x84000058,
+    0xc3400082, 0xc0004970, 0xcf4000f8, 0xc3c00004, 0xc000496e, 0xcfc000f8, 0xc2200000, 0x582c000c,
+    0xce021000, 0x80000030, 0x5e700004, 0x8400fe80, 0xc2600002, 0x582c000c, 0xce421000, 0xc0000a14,
+    0xce863100, 0xc000496c, 0xca4000f8, 0x6c508000, 0xc0004880, 0x40100000, 0x58000012, 0xc90000f8,
+    0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0xc000496e, 0xcbc000f8, 0x00000000, 0x00000000,
+    0x477d0000, 0x46250000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000010, 0xc90000f8, 0x00000000,
+    0x00000000, 0x41208000, 0xcd0000f8, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0x582c0004,
+    0xca0000f8, 0x00000000, 0x00000000, 0xa60014e2, 0x00000000, 0x6c6c8000, 0x6c544000, 0x42d56000,
+    0x5aec4a00, 0xc3000000, 0x582c0004, 0xcf006300, 0x582c0000, 0xcb002010, 0xc3c00000, 0x582c0004,
+    0xcbc20078, 0xc000491a, 0xcf0000f8, 0xc000493c, 0xcfc000f8, 0x582c0008, 0xcb8000f8, 0x582c000a,
+    0xca4000f8, 0xc0004930, 0xcf8000f8, 0xc0004932, 0xce4000f8, 0x5ffc0000, 0x840001f0, 0x00000000,
+    0xa7be0102, 0xc2800000, 0x6f206000, 0x46310000, 0x5a204c80, 0x5820000c, 0xca800020, 0x00000000,
+    0x00000000, 0x5ea80000, 0x84000112, 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x990063c8, 0xc000491a, 0xc94000f8,
+    0x00000000, 0xc121fffe, 0x5911fef4, 0x14100000, 0xc0004930, 0xcb8000f8, 0xc0004932, 0xca4000f8,
+    0xc4781108, 0xc0004930, 0xcf8000f8, 0x582c0008, 0xcf8000f8, 0x582c000a, 0xce4000f8, 0xc7b6e108,
+    0x582c0004, 0xcf402108, 0x80000090, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x5800000c,
+    0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0xc2000002, 0x582c0004, 0xce000000,
+    0xc0000838, 0xc2500002, 0xce450800, 0x80001220, 0x6c7c8000, 0x6c544000, 0x43d5e000, 0x5bfc4a00,
+    0x583c0006, 0xca0000f8, 0xc00049a2, 0x00000000, 0xca8000f9, 0xca4000f8, 0xc0001008, 0xce8000f8,
+    0xc0001006, 0xce4000f8, 0xc000100a, 0xce0000f8, 0xc2400006, 0xc0001000, 0xce4000f8, 0xc2600982,
+    0x5a643b6e, 0xc0001002, 0xce4000f8, 0x583c0024, 0xca4000f8, 0x00000000, 0xc0001004, 0xce4000f8,
+    0xc0004862, 0xc2000000, 0xca000078, 0xc360fffe, 0xc0004862, 0xce0000f8, 0xc0000824, 0xcb440060,
+    0x00000000, 0xc000100e, 0xcf4000f8, 0xc3801600, 0xc2400200, 0x6e644000, 0xc6781070, 0xc000100c,
+    0xcf8000f8, 0xc3200a00, 0xc0001010, 0xcf031810, 0xc2e06200, 0xc0001012, 0xcec31838, 0xc2000000,
+    0x583c0004, 0xca002008, 0xc2800000, 0xc0004966, 0xce0000f8, 0xc62400f8, 0xc3000000, 0xc000496a,
+    0xcf0000f8, 0xc0004974, 0xcf0000f8, 0xc000493c, 0xcb4000f8, 0x583c000e, 0x00000000, 0x5f740000,
+    0x84000180, 0xc3400000, 0xcb410038, 0xc3000002, 0xc000496a, 0x5fb40080, 0x84000152, 0xcf0000f8,
+    0x583c000e, 0xc2c00000, 0xcac00038, 0xc3800080, 0x47b5c000, 0xc0004974, 0xcf8000f8, 0xc0001012,
+    0x6fba0000, 0xcf821038, 0x6fba0010, 0x43a5c000, 0x5b380006, 0x6f284010, 0xc7a40008, 0x6eec4000,
+    0x6ef08000, 0x432d8000, 0x43358000, 0x5b300008, 0xc0001012, 0xc7100070, 0xcd000070, 0xc2000200,
+    0xc2c00000, 0xdf6d0048, 0x462d6000, 0x46e96000, 0x8800ffe2, 0xc2000000, 0xc0004862, 0xca000260,
+    0x00000000, 0x583c0004, 0xca002008, 0xc3360002, 0xc0001010, 0xce000070, 0xc0001012, 0xcf037b00,
+    0xc0004974, 0xcb8000f8, 0x00000000, 0x00000000, 0x5fb80000, 0x84000042, 0x00000000, 0x00000000,
+    0x00000000, 0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0xc000496c, 0xcac000f8, 0x00000000,
+    0x00000000, 0x426dc000, 0x5b380006, 0x6f304010, 0xc7a40008, 0xc0004968, 0xce4000f8, 0xc000496e,
+    0xcb4000f8, 0x6ca44000, 0x6e608000, 0x42250000, 0x5a200006, 0x42350000, 0xc0001012, 0xc6100070,
+    0xcd000070, 0x6eee0000, 0xcec21038, 0xc2000200, 0xc2c00000, 0xdf6d0048, 0x462d6000, 0x42b14000,
+    0x46e96000, 0x8800ffda, 0xc000493c, 0xcb4000f8, 0xc0000838, 0xc3100002, 0x5f740000, 0x84000060,
+    0xcf050800, 0xc0004974, 0xcb8000f8, 0x00000000, 0x00000000, 0x5fb80000, 0x8400006a, 0xc0001012,
+    0xc3360002, 0xcf037b00, 0x800000a0, 0x583c0022, 0xcb4000f8, 0xc0004862, 0xca0000f8, 0x00000000,
+    0xc0005600, 0x40200000, 0xcf4000f8, 0xc2000000, 0xc0004862, 0xca000260, 0x00000000, 0x583c0004,
+    0xca002008, 0xc3360002, 0xc0001010, 0xce000070, 0xc0001012, 0xcf037b00, 0xc0004968, 0xcbc000f8,
+    0xc0004964, 0xca4000f8, 0xc7e000f8, 0x00000000, 0x5e640000, 0x84000012, 0xc2000000, 0xc0004974,
+    0xca4000f8, 0xc000496c, 0xca8000f8, 0xc000493c, 0xcb8000f8, 0x42698000, 0x00000000, 0x43b1a000,
+    0x5ef40080, 0x8800019a, 0xc0004966, 0xcac000f8, 0x6c648000, 0x6c544000, 0x42552000, 0x5a644a00,
+    0x58240000, 0x436da000, 0x4761a000, 0xc2400000, 0xca420078, 0x00000000, 0x00000000, 0x46752000,
+    0x88000122, 0x432d8000, 0x47218000, 0x88000010, 0xc3000000, 0x5b300006, 0x6f304010, 0xc000493a,
+    0xcf0000f8, 0xc0004932, 0xc2400000, 0xca4000d8, 0x00000000, 0x6fb84010, 0x42792000, 0xc000491e,
+    0xce4000f8, 0xc0004862, 0xca8000f8, 0x00000000, 0xc2c0000a, 0xc6e80d70, 0xc7281048, 0xc000491c,
+    0xce8000f8, 0x6c708000, 0x6c544000, 0x43158000, 0x5b304a00, 0x6f760000, 0x58300004, 0xcf421078,
+    0x6ffc2000, 0x58300004, 0xcfc02108, 0x800000d0, 0x6c708000, 0x6c544000, 0x43158000, 0x5b304a00,
+    0xc2800002, 0x58300004, 0xce800000, 0x6c508000, 0xc0004880, 0x40100000, 0x5800000e, 0xc90000f8,
+    0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8,
+    0x00000000, 0xc1220002, 0xd90c00f8, 0x80000920, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0xc0004964, 0xca0000f8, 0x6c7c8000, 0x6c544000,
+    0x43d5e000, 0x5bfc4a00, 0xdfe400f8, 0x5e200002, 0x84000608, 0x00000000, 0x583c0004, 0xc2800000,
+    0xca820078, 0xc0004930, 0xcac000f8, 0x00000000, 0x00000000, 0x6eece000, 0x6eefc010, 0x46aca000,
+    0xc1000000, 0xdd500039, 0x6d106010, 0x4550a000, 0xc1000000, 0xdd514201, 0x4550c000, 0xa95000f1,
+    0xc00049a6, 0xca0000f8, 0xa94a0023, 0x00000000, 0x6e660000, 0x6e660010, 0x46612000, 0x840000b2,
+    0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000004, 0xc90000f8, 0x00000000, 0x00000000,
+    0x59100002, 0xcd0000f8, 0x6c508000, 0xc0004880, 0x40100000, 0x58000006, 0xc90000f8, 0x00000000,
+    0x00000000, 0x41148000, 0xcd0000f8, 0x80000720, 0x00000000, 0xa95203c1, 0xc0001004, 0xcb8000f8,
+    0xc3400000, 0xdd740039, 0x5f740000, 0x840000d0, 0xc1218e08, 0x5911baf6, 0x45388000, 0x84000372,
+    0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000008, 0xc90000f8, 0x00000000, 0x00000000,
+    0x59100002, 0xcd0000f8, 0x6c508000, 0xc0004880, 0x40100000, 0x5800000a, 0xc90000f8, 0x00000000,
+    0x00000000, 0x41148000, 0xcd0000f8, 0x80000620, 0x00000000, 0xc000496c, 0xcb0000f8, 0x583c0026,
+    0xcac000f8, 0xc0004878, 0xc80400f8, 0x6c908000, 0x41088000, 0x40100000, 0x58000002, 0xca8000f8,
+    0x00000000, 0x00000000, 0x6ea90000, 0x5d300008, 0x8800004a, 0x59300002, 0xc3000000, 0xc5300008,
+    0x6d104010, 0x40100000, 0xca8000f8, 0x5c000002, 0xcac000f8, 0x5d300000, 0x8400003a, 0x6f246000,
+    0x6ae56000, 0xc1000040, 0x45252000, 0x6aa54010, 0x42e96000, 0x583c0026, 0xcec000f8, 0xc1218e08,
+    0x5911baf6, 0xc0001004, 0xcd0000f8, 0x593c0026, 0xc000100e, 0xcd000060, 0xc1340000, 0xc0001010,
+    0xcd035a00, 0xc1200008, 0xa94a0023, 0xc0001012, 0xc1200004, 0x59100004, 0xcd0000b8, 0xc1360002,
+    0xcd037b00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000,
+    0xc1220002, 0xd90c00f8, 0xc0001004, 0xc90000f8, 0x00000000, 0x00000000, 0x45388000, 0x840000b2,
+    0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000008, 0xc90000f8, 0x00000000, 0x00000000,
+    0x59100002, 0xcd0000f8, 0x6c508000, 0xc0004880, 0x40100000, 0x5800000a, 0xc90000f8, 0x00000000,
+    0x00000000, 0x41148000, 0xcd0000f8, 0x80000360, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000,
+    0x58000000, 0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x6c508000, 0xc0004880,
+    0x40100000, 0x58000002, 0xc90000f8, 0x00000000, 0x00000000, 0x41148000, 0xcd0000f8, 0xc0004930,
+    0xcd800078, 0xc3000000, 0x583c0008, 0xcf0000f8, 0x80000038, 0xc0001004, 0xca0000f8, 0x583c0006,
+    0xce4000f8, 0x583c0024, 0xce0000f8, 0xc0004862, 0xc2000000, 0xca000078, 0xc000493a, 0xca4000f8,
+    0x00000000, 0x00000000, 0x42254000, 0x5ee80200, 0x88000012, 0xc6e800f8, 0xc0004000, 0x58001600,
+    0x40280000, 0xcb8000f8, 0x00000000, 0x583c0022, 0xcf8000f8, 0xc0004862, 0xce800078, 0xc0001406,
+    0xcac000f8, 0xc2800002, 0x00000000, 0xc66c1048, 0xc6ac0a00, 0xcec000f8, 0xc2000000, 0xdf600038,
+    0x5e600080, 0x8400ffea, 0xc000491c, 0xca4000f8, 0xc000491e, 0xca8000f8, 0x990068d8, 0xda5800f8,
+    0xda9800f9, 0x00000000, 0xc0004964, 0xcbc000f8, 0x00000000, 0x00000000, 0x5ffc0000, 0x84000102,
+    0xc2000000, 0xdf610048, 0x5e6001fe, 0x8800ffe8, 0xc000491a, 0xc98000f8, 0xc0004862, 0xc94000f8,
+    0x6d9c6000, 0x45d8e000, 0x59dc4c80, 0x99006738, 0xd95800f8, 0xd99800f9, 0xd9d400f8, 0x990066b0,
+    0xc000491c, 0xc1400000, 0xc9420048, 0xc2000000, 0xdf600038, 0x5e600080, 0x8400ffea, 0xc000491c,
+    0xca4000f8, 0xc000491e, 0xca8000f8, 0x990068d8, 0xda5800f8, 0xda9800f9, 0x00000000, 0xc0004970,
+    0xcb4000f8, 0x00000000, 0x00000000, 0x5e740082, 0x8400e6d8, 0x00000000, 0x8000c018, 0x00000000,
+    0x6c508000, 0xc0004880, 0x40100000, 0x58000016, 0xc90000f8, 0x00000000, 0x00000000, 0x59100002,
+    0xcd0000f8, 0x8000e308, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0xc000487c, 0xc80400f8,
+    0x00000000, 0x00000000, 0x40080000, 0xca0000f8, 0xc42400f8, 0x00000000, 0xa60600f8, 0xc3c00000,
+    0xc2000000, 0x582c000c, 0xca010038, 0x00000000, 0x00000000, 0x5a200002, 0xc6100838, 0xcd010838,
+    0x5e60000e, 0x8400bf00, 0xc2200000, 0x582c0002, 0xce021008, 0x582c000c, 0xcfc10838, 0x582c0020,
+    0xcfc21078, 0x582c0010, 0xc1400000, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9,
+    0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd400018, 0x8000be68, 0xc2200004, 0x582c0002, 0xce021008,
+    0x582c000c, 0xcfc10838, 0x99007000, 0x582c0002, 0xc94000f8, 0xc1a20000, 0x8000be18, 0xc3e1fffe,
+    0x597dfffe, 0x593dfef4, 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0xc0800000, 0xdf4b0038,
+    0xc0004900, 0xcb8000f8, 0xc2000000, 0xc000490a, 0xa78000d0, 0xcbc000f8, 0xc1000000, 0xd90000f9,
+    0xc1000002, 0xd90c00f8, 0x6ff46000, 0x477da000, 0x5b744c80, 0xc2400000, 0x58340004, 0xca400078,
+    0xc0004900, 0xce000000, 0x5a640002, 0x58340004, 0xc6500078, 0xcd000078, 0xc0004914, 0xca4000f8,
+    0xc2000002, 0x6a3d0000, 0x72612000, 0xce4000f8, 0xc0000408, 0xce0000f8, 0xa78200c8, 0xc0004908,
+    0xcbc000f8, 0xc1000000, 0xd90000f9, 0xc1000002, 0xd90c00f8, 0x6ff4a000, 0x477da000, 0x5b744e20,
+    0xc2800000, 0x58340006, 0xca800078, 0xc2000000, 0xc0004900, 0xce002100, 0x5ea80002, 0x58340006,
+    0xc6900078, 0xcd000078, 0x5a7c0020, 0xc2000002, 0x6a250000, 0xc0000408, 0xce0000f8, 0xdca800f9,
+    0x5ea80000, 0x8400a860, 0x00000000, 0xa4800230, 0x00000000, 0xc3c00000, 0xc000140e, 0xcbc00018,
+    0xc3400000, 0xc2400000, 0x6ff86000, 0x47bdc000, 0x5bb84c80, 0x58380008, 0xcb400078, 0x58380006,
+    0xca400078, 0x5f740002, 0x58380008, 0xc7500078, 0xcd000078, 0xc2000000, 0x58380004, 0xca020078,
+    0xc3000000, 0x5838000c, 0xcb000020, 0x5a640002, 0x46610000, 0x84000010, 0xc2400000, 0x58380006,
+    0xc6500078, 0xcd000078, 0xc2000000, 0x5838000a, 0xca020078, 0x5b300002, 0x5838000c, 0xc7100020,
+    0xcd000020, 0xc2420020, 0x5a200004, 0x46252000, 0x84000010, 0xc2000000, 0x5838000a, 0xc6101078,
+    0xcd021078, 0xc000498c, 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000, 0xce4000f8, 0x5f740000,
+    0x84000040, 0xc0004912, 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8,
+    0x5f300020, 0x84000040, 0xc0004924, 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000, 0x762d0000,
+    0xce0000f8, 0xa4820070, 0xc2400000, 0xc000140e, 0xca408018, 0xc2000002, 0xc0004900, 0xce000000,
+    0xc000490a, 0xce4000f8, 0xc1000000, 0xd90000f9, 0xd8400078, 0xc1000004, 0xd90000f9, 0xa48402d8,
+    0x00000000, 0xc3c00000, 0xc000140e, 0xcbc10018, 0xc2800000, 0xc2000000, 0x6ff8a000, 0x47bdc000,
+    0x5bb84e20, 0x58380036, 0xca800078, 0x58380006, 0xca020078, 0xc3400000, 0x58380036, 0xcb420078,
+    0x5aa80002, 0x46a10000, 0x84000010, 0xc2800000, 0x58380036, 0xc6900078, 0xcd000078, 0x5f740002,
+    0x58380036, 0xc7501078, 0xcd021078, 0xc000498e, 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000,
+    0xce4000f8, 0xc000492a, 0xca8000f8, 0x5e740000, 0x84000040, 0xc0004910, 0xca0000f8, 0xc2c00002,
+    0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0x6abd4010, 0xa6800132, 0x00000000, 0x5838003a,
+    0xca0000f8, 0x58000002, 0xca4000f8, 0x5838000e, 0x00000000, 0xce0000f9, 0xce4000f8, 0xc2400000,
+    0xdd250038, 0xc1000080, 0x45248000, 0xc2400000, 0xc6240078, 0x46510000, 0x00000000, 0xc52400fc,
+    0x5d240078, 0xc1000078, 0xc52400fc, 0xc6600078, 0x5c000002, 0xce000078, 0xc000492a, 0xca0000f8,
+    0xc2c00002, 0x6afd6000, 0x722d0000, 0xce0000f8, 0xc000492c, 0xca0000f8, 0xc2c00002, 0x6afd6000,
+    0x722d0000, 0xce0000f8, 0x80000040, 0xc000492c, 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000,
+    0x762d0000, 0xce0000f8, 0xa4880088, 0xc2c00000, 0xc000140e, 0xcac20018, 0xc000490e, 0xca4000f8,
+    0xc2000002, 0x6a2d0000, 0x7e010000, 0x76612000, 0xce4000f8, 0xc0004990, 0xca4000f8, 0xc2000002,
+    0x6a2d0000, 0x72612000, 0xce4000f8, 0xa4860070, 0xc2400000, 0xc000140e, 0xca418018, 0xc2020002,
+    0xc0004900, 0xce002100, 0xc0004908, 0xce4000f8, 0xc1000000, 0xd90000f9, 0xd8400078, 0xc1000004,
+    0xd90000f9, 0xa48c00e8, 0xc2400000, 0xc000140e, 0xca430018, 0x00000000, 0x00000000, 0x5d240002,
+    0x84000058, 0xc00048c4, 0xca0000f8, 0xc00048c6, 0xc1040002, 0x72110000, 0xce0000f8, 0xc1000002,
+    0xc00048cc, 0xcd000000, 0x80000060, 0x5d240004, 0x84000050, 0xc00048c8, 0xca0000f8, 0xc00048ca,
+    0xc1160002, 0x72110000, 0xce0000f8, 0xc1020002, 0xc00048cc, 0xcd002100, 0xc0001408, 0xcc8000f8,
+    0xc10e0002, 0xd90c00f8, 0x8000f668, 0xdfbc00f9, 0xc0004992, 0x99007040, 0xc94000f8, 0xc7d800f8,
+    0x00000000, 0xc57000f8, 0x5ef00020, 0x88000158, 0x6f346000, 0x4771a000, 0x5b744c80, 0x58340008,
+    0xc2400000, 0xca400078, 0x00000000, 0xc2000000, 0x5a640002, 0xc6500078, 0xcd000078, 0x58340004,
+    0xca000078, 0x00000000, 0x00000000, 0x5e200002, 0xc6100078, 0xcd000078, 0xc0004912, 0xca8000f8,
+    0xc2400002, 0x6a712000, 0x72a54000, 0xce8000f8, 0x5e200000, 0x84000052, 0xc000480a, 0xca0000f8,
+    0xc0000408, 0xca8000f8, 0x76250000, 0x00000000, 0x72a14000, 0xce8000f8, 0x80000038, 0xc0004914,
+    0xca0000f8, 0x7e412000, 0x00000000, 0x76250000, 0xce0000f8, 0x800000c8, 0x6ef4a000, 0x476da000,
+    0x5b744e20, 0x58340036, 0xc2400000, 0xca420078, 0x00000000, 0xc2000000, 0x5a640002, 0xc6501078,
+    0xcd021078, 0x58340006, 0xca000078, 0x00000000, 0x00000000, 0x5a200002, 0xc6100078, 0xcd000078,
+    0xc0004910, 0xca4000f8, 0xc2000002, 0x6a2d0000, 0x72612000, 0xce4000f8, 0xc2000002, 0x6a310000,
+    0xc000042a, 0xce0000f8, 0xc1040002, 0xd90c00f8, 0x00000000, 0x8000f3d0, 0x00000000, 0xc4980928,
+    0x9d000000, 0xc5580028, 0xc0000838, 0xcd8400f8, 0xc1440200, 0xc1c01600, 0xc55c1070, 0xc000100e,
+    0x9d000000, 0xcd8000f8, 0xc000100c, 0xcdc000f8, 0xc0004862, 0xc9c000f8, 0x00000000, 0x00000000,
+    0xd9d800f9, 0xc0005600, 0x401c0000, 0x5dc05800, 0x88000012, 0x5c000200, 0xcd8000f8, 0xc1f0000a,
+    0x715ca000, 0xdd9800f8, 0xdd9c00f9, 0x41d8e000, 0xc5d40260, 0xc0001010, 0xcd4000f8, 0x6c9c8000,
+    0x45c8e000, 0x45c8e000, 0x59dc0004, 0xc1601260, 0xc5d40260, 0x9d000000, 0xc0001012, 0xcd4000f8,
+    0x00000000, 0x00000000, 0xd95800f8, 0x6d586000, 0x4594c000, 0x59984c80, 0xd99800f9, 0x5818000a,
+    0xc1800000, 0xc9800078, 0xc0005400, 0x6d5ca000, 0x401c0000, 0x40180000, 0xc94000f8, 0x58000002,
+    0x00000000, 0xc9c000f8, 0xc0004930, 0xcd4000f8, 0xc0004932, 0xcdc000f8, 0x59980004, 0xc1c20020,
+    0xb59c0018, 0x00000000, 0xc1800000, 0xdd9c00f9, 0x581c000a, 0xcd800078, 0x581c000c, 0xc1800000,
+    0xc9800020, 0xc1c00002, 0xdd9400f8, 0x69d4e000, 0x5d980002, 0xcd800020, 0xc0004924, 0xc98000f8,
+    0x00000000, 0x9d000000, 0x00000000, 0x719cc000, 0xcd8000f8, 0xc000492a, 0xc94000f8, 0xc1c00002,
+    0x69d8e000, 0x7dc0c000, 0x7558a000, 0xcd4000f8, 0xc000492c, 0xc94000f8, 0xdd8000f9, 0x5800003a,
+    0x755ca000, 0x84000108, 0xc94000f9, 0xc98000f8, 0xdd8000f9, 0x5800000e, 0x00000000, 0xcd4000f9,
+    0xcd8000f8, 0xc1800000, 0xdd190038, 0xc1000080, 0x45188000, 0xc1800000, 0xc5580078, 0x4590a000,
+    0x00000000, 0xc51800fc, 0x5d180078, 0xc1000078, 0xc51800fc, 0xc5940078, 0x5c000002, 0xcd400078,
+    0xc000492c, 0xc94000f8, 0xc000492a, 0xc98000f8, 0x715ca000, 0xc000492c, 0xcd4000f8, 0x719cc000,
+    0xc000492a, 0xcd8000f8, 0x9cc00000, 0x00000000, 0x00000000, 0x00000000, 0xc0004862, 0xc98000f8,
+    0x00000000, 0xc1c00200, 0x4194c000, 0x459ce000, 0x88000012, 0xc5d800f8, 0xc0004862, 0xcd8000f8,
+    0xc0001406, 0xc98000f8, 0xc1c00002, 0x9d000000, 0xc5d80a00, 0xc5581048, 0xcd8000f8, 0xc0004930,
+    0xc98000f8, 0xc0004932, 0xc9c000f8, 0xc140000e, 0xc5581c18, 0xdd9400f8, 0xc0005600, 0x40140000,
+    0x5d405800, 0x88000012, 0x5c000200, 0xcd8000f8, 0x58000002, 0x5d405800, 0x88000012, 0x5c000200,
+    0xcdc000f8, 0xdd5400f8, 0xc1c00000, 0x58140006, 0xc9c20078, 0xc1800000, 0x58140000, 0xc98000d8,
+    0x6ddc2000, 0xc000491e, 0x41d8e000, 0xcdc000f8, 0xdd9800f8, 0xc1c00022, 0xc5d80d70, 0xdd9400f9,
+    0xc5581c18, 0xc000491c, 0xcd8000f8, 0xdd5400f8, 0xc1c00000, 0x58140006, 0xc9c20078, 0xc1800000,
+    0x58140004, 0xc9820078, 0x00000000, 0x59dc0002, 0x45d8c000, 0x84000010, 0xc1c00000, 0x9d000000,
+    0x58140006, 0xc5d81078, 0xcd821078, 0xc0004860, 0xc94000f8, 0xc1820080, 0xc1d00002, 0x58146b00,
+    0xd58000f8, 0x58000002, 0xd58000f9, 0x59540004, 0xb5580018, 0xc0004860, 0xc1400000, 0xcd4000f8,
+    0xdd9800f9, 0x9d000000, 0xdd9400f8, 0xc0001404, 0xcdc10800, 0xc1c00000, 0xc1800200, 0x5d980004,
+    0xdf5d0048, 0x459ca000, 0x8800fff2, 0xdd8000f9, 0x5800000e, 0x00000000, 0xc94000f9, 0xc98000f8,
+    0xc1c00002, 0xc5d43f00, 0xc5d81e00, 0xc0004862, 0xc9c000f8, 0x00000000, 0x00000000, 0x581c5600,
+    0x5dc05800, 0x88000012, 0x5c000200, 0xcd4000f8, 0x58000002, 0x5dc05800, 0x88000012, 0x5c000200,
+    0xcd8000f8, 0xc0004862, 0xc9c000f8, 0x00000000, 0xc15004c0, 0xc5d40060, 0xdd9c00f8, 0xc5d41c18,
+    0xc1c00000, 0xdd8000f9, 0x58000038, 0xc9c00078, 0xdd8000f9, 0xc1800000, 0x58000002, 0xc98000d8,
+    0x6ddc2000, 0xc000491c, 0x41d8e000, 0xcd4000f9, 0xcdc000f8, 0xdd9400f9, 0xc1c00000, 0x58140038,
+    0xc9c00078, 0xc1800000, 0x58140006, 0xc9820078, 0x00000000, 0x59dc0002, 0x45d8c000, 0x84000010,
+    0xc1c00000, 0x9d000000, 0x58140038, 0xc5d80078, 0xcd800078, 0xc1c00000, 0xdf5c0038, 0x5ddc0080,
+    0x8400ffea, 0x00000000, 0x9d000000, 0x00000000, 0x00000000, 0x00000000, 0xc160fffe, 0xc0000a10,
+    0xc9440060, 0xc1a0fffe, 0x59980e28, 0xc000100c, 0xcd4000f8, 0xc000100e, 0xcd8000f8, 0xc0004962,
+    0xc98000f8, 0x00000000, 0xc170000a, 0x7158a000, 0x6c988000, 0x4588c000, 0x4588c000, 0x59980004,
+    0xc5940270, 0xc0001010, 0xcd4000f8, 0xc0004946, 0xc94000f8, 0x00000000, 0x00000000, 0x6d58a000,
+    0x6d5c4000, 0x459cc000, 0x4594c000, 0xc000494a, 0xc94000f8, 0xc0004948, 0xc9c000f8, 0x4194c000,
+    0xc1400012, 0xc55c1818, 0x9d000000, 0xc59c0268, 0xc0001012, 0xcdc000f8, 0xc1400000, 0x58000014,
+    0xc9410038, 0xc0004950, 0xc9c000f8, 0xc55800f8, 0xc5940838, 0xc5581078, 0xd99400f8, 0xc000493c,
+    0xc94000f8, 0xc0004954, 0xc98000f8, 0x59dc00a8, 0x45d4e000, 0x41d8e000, 0x5d5c0030, 0x88000010,
+    0xc1c00030, 0xc1800000, 0xc5d84028, 0xc1400000, 0xc5d40008, 0x5dd40002, 0x84000072, 0x5dd40004,
+    0x8400009a, 0x5dd40006, 0x840000c2, 0x5dd80026, 0x840000ea, 0xdd5400f8, 0xdd8000f9, 0x58000008,
+    0x40180000, 0xcd4000f8, 0x59980002, 0x8000ffc0, 0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000,
+    0xcd4000b8, 0x59980002, 0x8000ff88, 0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000, 0xcd400078,
+    0x59980002, 0x8000ff50, 0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000, 0xcd400038, 0x59980002,
+    0x8000ff18, 0x00000000, 0x9d000000, 0x00000000, 0x00000000, 0x00000000, 0x58000014, 0xc94000f8,
+    0xc0004954, 0xc9c000f8, 0xc0004950, 0xc9400078, 0xdd8000f9, 0x5800002a, 0x5d9c0000, 0x84000052,
+    0x5d9c0002, 0x84000052, 0x5d9c0004, 0x8400006a, 0xc55b0038, 0xc55c08b8, 0xcd800039, 0xcdc108b8,
+    0x80000060, 0xcd4000f8, 0x80000050, 0xc55900b8, 0xc55c1838, 0xcd8000b9, 0xcdc31838, 0x80000028,
+    0xc55a0078, 0xc55c1078, 0xcd800079, 0xcdc21078, 0x9d000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc1e00000, 0xa540001a, 0xc0000a14, 0xc1a20002, 0x9d000000, 0xcd863100, 0xc0000a1c, 0xcdc61038,
+    0x59540002, 0x6994e018, 0x61c0c008, 0x4194a000, 0x5d940040, 0x88000012, 0xc59400f8, 0x9d000000,
+    0xcd4000f8, 0x00000000, 0x00000000,
+};
+
+static unsigned int firmware_binary_data[] = {
+};
+
+
+#endif  //  IFXMIPS_PTM_FW_AMAZON_SE_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_ar9.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_ar9.h
new file mode 100644
index 0000000..a61d313
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_ar9.h
@@ -0,0 +1,473 @@
+#ifndef IFXMIPS_PTM_FW_AR9_H
+#define IFXMIPS_PTM_FW_AR9_H
+
+
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_fw_ar9.h
+** PROJECT      : UEIP
+** MODULES     	: PTM (ADSL)
+**
+** DATE         : 22 OCT 2007
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM Driver (PP32 Firmware)
+** COPYRIGHT    : 	Copyright (c) 2006
+**			Infineon Technologies AG
+**			Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 22 OCT 2007  Xu Liang        Initiate Version, v00.01
+*******************************************************************************/
+
+
+#define PTM_FW_VER_MAJOR        0
+#define PTM_FW_VER_MINOR        17
+
+
+static unsigned int firmware_binary_code[] = {
+    0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000,
+    0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x80005270, 0xc2000000, 0xda0800f9, 0x80005210,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x80005a00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc10e0002, 0xd90c00f8, 0xc0004808, 0xc84000f8, 0x80004ee0, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc3e1fffe, 0x597dfffe, 0x593dfef4, 0x900004d9, 0x00000000, 0x00000000, 0x00000000, 0x90cc0481,
+    0x00000000, 0x00000000, 0x00000000, 0xc3e0a262, 0x5bfc0022, 0xc0004002, 0xcfc000f8, 0xc0004810,
+    0xcbc000f8, 0x00000000, 0xc3800000, 0xc7f80038, 0x5fb80000, 0xc7fa0038, 0xc7bfe802, 0x5fb80000,
+    0x00000000, 0xc7bff802, 0xdbd400f9, 0xc00049a0, 0xc3800002, 0xa7ca006a, 0xc1200000, 0x5911fffe,
+    0xcd0000f9, 0xc1200000, 0x59102042, 0xcd0000f9, 0xc1000004, 0xcd0000f9, 0xc1200000, 0x59103a1e,
+    0xcd0000f9, 0x80000060, 0xc121fffe, 0x5911fffe, 0xcd0000f9, 0xc1203db8, 0x5910de82, 0xcd0000f9,
+    0xc1000006, 0xcd0000f9, 0xc120385a, 0x591033da, 0xcd0000f9, 0x5fb80002, 0x8800001a, 0x6ffe0010,
+    0x8000ff28, 0xdd7c00f9, 0xc3800000, 0xc7f86010, 0x5bb80008, 0xc3540002, 0x777da000, 0xc1000008,
+    0x4791c002, 0xcf8000f9, 0xdb900038, 0xc3800008, 0xc3720002, 0x777da000, 0xa7f00028, 0x47b9c002,
+    0xc1000000, 0xc7d26010, 0x4391c000, 0xcf8000f8, 0xdb900838, 0xc3c00000, 0xdbc800f9, 0xc0400000,
+    0xc11c0000, 0xc000082c, 0xcd05ce00, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc0400002, 0xc11c0000,
+    0xc000082c, 0xcd05ce00, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc0000824, 0x00000000, 0xcbc000f9,
+    0xcb8000f9, 0xcb4000f9, 0xcb0000f8, 0xc0004878, 0x5bfc4000, 0xcfc000f9, 0x5bb84000, 0xcf8000f9,
+    0x5b744000, 0xcf4000f9, 0x5b304000, 0xcf0000f8, 0xc0000a10, 0x00000000, 0xcbc000f9, 0xcb8000f8,
+    0xc0004874, 0x5bfc4000, 0xcfc000f9, 0x5bb84000, 0xcf8000f8, 0xc30001fe, 0xc000140a, 0xcf0000f8,
+    0xc3000000, 0x7f018000, 0xc000042e, 0xcf0000f8, 0xc000040e, 0xcf0000f8, 0xc3c1fffe, 0xc000490e,
+    0xcfc00078, 0xc000492c, 0xcfc00078, 0xc0004924, 0xcfc00038, 0xc0004912, 0xcfc00038, 0xc000498c,
+    0xcfc00038, 0xc000498e, 0xcfc00078, 0xc0004990, 0xcfc00078, 0xc3c00000, 0xc2800004, 0xc3000000,
+    0x7f018000, 0x6ff88000, 0x6fd44000, 0x4395c000, 0x5bb87e00, 0xc00049a0, 0xcb0000f8, 0x00000000,
+    0x58380006, 0xcf0000f8, 0xc321fffe, 0x5b31fffe, 0x58380024, 0xcf0000f8, 0x5bfc0002, 0xb7e8ff90,
+    0x00000000, 0xc3c00000, 0xc2800010, 0x6ff86000, 0x47bdc000, 0x5bb84c80, 0xc3400000, 0x58380004,
+    0xcb420078, 0x00000000, 0x58380008, 0xcf400078, 0x5bfc0002, 0xb7e8ffb0, 0x00000000, 0xc3c00000,
+    0xc2800004, 0xc3400022, 0xc3000000, 0x7f018000, 0xc2c00016, 0x6ff8a000, 0x47bdc000, 0x5bb87600,
+    0x58380008, 0xcf400038, 0xc00049a8, 0xcb0000f8, 0x00000000, 0x5838000a, 0xcf0000f8, 0xc321fffe,
+    0x5b31fffe, 0x5838000c, 0xcf0000f8, 0x58380034, 0xcec00038, 0x5bfc0002, 0xb7e8ff78, 0x00000000,
+    0x00000000, 0xc0004840, 0xc3e12624, 0x5bfc2320, 0xcfc000f9, 0xc3e02f2c, 0x5bfd2a28, 0xcfc000f9,
+    0xc3e03734, 0x5bfd3230, 0xcfc000f9, 0xc3e13e3c, 0x5bfc3b38, 0xcfc000f9, 0xc3e14644, 0x5bfc4340,
+    0xcfc000f9, 0xc3e04f4c, 0x5bfd4a48, 0xcfc000f9, 0xc3e05754, 0x5bfd5250, 0xcfc000f9, 0xc3e15e5c,
+    0x5bfc5b58, 0xcfc000f9, 0xc3e06764, 0x5bfd6260, 0xcfc000f9, 0xc3e16e6c, 0x5bfc6b68, 0xcfc000f9,
+    0xc3e17674, 0x5bfc7370, 0xcfc000f9, 0xc3e07f7c, 0x5bfd7a78, 0xcfc000f9, 0xc3e18684, 0x5bfc8380,
+    0xcfc000f9, 0xc3e08f8c, 0x5bfd8a88, 0xcfc000f9, 0xc3e09794, 0x5bfd9290, 0xcfc000f9, 0xc3e19e9c,
+    0x5bfc9b98, 0xcfc000f9, 0xc121fffe, 0x5911fef4, 0x14100000, 0x80000028, 0x00000000, 0x800004e8,
+    0x00000000, 0x8000ffe0, 0xc0004918, 0xd28000f8, 0xc2000000, 0xdf600038, 0x5e600080, 0x840002b2,
+    0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0xc000480a, 0xca0000f8, 0xc0004912, 0xca4000f8, 0xc0004924, 0xca8000f8,
+    0xc000498c, 0xcac000f8, 0xc121fffe, 0x5911fef4, 0x14100000, 0x76250000, 0x76290000, 0x762d0000,
+    0x840001ea, 0xc0004918, 0xca4000f8, 0xc28001fe, 0x76290000, 0x5a640002, 0x6a254010, 0x5ee80000,
+    0x8400001a, 0x6aa54000, 0x80000010, 0xc62800f8, 0x62818008, 0xc0004918, 0xcf0000f8, 0xc161fffe,
+    0x5955fffe, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc000498c, 0xca4000f8, 0xc2000002, 0x6a310000, 0x7e010000, 0x76612000, 0xce4000f8, 0xc121fffe,
+    0x5911fef4, 0x14100000, 0x6f346000, 0x4771a000, 0x5b744c80, 0xc2800000, 0x58340006, 0xca800078,
+    0xc2c00000, 0x58340000, 0xcac000d8, 0xc2400000, 0x5834000a, 0xca420078, 0x6ea82000, 0x42e9e000,
+    0x6f2ca000, 0x42e56000, 0x5aec3680, 0xc3990040, 0xc7381c18, 0xc6f80060, 0x99006480, 0xdb9800f8,
+    0xdbd800f9, 0x00000000, 0xdea000f8, 0x46310000, 0x8400fd40, 0xc000495a, 0xc84000f8, 0x00000000,
+    0xc3c00002, 0x787c2000, 0xcc4000f8, 0xc0000838, 0xc3800000, 0xcb840028, 0x6c748000, 0x6c544000,
+    0x4355a000, 0x5b747e00, 0x5ef80000, 0x8400fca2, 0x58340004, 0xcb0000f8, 0x00000000, 0x00000000,
+    0xa7060020, 0x00000000, 0x5ef80002, 0x8400fc62, 0x5834000c, 0xc8800038, 0xc2000000, 0xc000082c,
+    0xca040028, 0x5a880002, 0xc2400000, 0xc0004958, 0xce4000f8, 0xb6280018, 0x00000000, 0xc2800000,
+    0x58340002, 0xc2000000, 0xca020008, 0xc0004956, 0xce8000f8, 0x5e600000, 0x84001ca2, 0x5e600002,
+    0x84004062, 0x00000000, 0x800021d0, 0xc0004958, 0xca0000f8, 0xc0004956, 0xca8000f8, 0x5e200000,
+    0x84000020, 0xc2500002, 0xc0000838, 0xce450800, 0x6c748000, 0x6c544000, 0x4355a000, 0x5b747e00,
+    0x5834000c, 0xc6900038, 0xcd000038, 0x8000fb38, 0xc2000000, 0xdf600038, 0x5e200080, 0x8400028a,
+    0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0xc000480c, 0xca0000f8, 0xc0004910, 0xca4000f8, 0xc000492c, 0xca8000f8,
+    0xc000498e, 0xcac000f8, 0xc121fffe, 0x5911fef4, 0x14100000, 0x76250000, 0x76290000, 0x76e16000,
+    0x840001c2, 0xc0004926, 0xca4000f8, 0xc201fffe, 0x76e16000, 0x5a640002, 0x6ae50010, 0x5f200000,
+    0x8400001a, 0x6a250000, 0x80000010, 0xc6e000f8, 0x62014008, 0xc0004926, 0xce8000f8, 0xc161fffe,
+    0x5955fffe, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc000498e, 0xca4000f8, 0xc2000002, 0x6a290000, 0x7e010000, 0x76612000, 0xce4000f8, 0xc121fffe,
+    0x5911fef4, 0x14100000, 0x6eb4a000, 0x4769a000, 0x5b747600, 0x58340002, 0xc2000000, 0xca0000d8,
+    0x58340036, 0xc2400000, 0xca400078, 0x6eb0a000, 0x47298000, 0x5b303636, 0x5b300004, 0x6e642000,
+    0x4225e000, 0xc39a8024, 0xc7380060, 0xc6b81c18, 0x99006480, 0xdb9800f8, 0xdbd800f9, 0x00000000,
+    0xc2000000, 0xdf600038, 0x5e200080, 0x840002da, 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc000490e, 0xca0000f8,
+    0xc000492a, 0xca4000f8, 0xc0004990, 0xcb0000f8, 0xc000498a, 0xcac000f8, 0xc121fffe, 0x5911fef4,
+    0x14100000, 0x77218000, 0x77258000, 0x8400021a, 0xc201fffe, 0x77218000, 0x5aec0002, 0x6b2d0010,
+    0x5ea00000, 0x8400001a, 0x6a2d0000, 0x80000010, 0xc72000f8, 0x62016008, 0xc000498a, 0xcec000f8,
+    0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0xc0004990, 0xca4000f8, 0xc2000002, 0x6a2d0000, 0x7e010000, 0x76612000, 0xce4000f8,
+    0xc121fffe, 0x5911fef4, 0x14100000, 0x6ef4a000, 0x476da000, 0x5b747600, 0x58340010, 0xc2000000,
+    0xca0000d8, 0x58340008, 0xc2400000, 0xca420078, 0x5834000e, 0xc2800000, 0xca832010, 0xc3c00000,
+    0x47e48000, 0x6e644010, 0xc7e800fc, 0x42250000, 0x4229e000, 0xc39a8008, 0x58340008, 0xcb801038,
+    0x58340008, 0xc2800000, 0xca810010, 0x6ee0a000, 0x462d0000, 0x5a20000a, 0x5a203608, 0x42290000,
+    0xc6380060, 0xc6f81c18, 0x99006480, 0xdb9800f8, 0xdbd800f9, 0x00000000, 0xc000495c, 0xc84000f8,
+    0xc3400000, 0xc3c00002, 0x787c2000, 0xcc4000f8, 0x6c78a000, 0x4785c000, 0x5bb87600, 0x58380034,
+    0xcb410038, 0xc0000a28, 0xc3000000, 0xcb040028, 0xc0000a14, 0xc2c00000, 0x43358000, 0xcac40028,
+    0xc000490e, 0xca8000f8, 0x5eec0002, 0x472d8000, 0x8800f4c8, 0x6bc5e000, 0x76bd4000, 0x8400f4b0,
+    0x6c7ca000, 0x47c5e000, 0x5bfc7600, 0x583c0008, 0xc2000000, 0xca020078, 0xc00049aa, 0x00000000,
+    0xca8000f9, 0xca4000f8, 0xc0001008, 0xce8000f8, 0xc0001006, 0xce4000f8, 0x583c000a, 0xca4000f8,
+    0x00000000, 0xc000100a, 0xce4000f8, 0xc2400006, 0xc0001000, 0xce4000f8, 0xc2600982, 0x5a643b6e,
+    0xc0001002, 0xce4000f8, 0x583c000c, 0xca4000f8, 0x00000000, 0xc0001004, 0xce4000f8, 0x583c000e,
+    0xcb8000f8, 0x00000000, 0xc2400000, 0xc7a40078, 0xc2800000, 0xc7aae020, 0xdaa000f9, 0x583c0034,
+    0xcb8000f8, 0x00000000, 0xc2c00000, 0xc7ad0038, 0xc0004978, 0xcec000f8, 0xc0800000, 0xc7880038,
+    0xc3400000, 0xc7b60038, 0xc0004980, 0xcf4000f8, 0x4661c000, 0x43a9c000, 0xc2400000, 0xc000497c,
+    0xce4000f8, 0xad2c0001, 0xc2800000, 0x00000000, 0x80000010, 0xc2800002, 0xc0004976, 0xce8000f8,
+    0xc2c00000, 0xc34000a0, 0xdb5c00f9, 0xc3400002, 0xc000497a, 0xcf4000f8, 0x5f600000, 0x84000180,
+    0xde2800f9, 0xc6a000f8, 0x47a9c000, 0x583c0000, 0xc2800000, 0xca830038, 0xc0000a28, 0xc3000000,
+    0xcb040028, 0xc3400000, 0xc0004976, 0x46b18000, 0x8800006a, 0xcf4000f8, 0x58880002, 0xc3000000,
+    0xc0000a14, 0xcb040028, 0x00000000, 0x00000000, 0xb4b001a8, 0x00000000, 0xc0800000, 0x00000000,
+    0x80000188, 0xc0004980, 0xcb4000f8, 0x00000000, 0x00000000, 0x5af40002, 0xacec0080, 0x00000000,
+    0xc2c00000, 0xc000497a, 0xadec0001, 0x00000000, 0x00000000, 0xad2c007f, 0xc2800000, 0xce8000f8,
+    0x80000018, 0xc2800002, 0xce8000f8, 0x5f6c0000, 0x840000e8, 0x00000000, 0x8000ff00, 0x5f780082,
+    0x88000258, 0xc3000002, 0xc000497c, 0xcf0000f8, 0xc2800080, 0xc1000000, 0xdd110038, 0x46914000,
+    0x47a94000, 0x880001d8, 0x4391a000, 0xc0004980, 0xcf4000f8, 0x6f684010, 0x6f77c000, 0x6f77c010,
+    0xc0004840, 0x40280000, 0xca8000f8, 0xc3000000, 0x6f506000, 0x6a908010, 0xc5300038, 0xdb1c00f9,
+    0x8000fe30, 0xc3400000, 0xc0000a10, 0xcb440060, 0x6cb04000, 0x6f288000, 0x6f744000, 0x42b14000,
+    0x43694000, 0xc3400000, 0xc6b44060, 0xc0004000, 0x40340000, 0xc321e000, 0xcf0000f8, 0x5aa80008,
+    0x42ad4000, 0xc3400000, 0xc6b44060, 0xc0004000, 0x40340000, 0xca4000f8, 0xc3000000, 0xc6f00008,
+    0xc1400000, 0xddd40039, 0x6f306000, 0xc13001fe, 0x69308010, 0x7d008000, 0x76512000, 0x6d570000,
+    0x6970a010, 0x42552000, 0xce4000f8, 0x5aa80002, 0x5aec0002, 0xacec0080, 0x00000000, 0xc2c00000,
+    0x5f6c0000, 0x84000118, 0x00000000, 0x80000040, 0x4391a000, 0x5f740080, 0xc0004980, 0xcf4000f8,
+    0xc3000004, 0xc000497a, 0xcf0000f8, 0x58880002, 0xc3400000, 0xc0000a14, 0xcb440028, 0x00000000,
+    0x00000000, 0xb4b40018, 0x00000000, 0xc0800000, 0xc3400000, 0xc0000a10, 0xcb440060, 0x6cb04000,
+    0x6f248000, 0x6f744000, 0x42712000, 0x43654000, 0xc3400000, 0xc6b44060, 0xc0004000, 0x40340000,
+    0xc3201e00, 0xcf0000f8, 0x5aa80008, 0x42ad4000, 0xc000100c, 0xcb4000f8, 0xc3000000, 0x00000000,
+    0xc7340060, 0xc300fffe, 0xc7341070, 0xcf4000f8, 0xc000100e, 0xcb4000f8, 0xc3003608, 0x00000000,
+    0xc7340060, 0xc300fffe, 0xc7341070, 0xcf4000f8, 0xc0001010, 0xcb4000f8, 0xc3000002, 0x00000000,
+    0xc7341a00, 0xc7341800, 0xc3000000, 0xc7341900, 0xc6b40070, 0xcf4000f8, 0xc0004982, 0xce8000f8,
+    0x6c64a000, 0x46452000, 0x5a64000a, 0xc0001012, 0xcb4000f8, 0xc2800002, 0x00000000, 0xc6740260,
+    0xc6340008, 0xc000497c, 0xcb0000f8, 0xc6b41800, 0xc6b41b00, 0xc6b41c00, 0xc6b41d00, 0xc7341e00,
+    0xdd6800f9, 0x7e814000, 0x6eab2010, 0x76b14000, 0xc6b41f00, 0xc2800000, 0xc6b41900, 0xc3000080,
+    0x472d8000, 0xc0004982, 0xc90000f8, 0x47394000, 0x88000102, 0x41388000, 0xcd0000f8, 0xc7b41038,
+    0xc0004994, 0xce8000f8, 0xde1000f9, 0x45208000, 0x840000b0, 0xc1000000, 0xdd110038, 0x41388000,
+    0x412c8000, 0x5d100080, 0xc0004980, 0xcd0000f8, 0xc1000002, 0xc000497c, 0xcd0000f8, 0xc5341e00,
+    0xdd5000f9, 0x7d008000, 0xc5373f00, 0xc000497a, 0xc90000f8, 0x42390000, 0x43adc000, 0x59100002,
+    0xcd0000f8, 0x80000050, 0x42390000, 0x80000040, 0xc7341038, 0x41308000, 0xcd0000f8, 0x42310000,
+    0xc1000000, 0xc0004994, 0xcd0000f8, 0xc0001012, 0xcf4000f8, 0xc000493c, 0xce0000f8, 0xc0004984,
+    0xcf8000f8, 0xc000497a, 0xca4000f8, 0xc000497c, 0xca8000f8, 0x6c7ca000, 0x47c5e000, 0x5bfc7600,
+    0xc0004976, 0xcac000f8, 0xc0004978, 0xca0000f8, 0x5eec0002, 0x8400008a, 0x42250000, 0xc2400000,
+    0xc000497a, 0xce4000f8, 0x583c0000, 0xc2c00000, 0xcac30038, 0x00000000, 0x00000000, 0x46e16000,
+    0x8800001a, 0x00000000, 0xad280002, 0xc000497a, 0xce0000f8, 0xc2000000, 0x5fa80000, 0x840001da,
+    0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000018, 0xc90000f8, 0x00000000, 0x00000000,
+    0x59100002, 0xcd0000f8, 0x583c000e, 0xc2c00000, 0xcac00078, 0xc1000000, 0xdd532201, 0x42d16000,
+    0x6c508000, 0xc0004880, 0x40100000, 0x5800001a, 0xc90000f8, 0x00000000, 0x00000000, 0x412c8000,
+    0xcd0000f8, 0x99006510, 0xd85800f8, 0xdbd800f9, 0x00000000, 0x99006258, 0xc000491c, 0xc1400000,
+    0xc9420048, 0xc000491c, 0x99006710, 0xc94000f9, 0xc98000f8, 0x00000000, 0x99006480, 0xd95800f8,
+    0xd99800f9, 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x98c060d0, 0xd85800f8, 0xdbd800f9, 0xc45800f8, 0xc121fffe,
+    0x5911fef4, 0x14100000, 0xade80003, 0xc000493c, 0xcb4000f8, 0x00000000, 0xc3000000, 0xc7701078,
+    0x80000010, 0xc3000000, 0x583c0008, 0xcf021078, 0x6e210000, 0x583c0034, 0xce010838, 0xc0004980,
+    0xcb8000f8, 0x583c0034, 0x00000000, 0x6fba0000, 0xcf821038, 0xc000490e, 0xca0000f8, 0xc2c00002,
+    0x6ac56000, 0x722d0000, 0xce0000f8, 0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000,
+    0xc1220002, 0xd90c00f8, 0x5fa80000, 0x84000712, 0xc00049a8, 0xca0000f8, 0x583c000a, 0x00000000,
+    0xce0000f8, 0xc221fffe, 0x5a21fffe, 0x583c000c, 0xce0000f8, 0xc0001004, 0xca0000f8, 0x00000000,
+    0x583c0012, 0x7e010000, 0xce0000f8, 0xa97000e1, 0x00000000, 0x00000000, 0xa97200c9, 0xc0001010,
+    0xc2740000, 0xce435a00, 0x6c64a000, 0x46452000, 0x5a64000a, 0x6e644000, 0xc0001012, 0xce400070,
+    0xc2600008, 0xce421038, 0xc27e0002, 0xce43ff00, 0xc2760002, 0xce437b00, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0xc1000000,
+    0xdd110038, 0x5d100000, 0x84000412, 0xc0004982, 0xca0000f8, 0xc0004984, 0xca4000f8, 0xc2800000,
+    0xc361fffe, 0x5b75fffe, 0xa96a001b, 0xdfec00f8, 0xc6ec1078, 0x7af56000, 0x6c40a000, 0x44040000,
+    0x58007600, 0x58000014, 0xcec000f8, 0xa972001b, 0x5c000002, 0xcec000f8, 0xc0001010, 0xc2f40002,
+    0xcec35a00, 0x6c6ca000, 0x46c56000, 0x5aec000a, 0x6eec4000, 0xc0001012, 0xcec00070, 0xc0004994,
+    0xc98000f8, 0xc1400000, 0xdd150038, 0xc55c00f8, 0x45948000, 0x00000000, 0xc59c00fc, 0x5d1c0000,
+    0x840000d2, 0xc0001012, 0xc5d01038, 0xcd021038, 0xc2f60002, 0xcec37b00, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0x45948000,
+    0x88000052, 0xc0004994, 0xcd0000f8, 0xc0004980, 0xcbc000f8, 0x42150000, 0xc0004982, 0xce0000f8,
+    0x5ffc0000, 0x84000218, 0x58880002, 0xc3800000, 0xc0000a14, 0xcb840028, 0xc3c00000, 0xc0000a10,
+    0xb4b80018, 0x00000000, 0xc0800000, 0xcbc40060, 0x6cb84000, 0x6fac8000, 0x6ffc4000, 0x42f96000,
+    0x43ed0000, 0xc3400000, 0xc6344060, 0xc0004000, 0x40340000, 0xc2a1e000, 0xce8000f8, 0x5a200008,
+    0xc0004980, 0xcbc000f8, 0xc3400000, 0xc0004840, 0x6ff84010, 0xc7f40008, 0x40380000, 0xcb8000f8,
+    0xc2800000, 0x6f506000, 0x6b908010, 0xc52c1838, 0xc3400000, 0xc6344060, 0xc0004000, 0x40340000,
+    0xcec000f8, 0x5a200002, 0x5ffc0000, 0x84000092, 0xc0001010, 0xc62c0070, 0xcec00070, 0xc0001012,
+    0xc7ec1038, 0xcec21038, 0xc2f60002, 0xcec37b00, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0xc0004994, 0xc100007e, 0x453c8000,
+    0xcd0000f8, 0x423d0000, 0xc0004982, 0xce0000f8, 0xc0004994, 0xca0000f8, 0xc0004980, 0xca4000f8,
+    0x5e200000, 0x8400015a, 0xc2000000, 0xc2800000, 0x5a640002, 0xc6684028, 0xc0004982, 0xcb0000f8,
+    0xc0004000, 0xc2c00000, 0xc72c4060, 0x402c0000, 0x6e67c000, 0x6e67c010, 0x5ee40002, 0x8400003a,
+    0x5ee40004, 0x8400004a, 0x5ee40006, 0x8400005a, 0x00000000, 0x80000060, 0xce0000b8, 0x5aa80002,
+    0x5b300006, 0x80000040, 0xce000078, 0x5aa80002, 0x5b300004, 0x80000020, 0xce000038, 0x5aa80002,
+    0x5b300002, 0x5ee80020, 0x84000052, 0xc0004000, 0xc2c00000, 0xc72c4060, 0x402c0000, 0xce0000f8,
+    0x5aa80002, 0x5b300008, 0x8000ffb8, 0x00000000, 0x80000040, 0x583c000a, 0xd7c000f8, 0xc0001004,
+    0xca4000f8, 0x00000000, 0x583c000c, 0xce4000f8, 0xc000497a, 0xca4000f8, 0xc2800002, 0xc0000a28,
+    0xc6780928, 0xc6b80800, 0xcf850830, 0x6c7ca000, 0x47c5e000, 0x5bfc7600, 0x583c0034, 0xc4900038,
+    0xcd000038, 0x8000e418, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec7e00, 0xc0000824, 0xca0400f8,
+    0x6ca48000, 0x42492000, 0xc3000000, 0xc3400000, 0x42250000, 0x58204000, 0xca4000f8, 0x5a200002,
+    0xda2400f9, 0xc2800000, 0xc000495e, 0xce8000f8, 0xda6000f8, 0xc2800000, 0xc66b0038, 0xdaa800f8,
+    0x582c0010, 0x6f206010, 0x40200000, 0xd82800f9, 0xca0000f8, 0xc2400000, 0xc7240010, 0x6e644000,
+    0xda6400f8, 0x6a254010, 0xc3c00000, 0xc6bc0018, 0xc3800000, 0xdea000f8, 0x5e60001e, 0x8400002a,
+    0x5e6001e0, 0x8400001a, 0x00000000, 0x80000080, 0xc7f800f8, 0x5e7c0008, 0x8400006a, 0x5bbc0002,
+    0x5e780008, 0x84000028, 0x5b740002, 0xc0004960, 0xcf0000f8, 0x80000030, 0x5e780006, 0x88000022,
+    0xc2800002, 0xc000495e, 0xce8000f8, 0xde8000f9, 0xca8000f8, 0xde6000f8, 0xc240001e, 0x6a612000,
+    0x7e412000, 0x76a54000, 0x6ba12000, 0x72a54000, 0xce8000f8, 0x5e300080, 0x840000ba, 0xc2000000,
+    0xc7200008, 0x5e600000, 0x84000058, 0xde6000f9, 0x58204000, 0xca4000f8, 0x5a200002, 0xda2400f9,
+    0xc2800000, 0xc66b0038, 0xdaa800f8, 0xda6000f8, 0x80000038, 0xc2800000, 0x6e206000, 0xde2400f8,
+    0x6a610000, 0xc62b0038, 0xdaa800f8, 0x5b300002, 0x8000fde0, 0xc2000000, 0x582c0020, 0xca020078,
+    0x00000000, 0xc2400000, 0x5a200002, 0xc6241078, 0xce421078, 0xc000480e, 0xca8000f8, 0x5e740000,
+    0x84000160, 0x46a12000, 0x8800e048, 0xc2400000, 0xc0000808, 0xca440010, 0x582c0010, 0xc1400000,
+    0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9,
+    0xcd400018, 0x582c0020, 0xce021078, 0xc2000010, 0x5a640002, 0xb6240018, 0x00000000, 0xc2400000,
+    0xc6600010, 0xc0000808, 0xce040010, 0xc0004956, 0xca4000f8, 0xc11c0000, 0xc000082c, 0xcd05ce00,
+    0xc6600928, 0xc2400000, 0xc6600028, 0xc0000838, 0xce0400f8, 0xc2400002, 0xc0004958, 0xce4000f8,
+    0xc11c0002, 0xc000082c, 0xcd05ce00, 0x8000df00, 0xc000495e, 0xca0000f8, 0x5e740002, 0x8400dee0,
+    0x5e200000, 0x8400ded0, 0xc0004960, 0xca4000f8, 0xc2200004, 0x582c0002, 0xce021008, 0xc2000082,
+    0x46250000, 0xc6280030, 0xc0000810, 0xce840030, 0x99006ba8, 0x582c0002, 0xc94000f8, 0xc1a20000,
+    0x5e640000, 0x8400fed0, 0x00000000, 0x8000de40, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec7e00,
+    0xc000487c, 0xc80400f8, 0x00000000, 0x00000000, 0x40080000, 0xcb8000f8, 0xc42400f8, 0x00000000,
+    0xa78601a0, 0xc3c00000, 0xc2000000, 0x582c000c, 0xca010038, 0x6c508000, 0xc0004880, 0x40100000,
+    0x58000016, 0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x5a200002, 0x582c000c,
+    0xc6100838, 0xcd010838, 0x5e600002, 0x84000020, 0xc2200004, 0x582c0002, 0xce021008, 0x5e600008,
+    0x84000060, 0xc2200002, 0x582c0002, 0xce021008, 0x582c000c, 0xcfc10838, 0xc2220002, 0xc0000a14,
+    0xce063100, 0xc22001a2, 0xc0000a1c, 0xce061038, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec7e00,
+    0x582c0004, 0xcb0000f8, 0xc3400000, 0x00000000, 0xa7060028, 0xcf406300, 0xc3100002, 0xc0000838,
+    0xcf050800, 0x582c000c, 0xcf421000, 0x8000dc40, 0x582c000c, 0xcfc10838, 0xc2000000, 0xc7a06010,
+    0x5e200000, 0x84001c08, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec7e00, 0xc000487c, 0xc80400f8,
+    0x00000000, 0x00000000, 0x40080000, 0xcb8000f8, 0xc42400f8, 0x00000000, 0xc2800000, 0xc3400000,
+    0xc7b5c030, 0xc0004970, 0xcf4000f8, 0xc2400000, 0xc7a4e030, 0xc000496c, 0xce4000f8, 0xc3000000,
+    0xc7b00010, 0xc3c00004, 0xc000496e, 0xcfc000f8, 0x582c000c, 0xca0000f8, 0xc2400002, 0xc0004964,
+    0xce4000f8, 0xa6200372, 0x00000000, 0x5e700004, 0x840000ea, 0x5e700006, 0x84000080, 0xc2000002,
+    0x582c0002, 0xce000000, 0xc0000a14, 0xce863100, 0x6c508000, 0xc0004880, 0x40100000, 0x58000014,
+    0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x80001a58, 0x5e70000a, 0x84000040,
+    0xc2000000, 0x582c0002, 0xce000000, 0xc2220002, 0xc0000a14, 0xce063100, 0x8000ff70, 0x5e700008,
+    0x84000228, 0xc2200002, 0x582c000c, 0xce021000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000012,
+    0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x5e340002, 0x6c508000, 0xc0004880,
+    0x40100000, 0x58000010, 0xc90000f8, 0x00000000, 0x00000000, 0x41208000, 0xcd0000f8, 0xc0000a14,
+    0xce863100, 0xc0004970, 0xcb4000f8, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec7e00, 0x582c000e,
+    0xc4900038, 0xcd000038, 0x582c000e, 0xc7500838, 0xcd010838, 0xc2800000, 0x582c0004, 0xce821078,
+    0x582c0004, 0xce800000, 0xc00049a0, 0xca4000f8, 0x00000000, 0x582c0006, 0xce4000f8, 0xc261fffe,
+    0x5a65fffe, 0x582c0024, 0xce4000f8, 0xc2060002, 0x582c0004, 0xce006300, 0xc2400002, 0xc0004958,
+    0xce4000f8, 0xc0004878, 0xc80400f8, 0x6c908000, 0x41088000, 0x40100000, 0x58000020, 0xc90000f8,
+    0x582c0026, 0x00000000, 0xcd0000f8, 0x800017e8, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000,
+    0x58000016, 0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x8000faf0, 0x5e700000,
+    0x840000c0, 0xc3400082, 0xc0004970, 0xcf4000f8, 0xc2400080, 0xc000496c, 0xce4000f8, 0xc3c00002,
+    0xc000496e, 0xcfc000f8, 0xc2400000, 0xc0004964, 0xce4000f8, 0xc0004878, 0xc80400f8, 0x6c908000,
+    0x41088000, 0x40100000, 0x58000020, 0xc90000f8, 0x582c0026, 0x00000000, 0xcd0000f8, 0x80000078,
+    0x5e700002, 0x84000058, 0xc3400082, 0xc0004970, 0xcf4000f8, 0xc3c00004, 0xc000496e, 0xcfc000f8,
+    0xc2200000, 0x582c000c, 0xce021000, 0x80000030, 0x5e700004, 0x8400fe80, 0xc2600002, 0x582c000c,
+    0xce421000, 0xc0000a14, 0xce863100, 0xc000496c, 0xca4000f8, 0x6c508000, 0xc0004880, 0x40100000,
+    0x58000012, 0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0xc000496e, 0xcbc000f8,
+    0x00000000, 0x00000000, 0x477d0000, 0x46250000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000010,
+    0xc90000f8, 0x00000000, 0x00000000, 0x41208000, 0xcd0000f8, 0x6c6c8000, 0x6c544000, 0x42d56000,
+    0x5aec7e00, 0x582c0004, 0xca0000f8, 0x00000000, 0x00000000, 0xa60014e2, 0x00000000, 0x6c6c8000,
+    0x6c544000, 0x42d56000, 0x5aec7e00, 0xc3000000, 0x582c0004, 0xcf006300, 0x582c0000, 0xcb002010,
+    0xc3c00000, 0x582c0004, 0xcbc20078, 0xc000491a, 0xcf0000f8, 0xc000493c, 0xcfc000f8, 0x582c0008,
+    0xcb8000f8, 0x582c000a, 0xca4000f8, 0xc0004930, 0xcf8000f8, 0xc0004932, 0xce4000f8, 0x5ffc0000,
+    0x840001f0, 0x00000000, 0xa7be0102, 0xc2800000, 0x6f206000, 0x46310000, 0x5a204c80, 0x5820000c,
+    0xca800020, 0x00000000, 0x00000000, 0x5ea80000, 0x84000112, 0x00000000, 0xc161fffe, 0x5955fffe,
+    0x14140000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x99005f70,
+    0xc000491a, 0xc94000f8, 0x00000000, 0xc121fffe, 0x5911fef4, 0x14100000, 0xc0004930, 0xcb8000f8,
+    0xc0004932, 0xca4000f8, 0xc4781108, 0xc0004930, 0xcf8000f8, 0x582c0008, 0xcf8000f8, 0x582c000a,
+    0xce4000f8, 0xc7b6e108, 0x582c0004, 0xcf402108, 0x80000090, 0x00000000, 0x6c508000, 0xc0004880,
+    0x40100000, 0x5800000c, 0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0xc2000002,
+    0x582c0004, 0xce000000, 0xc0000838, 0xc2500002, 0xce450800, 0x80001220, 0x6c7c8000, 0x6c544000,
+    0x43d5e000, 0x5bfc7e00, 0x583c0006, 0xca0000f8, 0xc00049a2, 0x00000000, 0xca8000f9, 0xca4000f8,
+    0xc0001008, 0xce8000f8, 0xc0001006, 0xce4000f8, 0xc000100a, 0xce0000f8, 0xc2400006, 0xc0001000,
+    0xce4000f8, 0xc2600982, 0x5a643b6e, 0xc0001002, 0xce4000f8, 0x583c0024, 0xca4000f8, 0x00000000,
+    0xc0001004, 0xce4000f8, 0xc0004862, 0xc2000000, 0xca000078, 0xc360fffe, 0xc0004862, 0xce0000f8,
+    0xc0000824, 0xcb440060, 0x00000000, 0xc000100e, 0xcf4000f8, 0xc3803800, 0xc2400200, 0x6e644000,
+    0xc6781070, 0xc000100c, 0xcf8000f8, 0xc3200a00, 0xc0001010, 0xcf031810, 0xc2e06200, 0xc0001012,
+    0xcec31838, 0xc2000000, 0x583c0004, 0xca002008, 0xc2800000, 0xc0004966, 0xce0000f8, 0xc62400f8,
+    0xc3000000, 0xc000496a, 0xcf0000f8, 0xc0004974, 0xcf0000f8, 0xc000493c, 0xcb4000f8, 0x583c000e,
+    0x00000000, 0x5f740000, 0x84000180, 0xc3400000, 0xcb410038, 0xc3000002, 0xc000496a, 0x5fb40080,
+    0x84000152, 0xcf0000f8, 0x583c000e, 0xc2c00000, 0xcac00038, 0xc3800080, 0x47b5c000, 0xc0004974,
+    0xcf8000f8, 0xc0001012, 0x6fba0000, 0xcf821038, 0x6fba0010, 0x43a5c000, 0x5b380006, 0x6f284010,
+    0xc7a40008, 0x6eec4000, 0x6ef08000, 0x432d8000, 0x43358000, 0x5b300008, 0xc0001012, 0xc7100070,
+    0xcd000070, 0xc2000200, 0xc2c00000, 0xdf6d0048, 0x462d6000, 0x46e96000, 0x8800ffe2, 0xc2000000,
+    0xc0004862, 0xca000260, 0x00000000, 0x583c0004, 0xca002008, 0xc3360002, 0xc0001010, 0xce000070,
+    0xc0001012, 0xcf037b00, 0xc0004974, 0xcb8000f8, 0x00000000, 0x00000000, 0x5fb80000, 0x84000042,
+    0x00000000, 0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0xc000496c,
+    0xcac000f8, 0x00000000, 0x00000000, 0x426dc000, 0x5b380006, 0x6f304010, 0xc7a40008, 0xc0004968,
+    0xce4000f8, 0xc000496e, 0xcb4000f8, 0x6ca44000, 0x6e608000, 0x42250000, 0x5a200006, 0x42350000,
+    0xc0001012, 0xc6100070, 0xcd000070, 0x6eee0000, 0xcec21038, 0xc2000200, 0xc2c00000, 0xdf6d0048,
+    0x462d6000, 0x42b14000, 0x46e96000, 0x8800ffda, 0xc000493c, 0xcb4000f8, 0xc0000838, 0xc3100002,
+    0x5f740000, 0x84000060, 0xcf050800, 0xc0004974, 0xcb8000f8, 0x00000000, 0x00000000, 0x5fb80000,
+    0x8400006a, 0xc0001012, 0xc3360002, 0xcf037b00, 0x800000a0, 0x583c0022, 0xcb4000f8, 0xc0004862,
+    0xca0000f8, 0x00000000, 0xc0007800, 0x40200000, 0xcf4000f8, 0xc2000000, 0xc0004862, 0xca000260,
+    0x00000000, 0x583c0004, 0xca002008, 0xc3360002, 0xc0001010, 0xce000070, 0xc0001012, 0xcf037b00,
+    0xc0004968, 0xcbc000f8, 0xc0004964, 0xca4000f8, 0xc7e000f8, 0x00000000, 0x5e640000, 0x84000012,
+    0xc2000000, 0xc0004974, 0xca4000f8, 0xc000496c, 0xca8000f8, 0xc000493c, 0xcb8000f8, 0x42698000,
+    0x00000000, 0x43b1a000, 0x5ef40080, 0x8800019a, 0xc0004966, 0xcac000f8, 0x6c648000, 0x6c544000,
+    0x42552000, 0x5a647e00, 0x58240000, 0x436da000, 0x4761a000, 0xc2400000, 0xca420078, 0x00000000,
+    0x00000000, 0x46752000, 0x88000122, 0x432d8000, 0x47218000, 0x88000010, 0xc3000000, 0x5b300006,
+    0x6f304010, 0xc000493a, 0xcf0000f8, 0xc0004932, 0xc2400000, 0xca4000d8, 0x00000000, 0x6fb84010,
+    0x42792000, 0xc000491e, 0xce4000f8, 0xc0004862, 0xca8000f8, 0x00000000, 0xc2c0000a, 0xc6e80d70,
+    0xc7281048, 0xc000491c, 0xce8000f8, 0x6c708000, 0x6c544000, 0x43158000, 0x5b307e00, 0x6f760000,
+    0x58300004, 0xcf421078, 0x6ffc2000, 0x58300004, 0xcfc02108, 0x800000d0, 0x6c708000, 0x6c544000,
+    0x43158000, 0x5b307e00, 0xc2800002, 0x58300004, 0xce800000, 0x6c508000, 0xc0004880, 0x40100000,
+    0x5800000e, 0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x00000000, 0x00000000,
+    0x00000000, 0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0x80000920, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0xc0004964, 0xca0000f8,
+    0x6c7c8000, 0x6c544000, 0x43d5e000, 0x5bfc7e00, 0xdfe400f8, 0x5e200002, 0x84000608, 0x00000000,
+    0x583c0004, 0xc2800000, 0xca820078, 0xc0004930, 0xcac000f8, 0x00000000, 0x00000000, 0x6eece000,
+    0x6eefc010, 0x46aca000, 0xc1000000, 0xdd500039, 0x6d106010, 0x4550a000, 0xc1000000, 0xdd514201,
+    0x4550c000, 0xa95000f1, 0xc00049a6, 0xca0000f8, 0xa94a0023, 0x00000000, 0x6e660000, 0x6e660010,
+    0x46612000, 0x840000b2, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000004, 0xc90000f8,
+    0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x6c508000, 0xc0004880, 0x40100000, 0x58000006,
+    0xc90000f8, 0x00000000, 0x00000000, 0x41148000, 0xcd0000f8, 0x80000720, 0x00000000, 0xa95203c1,
+    0xc0001004, 0xcb8000f8, 0xc3400000, 0xdd740039, 0x5f740000, 0x840000d0, 0xc1218e08, 0x5911baf6,
+    0x45388000, 0x84000372, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000008, 0xc90000f8,
+    0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x6c508000, 0xc0004880, 0x40100000, 0x5800000a,
+    0xc90000f8, 0x00000000, 0x00000000, 0x41148000, 0xcd0000f8, 0x80000620, 0x00000000, 0xc000496c,
+    0xcb0000f8, 0x583c0026, 0xcac000f8, 0xc0004878, 0xc80400f8, 0x6c908000, 0x41088000, 0x40100000,
+    0x58000002, 0xca8000f8, 0x00000000, 0x00000000, 0x6ea90000, 0x5d300008, 0x8800004a, 0x59300002,
+    0xc3000000, 0xc5300008, 0x6d104010, 0x40100000, 0xca8000f8, 0x5c000002, 0xcac000f8, 0x5d300000,
+    0x8400003a, 0x6f246000, 0x6ae56000, 0xc1000040, 0x45252000, 0x6aa54010, 0x42e96000, 0x583c0026,
+    0xcec000f8, 0xc1218e08, 0x5911baf6, 0xc0001004, 0xcd0000f8, 0x593c0026, 0xc000100e, 0xcd000060,
+    0xc1340000, 0xc0001010, 0xcd035a00, 0xc1200008, 0xa94a0023, 0xc0001012, 0xc1200004, 0x59100004,
+    0xcd0000b8, 0xc1360002, 0xcd037b00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xa8e2ffe8, 0x00000000, 0xc1220002, 0xd90c00f8, 0xc0001004, 0xc90000f8, 0x00000000, 0x00000000,
+    0x45388000, 0x840000b2, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000008, 0xc90000f8,
+    0x00000000, 0x00000000, 0x59100002, 0xcd0000f8, 0x6c508000, 0xc0004880, 0x40100000, 0x5800000a,
+    0xc90000f8, 0x00000000, 0x00000000, 0x41148000, 0xcd0000f8, 0x80000360, 0x00000000, 0x6c508000,
+    0xc0004880, 0x40100000, 0x58000000, 0xc90000f8, 0x00000000, 0x00000000, 0x59100002, 0xcd0000f8,
+    0x6c508000, 0xc0004880, 0x40100000, 0x58000002, 0xc90000f8, 0x00000000, 0x00000000, 0x41148000,
+    0xcd0000f8, 0xc0004930, 0xcd800078, 0xc3000000, 0x583c0008, 0xcf0000f8, 0x80000038, 0xc0001004,
+    0xca0000f8, 0x583c0006, 0xce4000f8, 0x583c0024, 0xce0000f8, 0xc0004862, 0xc2000000, 0xca000078,
+    0xc000493a, 0xca4000f8, 0x00000000, 0x00000000, 0x42254000, 0x5ee80200, 0x88000012, 0xc6e800f8,
+    0xc0004000, 0x58003800, 0x40280000, 0xcb8000f8, 0x00000000, 0x583c0022, 0xcf8000f8, 0xc0004862,
+    0xce800078, 0xc0001406, 0xcac000f8, 0xc2800002, 0x00000000, 0xc66c1048, 0xc6ac0a00, 0xcec000f8,
+    0xc2000000, 0xdf600038, 0x5e600080, 0x8400ffea, 0xc000491c, 0xca4000f8, 0xc000491e, 0xca8000f8,
+    0x99006480, 0xda5800f8, 0xda9800f9, 0x00000000, 0xc0004964, 0xcbc000f8, 0x00000000, 0x00000000,
+    0x5ffc0000, 0x84000102, 0xc2000000, 0xdf610048, 0x5e6001fe, 0x8800ffe8, 0xc000491a, 0xc98000f8,
+    0xc0004862, 0xc94000f8, 0x6d9c6000, 0x45d8e000, 0x59dc4c80, 0x990062e0, 0xd95800f8, 0xd99800f9,
+    0xd9d400f8, 0x99006258, 0xc000491c, 0xc1400000, 0xc9420048, 0xc2000000, 0xdf600038, 0x5e600080,
+    0x8400ffea, 0xc000491c, 0xca4000f8, 0xc000491e, 0xca8000f8, 0x99006480, 0xda5800f8, 0xda9800f9,
+    0x00000000, 0xc0004970, 0xcb4000f8, 0x00000000, 0x00000000, 0x5e740082, 0x8400e6d8, 0x00000000,
+    0x8000c018, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000016, 0xc90000f8, 0x00000000,
+    0x00000000, 0x59100002, 0xcd0000f8, 0x8000e308, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec7e00,
+    0xc000487c, 0xc80400f8, 0x00000000, 0x00000000, 0x40080000, 0xca0000f8, 0xc42400f8, 0x00000000,
+    0xa60600f8, 0xc3c00000, 0xc2000000, 0x582c000c, 0xca010038, 0x00000000, 0x00000000, 0x5a200002,
+    0xc6100838, 0xcd010838, 0x5e60000e, 0x8400bf00, 0xc2200000, 0x582c0002, 0xce021008, 0x582c000c,
+    0xcfc10838, 0x582c0020, 0xcfc21078, 0x582c0010, 0xc1400000, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9,
+    0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd4000f9, 0xcd400018, 0x8000be68, 0xc2200004,
+    0x582c0002, 0xce021008, 0x582c000c, 0xcfc10838, 0x99006ba8, 0x582c0002, 0xc94000f8, 0xc1a20000,
+    0x8000be18, 0xc3e1fffe, 0x597dfffe, 0x593dfef4, 0x94000001, 0x00000000, 0x00000000, 0x00000000,
+    0xc0800000, 0xdf4b0038, 0xc0004900, 0xcb8000f8, 0xc2000000, 0xc000490a, 0xa78000d0, 0xcbc000f8,
+    0xc1000000, 0xd90000f9, 0xc1000002, 0xd90c00f8, 0x6ff46000, 0x477da000, 0x5b744c80, 0xc2400000,
+    0x58340004, 0xca400078, 0xc0004900, 0xce000000, 0x5a640002, 0x58340004, 0xc6500078, 0xcd000078,
+    0xc0004914, 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000, 0xce4000f8, 0xc0000408, 0xce0000f8,
+    0xa78200c8, 0xc0004908, 0xcbc000f8, 0xc1000000, 0xd90000f9, 0xc1000002, 0xd90c00f8, 0x6ff4a000,
+    0x477da000, 0x5b747600, 0xc2800000, 0x58340006, 0xca800078, 0xc2000000, 0xc0004900, 0xce002100,
+    0x5ea80002, 0x58340006, 0xc6900078, 0xcd000078, 0x5a7c0020, 0xc2000002, 0x6a250000, 0xc0000408,
+    0xce0000f8, 0xdca800f9, 0x5ea80000, 0x8400abd0, 0x00000000, 0xa4800230, 0x00000000, 0xc3c00000,
+    0xc000140e, 0xcbc00018, 0xc3400000, 0xc2400000, 0x6ff86000, 0x47bdc000, 0x5bb84c80, 0x58380008,
+    0xcb400078, 0x58380006, 0xca400078, 0x5f740002, 0x58380008, 0xc7500078, 0xcd000078, 0xc2000000,
+    0x58380004, 0xca020078, 0xc3000000, 0x5838000c, 0xcb000020, 0x5a640002, 0x46610000, 0x84000010,
+    0xc2400000, 0x58380006, 0xc6500078, 0xcd000078, 0xc2000000, 0x5838000a, 0xca020078, 0x5b300002,
+    0x5838000c, 0xc7100020, 0xcd000020, 0xc2420020, 0x5a200004, 0x46252000, 0x84000010, 0xc2000000,
+    0x5838000a, 0xc6101078, 0xcd021078, 0xc000498c, 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000,
+    0xce4000f8, 0x5f740000, 0x84000040, 0xc0004912, 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000,
+    0x762d0000, 0xce0000f8, 0x5f300020, 0x84000040, 0xc0004924, 0xca0000f8, 0xc2c00002, 0x6afd6000,
+    0x7ec16000, 0x762d0000, 0xce0000f8, 0xa4820070, 0xc2400000, 0xc000140e, 0xca408018, 0xc2000002,
+    0xc0004900, 0xce000000, 0xc000490a, 0xce4000f8, 0xc1000000, 0xd90000f9, 0xd8400078, 0xc1000004,
+    0xd90000f9, 0xa48402d8, 0x00000000, 0xc3c00000, 0xc000140e, 0xcbc10018, 0xc2800000, 0xc2000000,
+    0x6ff8a000, 0x47bdc000, 0x5bb87600, 0x58380036, 0xca800078, 0x58380006, 0xca020078, 0xc3400000,
+    0x58380036, 0xcb420078, 0x5aa80002, 0x46a10000, 0x84000010, 0xc2800000, 0x58380036, 0xc6900078,
+    0xcd000078, 0x5f740002, 0x58380036, 0xc7501078, 0xcd021078, 0xc000498e, 0xca4000f8, 0xc2000002,
+    0x6a3d0000, 0x72612000, 0xce4000f8, 0xc000492a, 0xca8000f8, 0x5e740000, 0x84000040, 0xc0004910,
+    0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0x6abd4010, 0xa6800132,
+    0x00000000, 0x5838003a, 0xca0000f8, 0x58000002, 0xca4000f8, 0x5838000e, 0x00000000, 0xce0000f9,
+    0xce4000f8, 0xc2400000, 0xdd250038, 0xc1000080, 0x45248000, 0xc2400000, 0xc6240078, 0x46510000,
+    0x00000000, 0xc52400fc, 0x5d240078, 0xc1000078, 0xc52400fc, 0xc6600078, 0x5c000002, 0xce000078,
+    0xc000492a, 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x722d0000, 0xce0000f8, 0xc000492c, 0xca0000f8,
+    0xc2c00002, 0x6afd6000, 0x722d0000, 0xce0000f8, 0x80000040, 0xc000492c, 0xca0000f8, 0xc2c00002,
+    0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0xa4880088, 0xc2c00000, 0xc000140e, 0xcac20018,
+    0xc000490e, 0xca4000f8, 0xc2000002, 0x6a2d0000, 0x7e010000, 0x76612000, 0xce4000f8, 0xc0004990,
+    0xca4000f8, 0xc2000002, 0x6a2d0000, 0x72612000, 0xce4000f8, 0xa4860070, 0xc2400000, 0xc000140e,
+    0xca418018, 0xc2020002, 0xc0004900, 0xce002100, 0xc0004908, 0xce4000f8, 0xc1000000, 0xd90000f9,
+    0xd8400078, 0xc1000004, 0xd90000f9, 0xc0001408, 0xcc8000f8, 0xc10e0002, 0xd90c00f8, 0x8000f750,
+    0xdfbc00f9, 0xc0004992, 0x99006be8, 0xc94000f8, 0xc7d800f8, 0x00000000, 0xc57000f8, 0x5ef00020,
+    0x88000158, 0x6f346000, 0x4771a000, 0x5b744c80, 0x58340008, 0xc2400000, 0xca400078, 0x00000000,
+    0xc2000000, 0x5a640002, 0xc6500078, 0xcd000078, 0x58340004, 0xca000078, 0x00000000, 0x00000000,
+    0x5e200002, 0xc6100078, 0xcd000078, 0xc0004912, 0xca8000f8, 0xc2400002, 0x6a712000, 0x72a54000,
+    0xce8000f8, 0x5e200000, 0x84000052, 0xc000480a, 0xca0000f8, 0xc0000408, 0xca8000f8, 0x76250000,
+    0x00000000, 0x72a14000, 0xce8000f8, 0x80000038, 0xc0004914, 0xca0000f8, 0x7e412000, 0x00000000,
+    0x76250000, 0xce0000f8, 0x800000c8, 0x6ef4a000, 0x476da000, 0x5b747600, 0x58340036, 0xc2400000,
+    0xca420078, 0x00000000, 0xc2000000, 0x5a640002, 0xc6501078, 0xcd021078, 0x58340006, 0xca000078,
+    0x00000000, 0x00000000, 0x5a200002, 0xc6100078, 0xcd000078, 0xc0004910, 0xca4000f8, 0xc2000002,
+    0x6a2d0000, 0x72612000, 0xce4000f8, 0xc2000002, 0x6a310000, 0xc000042a, 0xce0000f8, 0xc1040002,
+    0xd90c00f8, 0x00000000, 0x8000f4b8, 0x00000000, 0xc4980928, 0x9d000000, 0xc5580028, 0xc0000838,
+    0xcd8400f8, 0xc1440200, 0xc1c03800, 0xc55c1070, 0xc000100e, 0x9d000000, 0xcd8000f8, 0xc000100c,
+    0xcdc000f8, 0xc0004862, 0xc9c000f8, 0x00000000, 0x00000000, 0xd9d800f9, 0xc0007800, 0x401c0000,
+    0x5dc07a00, 0x88000012, 0x5c000200, 0xcd8000f8, 0xc1f0000a, 0x715ca000, 0xdd9800f8, 0xdd9c00f9,
+    0x41d8e000, 0xc5d40260, 0xc0001010, 0xcd4000f8, 0x6c9c8000, 0x45c8e000, 0x45c8e000, 0x59dc0004,
+    0xc1601260, 0xc5d40260, 0x9d000000, 0xc0001012, 0xcd4000f8, 0x00000000, 0x00000000, 0xd95800f8,
+    0x6d586000, 0x4594c000, 0x59984c80, 0xd99800f9, 0x5818000a, 0xc1800000, 0xc9800078, 0xc0007680,
+    0x6d5ca000, 0x401c0000, 0x40180000, 0xc94000f8, 0x58000002, 0x00000000, 0xc9c000f8, 0xc0004930,
+    0xcd4000f8, 0xc0004932, 0xcdc000f8, 0x59980004, 0xc1c20020, 0xb59c0018, 0x00000000, 0xc1800000,
+    0xdd9c00f9, 0x581c000a, 0xcd800078, 0x581c000c, 0xc1800000, 0xc9800020, 0xc1c00002, 0xdd9400f8,
+    0x69d4e000, 0x5d980002, 0xcd800020, 0xc0004924, 0xc98000f8, 0x00000000, 0x9d000000, 0x00000000,
+    0x719cc000, 0xcd8000f8, 0xc000492a, 0xc94000f8, 0xc1c00002, 0x69d8e000, 0x7dc0c000, 0x7558a000,
+    0xcd4000f8, 0xc000492c, 0xc94000f8, 0xdd8000f9, 0x5800003a, 0x755ca000, 0x84000108, 0xc94000f9,
+    0xc98000f8, 0xdd8000f9, 0x5800000e, 0x00000000, 0xcd4000f9, 0xcd8000f8, 0xc1800000, 0xdd190038,
+    0xc1000080, 0x45188000, 0xc1800000, 0xc5580078, 0x4590a000, 0x00000000, 0xc51800fc, 0x5d180078,
+    0xc1000078, 0xc51800fc, 0xc5940078, 0x5c000002, 0xcd400078, 0xc000492c, 0xc94000f8, 0xc000492a,
+    0xc98000f8, 0x715ca000, 0xc000492c, 0xcd4000f8, 0x719cc000, 0xc000492a, 0xcd8000f8, 0x9cc00000,
+    0x00000000, 0x00000000, 0x00000000, 0xc0004862, 0xc98000f8, 0x00000000, 0xc1c00200, 0x4194c000,
+    0x459ce000, 0x88000012, 0xc5d800f8, 0xc0004862, 0xcd8000f8, 0xc0001406, 0xc98000f8, 0xc1c00002,
+    0x9d000000, 0xc5d80a00, 0xc5581048, 0xcd8000f8, 0xc0004930, 0xc98000f8, 0xc0004932, 0xc9c000f8,
+    0xc140000e, 0xc5581c18, 0xdd9400f8, 0xc0007800, 0x40140000, 0x5d407a00, 0x88000012, 0x5c000200,
+    0xcd8000f8, 0x58000002, 0x5d407a00, 0x88000012, 0x5c000200, 0xcdc000f8, 0xdd5400f8, 0xc1c00000,
+    0x58140006, 0xc9c20078, 0xc1800000, 0x58140000, 0xc98000d8, 0x6ddc2000, 0xc000491e, 0x41d8e000,
+    0xcdc000f8, 0xdd9800f8, 0xc1c00022, 0xc5d80d70, 0xdd9400f9, 0xc5581c18, 0xc000491c, 0xcd8000f8,
+    0xdd5400f8, 0xc1c00000, 0x58140006, 0xc9c20078, 0xc1800000, 0x58140004, 0xc9820078, 0x00000000,
+    0x59dc0002, 0x45d8c000, 0x84000010, 0xc1c00000, 0x9d000000, 0x58140006, 0xc5d81078, 0xcd821078,
+    0xc0004860, 0xc94000f8, 0xc1820080, 0xc1d00002, 0x58147700, 0xd58000f8, 0x58000002, 0xd58000f9,
+    0x59540004, 0xb5580018, 0xc0004860, 0xc1400000, 0xcd4000f8, 0xdd9800f9, 0x9d000000, 0xdd9400f8,
+    0xc0001404, 0xcdc10800, 0xc1c00000, 0xc1800200, 0x5d980004, 0xdf5d0048, 0x459ca000, 0x8800fff2,
+    0xdd8000f9, 0x5800000e, 0x00000000, 0xc94000f9, 0xc98000f8, 0xc1c00002, 0xc5d43f00, 0xc5d81e00,
+    0xc0004862, 0xc9c000f8, 0x00000000, 0x00000000, 0x581c7800, 0x5dc07a00, 0x88000012, 0x5c000200,
+    0xcd4000f8, 0x58000002, 0x5dc07a00, 0x88000012, 0x5c000200, 0xcd8000f8, 0xc0004862, 0xc9c000f8,
+    0x00000000, 0xc15004c0, 0xc5d40060, 0xdd9c00f8, 0xc5d41c18, 0xc1c00000, 0xdd8000f9, 0x58000038,
+    0xc9c00078, 0xdd8000f9, 0xc1800000, 0x58000002, 0xc98000d8, 0x6ddc2000, 0xc000491c, 0x41d8e000,
+    0xcd4000f9, 0xcdc000f8, 0xdd9400f9, 0xc1c00000, 0x58140038, 0xc9c00078, 0xc1800000, 0x58140006,
+    0xc9820078, 0x00000000, 0x59dc0002, 0x45d8c000, 0x84000010, 0xc1c00000, 0x9d000000, 0x58140038,
+    0xc5d80078, 0xcd800078, 0xc1c00000, 0xdf5c0038, 0x5ddc0080, 0x8400ffea, 0x00000000, 0x9d000000,
+    0x00000000, 0x00000000, 0x00000000, 0xc160fffe, 0xc0000a10, 0xc9440060, 0xc1a0fffe, 0x59983608,
+    0xc000100c, 0xcd4000f8, 0xc000100e, 0xcd8000f8, 0xc0004962, 0xc98000f8, 0x00000000, 0xc170000a,
+    0x7158a000, 0x6c988000, 0x4588c000, 0x4588c000, 0x59980004, 0xc5940270, 0xc0001010, 0xcd4000f8,
+    0xc0004946, 0xc94000f8, 0x00000000, 0x00000000, 0x6d58a000, 0x6d5c4000, 0x459cc000, 0x4594c000,
+    0xc000494a, 0xc94000f8, 0xc0004948, 0xc9c000f8, 0x4194c000, 0xc1400012, 0xc55c1818, 0x9d000000,
+    0xc59c0268, 0xc0001012, 0xcdc000f8, 0xc1400000, 0x58000014, 0xc9410038, 0xc0004950, 0xc9c000f8,
+    0xc55800f8, 0xc5940838, 0xc5581078, 0xd99400f8, 0xc000493c, 0xc94000f8, 0xc0004954, 0xc98000f8,
+    0x59dc00a8, 0x45d4e000, 0x41d8e000, 0x5d5c0030, 0x88000010, 0xc1c00030, 0xc1800000, 0xc5d84028,
+    0xc1400000, 0xc5d40008, 0x5dd40002, 0x84000072, 0x5dd40004, 0x8400009a, 0x5dd40006, 0x840000c2,
+    0x5dd80026, 0x840000ea, 0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000, 0xcd4000f8, 0x59980002,
+    0x8000ffc0, 0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000, 0xcd4000b8, 0x59980002, 0x8000ff88,
+    0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000, 0xcd400078, 0x59980002, 0x8000ff50, 0xdd5400f8,
+    0xdd8000f9, 0x58000008, 0x40180000, 0xcd400038, 0x59980002, 0x8000ff18, 0x00000000, 0x9d000000,
+    0x00000000, 0x00000000, 0x00000000, 0x58000014, 0xc94000f8, 0xc0004954, 0xc9c000f8, 0xc0004950,
+    0xc9400078, 0xdd8000f9, 0x5800002a, 0x5d9c0000, 0x84000052, 0x5d9c0002, 0x84000052, 0x5d9c0004,
+    0x8400006a, 0xc55b0038, 0xc55c08b8, 0xcd800039, 0xcdc108b8, 0x80000060, 0xcd4000f8, 0x80000050,
+    0xc55900b8, 0xc55c1838, 0xcd8000b9, 0xcdc31838, 0x80000028, 0xc55a0078, 0xc55c1078, 0xcd800079,
+    0xcdc21078, 0x9d000000, 0x00000000, 0x00000000, 0x00000000, 0xc1e00000, 0xa540001a, 0xc0000a14,
+    0xc1a20002, 0x9d000000, 0xcd863100, 0xc0000a1c, 0xcdc61038, 0x59540002, 0x6994e018, 0x61c0c008,
+    0x4194a000, 0x5d940040, 0x88000012, 0xc59400f8, 0x9d000000, 0xcd4000f8, 0x00000000, 0x00000000,
+};
+
+static unsigned int firmware_binary_data[] = {
+};
+
+
+#endif  //  IFXMIPS_PTM_FW_AR9_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_danube.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_danube.h
new file mode 100644
index 0000000..3451682
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_danube.h
@@ -0,0 +1,489 @@
+#ifndef IFXMIPS_PTM_FW_DANUBE_H
+#define IFXMIPS_PTM_FW_DANUBE_H
+
+
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_fw_danube.h
+** PROJECT      : Danube
+** MODULES     	: PTM (ADSL)
+**
+** DATE         : 1 AUG 2005
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM Driver (PP32 Firmware)
+** COPYRIGHT    : 	Copyright (c) 2006
+**			Infineon Technologies AG
+**			Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+**  4 AUG 2005  Xu Liang        Initiate Version
+** 23 OCT 2006  Xu Liang        Add GPL header.
+*******************************************************************************/
+
+
+#define PTM_FW_VER_MAJOR        0
+#define PTM_FW_VER_MINOR        17
+
+
+static unsigned int firmware_binary_code[] = {
+    0x800004a0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffc8, 0x00000000, 0x00000000, 0x00000000,
+    0xc1000002, 0xd90c0000, 0xc2000002, 0xda080001, 0x80005618, 0xc2000000, 0xda080001, 0x800055b8,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x80005da8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc10e0002, 0xd90c0000, 0xc0004808, 0xc8400000, 0x80005288, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc3e1fffe, 0x597dfffe, 0x593dfef4, 0x900004d9, 0x00000000, 0x00000000, 0x00000000, 0x90cc0481,
+    0x00000000, 0x00000000, 0x00000000, 0xc3e02262, 0x5bfc0022, 0xc0004002, 0xcfc00000, 0xc0004810,
+    0xcbc00000, 0x00000000, 0xc3800000, 0xc7f80040, 0x5fb80000, 0xc7fa0040, 0xc7bfe80a, 0x5fb80000,
+    0x00000000, 0xc7bff80a, 0xdbd40001, 0xc00049a0, 0xc3800002, 0xa7ca004a, 0xc1200000, 0x5911fffe,
+    0xcd000001, 0xc1200000, 0x59102042, 0xcd000001, 0xc1000004, 0xcd000001, 0xc1200000, 0x59103a1e,
+    0xcd000001, 0x80000048, 0xc121fffe, 0x5911fffe, 0xcd000001, 0xc1203db8, 0x5910de82, 0xcd000001,
+    0xc1000006, 0xcd000001, 0xc120385a, 0x591033da, 0xcd000001, 0x5fb80002, 0x88000002, 0x6ffe0010,
+    0x8000ff10, 0xdd7c0001, 0xc3800000, 0xc7f86018, 0x5bb80008, 0xc3540002, 0x77f5a000, 0xc1000008,
+    0x4539c002, 0xcf800001, 0xdb900040, 0xc3800008, 0xc3720002, 0x77f5a000, 0xa7f00008, 0x47b9c002,
+    0xc1000000, 0xc7d26018, 0x4391c000, 0xcf800000, 0xdb900840, 0xc3c00000, 0xdbc80001, 0xc0400000,
+    0xc11c0000, 0xc000082c, 0xcd040e08, 0xc11c0002, 0xc000082c, 0xcd040e08, 0xc0400002, 0xc11c0000,
+    0xc000082c, 0xcd040e08, 0xc11c0002, 0xc000082c, 0xcd040e08, 0xc0000824, 0x00000000, 0xcbc00001,
+    0xcb800001, 0xcb400001, 0xcb000000, 0xc0004878, 0x5bfc4000, 0xcfc00001, 0x5bb84000, 0xcf800001,
+    0x5b744000, 0xcf400001, 0x5b304000, 0xcf000000, 0xc0000a10, 0x00000000, 0xcbc00001, 0xcb800000,
+    0xc0004874, 0x5bfc4000, 0xcfc00001, 0x5bb84000, 0xcf800000, 0xc30001fe, 0xc000140a, 0xcf000000,
+    0xc3000000, 0x7f018000, 0xc000042e, 0xcf000000, 0xc000040e, 0xcf000000, 0xc3c1fffe, 0xc000490e,
+    0xcfc00080, 0xc000492c, 0xcfc00080, 0xc0004924, 0xcfc00040, 0xc0004912, 0xcfc00040, 0xc000498c,
+    0xcfc00040, 0xc000498e, 0xcfc00080, 0xc0004990, 0xcfc00080, 0xc3c00000, 0xc2800004, 0xc3000000,
+    0x7f018000, 0x6ff88000, 0x6fd44000, 0x4395c000, 0x5bb84a00, 0xc00049a0, 0xcb000000, 0x00000000,
+    0x58380006, 0xcf000000, 0xc321fffe, 0x5b31fffe, 0x58380024, 0xcf000000, 0x5bfc0002, 0xb7e8ff70,
+    0x00000000, 0xc3c00000, 0xc2800010, 0x6ff86000, 0x47f9c000, 0x5bb84c80, 0xc3400000, 0x58380004,
+    0xcb420080, 0x00000000, 0x58380008, 0xcf400080, 0x5bfc0002, 0xb7e8ff90, 0x00000000, 0xc3c00000,
+    0xc2800004, 0xc3400022, 0xc3000000, 0x7f018000, 0xc2c00016, 0x6ff8a000, 0x47f9c000, 0x5bb84e20,
+    0x58380008, 0xcf400040, 0xc00049a8, 0xcb000000, 0x00000000, 0x5838000a, 0xcf000000, 0xc321fffe,
+    0x5b31fffe, 0x5838000c, 0xcf000000, 0x58380034, 0xcec00040, 0x5bfc0002, 0xb7e8ff58, 0x00000000,
+    0x00000000, 0xc0004840, 0xc3e12624, 0x5bfc2320, 0xcfc00001, 0xc3e02f2c, 0x5bfd2a28, 0xcfc00001,
+    0xc3e03734, 0x5bfd3230, 0xcfc00001, 0xc3e13e3c, 0x5bfc3b38, 0xcfc00001, 0xc3e14644, 0x5bfc4340,
+    0xcfc00001, 0xc3e04f4c, 0x5bfd4a48, 0xcfc00001, 0xc3e05754, 0x5bfd5250, 0xcfc00001, 0xc3e15e5c,
+    0x5bfc5b58, 0xcfc00001, 0xc3e06764, 0x5bfd6260, 0xcfc00001, 0xc3e16e6c, 0x5bfc6b68, 0xcfc00001,
+    0xc3e17674, 0x5bfc7370, 0xcfc00001, 0xc3e07f7c, 0x5bfd7a78, 0xcfc00001, 0xc3e18684, 0x5bfc8380,
+    0xcfc00001, 0xc3e08f8c, 0x5bfd8a88, 0xcfc00001, 0xc3e09794, 0x5bfd9290, 0xcfc00001, 0xc3e19e9c,
+    0x5bfc9b98, 0xcfc00001, 0xc121fffe, 0x5911fef4, 0x15000000, 0x80000010, 0x00000000, 0x80000638,
+    0x00000000, 0x8000ffc8, 0xc0004918, 0xd2800000, 0xc2000000, 0xdf600040, 0x5e600080, 0x8400029a,
+    0x00000000, 0xc161fffe, 0x5955fffe, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0xc000480a, 0xca000000, 0xc0004912, 0xca400000, 0xc0004924, 0xca800000,
+    0xc000498c, 0xcac00000, 0xc121fffe, 0x5911fef4, 0x15000000, 0x76610000, 0x76a10000, 0x76e10000,
+    0x840001d2, 0xc0004918, 0xca400000, 0xc28001fe, 0x76a10000, 0x5a640002, 0x6a254010, 0x5ee80000,
+    0x84000002, 0x6aa54000, 0x8000fff8, 0xc6280000, 0x62818008, 0xc0004918, 0xcf000000, 0xc161fffe,
+    0x5955fffe, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xc000498c, 0xca400000, 0xc2000002, 0x6a310000, 0x7e010000, 0x76252000, 0xce400000, 0xc121fffe,
+    0x5911fef4, 0x15000000, 0x6f346000, 0x4735a000, 0x5b744c80, 0xc2800000, 0x58340006, 0xca800080,
+    0xc2c00000, 0x58340000, 0xcac000e0, 0xc2400000, 0x5834000a, 0xca420080, 0x6ea82000, 0x42e9e000,
+    0x6f2ca000, 0x42e56000, 0x5aec1400, 0xc3990040, 0xc7381c20, 0xc6f80068, 0x99006840, 0xdb980000,
+    0xdbd80001, 0x00000000, 0xdea00000, 0x47210000, 0x8400fd28, 0xc000495a, 0xc8400000, 0x00000000,
+    0xc3c00002, 0x7bc42000, 0xcc400000, 0xc0000838, 0xc3800000, 0xcb840030, 0x6c748000, 0x6c544000,
+    0x4355a000, 0x5b744a00, 0x5ef80000, 0x8400fc8a, 0x58340004, 0xcb000000, 0x00000000, 0x00000000,
+    0xa7060000, 0x00000000, 0x5ef80002, 0x8400fc4a, 0x5834000c, 0xc8800040, 0xc2000000, 0xc000082c,
+    0xca040030, 0x5a880002, 0xc2400000, 0xc0004958, 0xce400000, 0xb628fff8, 0x00000000, 0xc2800000,
+    0x58340002, 0xc2000000, 0xca020010, 0xc0004956, 0xce800000, 0x5e600000, 0x84001df2, 0x5e600002,
+    0x840043da, 0x00000000, 0x80002320, 0xc0004958, 0xca000000, 0xc0004956, 0xca800000, 0x5e200000,
+    0x84000008, 0xc2500002, 0xc0000838, 0xce440808, 0x6c748000, 0x6c544000, 0x4355a000, 0x5b744a00,
+    0x5834000c, 0xc6900040, 0xcd000040, 0x58340002, 0xc2000000, 0xca020010, 0x00000000, 0x00000000,
+    0x5f600000, 0x84000122, 0xc0004818, 0xc8000000, 0x00000000, 0x00000000, 0x5c000000, 0x840000f2,
+    0xc11c0000, 0xc000082c, 0xcd040e08, 0xc0000838, 0xc3800000, 0xc2400000, 0xcb840030, 0xca452030,
+    0x00000000, 0x42b9a000, 0x5e340022, 0x88000012, 0xc200001e, 0x7635a000, 0x5f740002, 0x8000fff0,
+    0x6e642010, 0x4675a000, 0x84000042, 0xc0004818, 0xc8000000, 0x00000000, 0x00000000, 0x5c000000,
+    0x84000012, 0x00000000, 0x00000000, 0x00000000, 0x8000ffa0, 0xc11c0002, 0xc000082c, 0xcd040e08,
+    0x8000f9b8, 0xc2000000, 0xdf600040, 0x5e200080, 0x84000272, 0x00000000, 0xc161fffe, 0x5955fffe,
+    0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc000480c,
+    0xca000000, 0xc0004910, 0xca400000, 0xc000492c, 0xca800000, 0xc000498e, 0xcac00000, 0xc121fffe,
+    0x5911fef4, 0x15000000, 0x76610000, 0x76a10000, 0x762d6000, 0x840001aa, 0xc0004926, 0xca400000,
+    0xc201fffe, 0x762d6000, 0x5a640002, 0x6ae50010, 0x5f200000, 0x84000002, 0x6a250000, 0x8000fff8,
+    0xc6e00000, 0x62014008, 0xc0004926, 0xce800000, 0xc161fffe, 0x5955fffe, 0x15400000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc000498e, 0xca400000, 0xc2000002,
+    0x6a290000, 0x7e010000, 0x76252000, 0xce400000, 0xc121fffe, 0x5911fef4, 0x15000000, 0x6eb4a000,
+    0x46b5a000, 0x5b744e20, 0x58340002, 0xc2000000, 0xca0000e0, 0x58340036, 0xc2400000, 0xca400080,
+    0x6eb0a000, 0x46b18000, 0x5b300e56, 0x5b300004, 0x6e642000, 0x4225e000, 0xc39a8024, 0xc7380068,
+    0xc6b81c20, 0x99006840, 0xdb980000, 0xdbd80001, 0x00000000, 0xc2000000, 0xdf600040, 0x5e200080,
+    0x840002c2, 0x00000000, 0xc161fffe, 0x5955fffe, 0x15400000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0xc000490e, 0xca000000, 0xc000492a, 0xca400000, 0xc0004990,
+    0xcb000000, 0xc000498a, 0xcac00000, 0xc121fffe, 0x5911fef4, 0x15000000, 0x76318000, 0x76718000,
+    0x84000202, 0xc201fffe, 0x76318000, 0x5aec0002, 0x6b2d0010, 0x5ea00000, 0x84000002, 0x6a2d0000,
+    0x8000fff8, 0xc7200000, 0x62016008, 0xc000498a, 0xcec00000, 0xc161fffe, 0x5955fffe, 0x15400000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0004990, 0xca400000,
+    0xc2000002, 0x6a2d0000, 0x7e010000, 0x76252000, 0xce400000, 0xc121fffe, 0x5911fef4, 0x15000000,
+    0x6ef4a000, 0x46f5a000, 0x5b744e20, 0x58340010, 0xc2000000, 0xca0000e0, 0x58340008, 0xc2400000,
+    0xca420080, 0x5834000e, 0xc2800000, 0xca832018, 0xc3c00000, 0x467c8000, 0x6e644010, 0xc7e80004,
+    0x42250000, 0x4229e000, 0xc39a8008, 0x58340008, 0xcb801040, 0x58340008, 0xc2800000, 0xca810018,
+    0x6ee0a000, 0x46e10000, 0x5a20000a, 0x5a200e28, 0x42290000, 0xc6380068, 0xc6f81c20, 0x99006840,
+    0xdb980000, 0xdbd80001, 0x00000000, 0xc000495c, 0xc8400000, 0xc3400000, 0xc3c00002, 0x7bc42000,
+    0xcc400000, 0x6c78a000, 0x4479c000, 0x5bb84e20, 0x58380034, 0xcb410040, 0xc0000a28, 0xc3000000,
+    0xcb040030, 0xc0000a14, 0xc2c00000, 0x43358000, 0xcac40030, 0xc000490e, 0xca800000, 0x5eec0002,
+    0x46f18000, 0x8800f348, 0x6bc5e000, 0x77e94000, 0x8400f330, 0x6c7ca000, 0x447de000, 0x5bfc4e20,
+    0x583c0008, 0xc2000000, 0xca020080, 0xc00049aa, 0x00000000, 0xca800001, 0xca400000, 0xc0001008,
+    0xce800000, 0xc0001006, 0xce400000, 0x583c000a, 0xca400000, 0x00000000, 0xc000100a, 0xce400000,
+    0xc2400006, 0xc0001000, 0xce400000, 0xc2600982, 0x5a643b6e, 0xc0001002, 0xce400000, 0x583c000c,
+    0xca400000, 0x00000000, 0xc0001004, 0xce400000, 0x583c000e, 0xcb800000, 0x00000000, 0xc2400000,
+    0xc7a40080, 0xc2800000, 0xc7aae028, 0xdaa00001, 0x583c0034, 0xcb800000, 0x00000000, 0xc2c00000,
+    0xc7ad0040, 0xc0004978, 0xcec00000, 0xc0800000, 0xc7880040, 0xc3400000, 0xc7b60040, 0xc0004980,
+    0xcf400000, 0x4625c000, 0x43a9c000, 0xc2400000, 0xc000497c, 0xce400000, 0xac2c0001, 0xc2800000,
+    0x00000000, 0x8000fff8, 0xc2800002, 0xc0004976, 0xce800000, 0xc2c00000, 0xc34000a0, 0xdb5c0001,
+    0xc3400002, 0xc000497a, 0xcf400000, 0x5f600000, 0x84000168, 0xde280001, 0xc6a00000, 0x46b9c000,
+    0x583c0000, 0xc2800000, 0xca830040, 0xc0000a28, 0xc3000000, 0xcb040030, 0xc3400000, 0xc0004976,
+    0x47298000, 0x88000052, 0xcf400000, 0x58880002, 0xc3000000, 0xc0000a14, 0xcb040030, 0x00000000,
+    0x00000000, 0xb4b00188, 0x00000000, 0xc0800000, 0x00000000, 0x80000170, 0xc0004980, 0xcb400000,
+    0x00000000, 0x00000000, 0x5af40002, 0xafec0080, 0x00000000, 0xc2c00000, 0xc000497a, 0xacec0001,
+    0x00000000, 0x00000000, 0xac2c007f, 0xc2800000, 0xce800000, 0x80000000, 0xc2800002, 0xce800000,
+    0x5f6c0000, 0x840000d0, 0x00000000, 0x8000fee8, 0x5f780082, 0x88000240, 0xc3000002, 0xc000497c,
+    0xcf000000, 0xc2800080, 0xc1000000, 0xdd110040, 0x45294000, 0x46b94000, 0x880001c0, 0x4391a000,
+    0xc0004980, 0xcf400000, 0x6f684010, 0x6f77c000, 0x6f77c010, 0xc0004840, 0x40280000, 0xca800000,
+    0xc3000000, 0x6f506000, 0x6a908010, 0xc5300040, 0xdb1c0001, 0x8000fe18, 0xc3400000, 0xc0000a10,
+    0xcb440068, 0x6cb04000, 0x6f288000, 0x6f744000, 0x42b14000, 0x43694000, 0xc3400000, 0xc6b44068,
+    0xc0004000, 0x40340000, 0xc321e000, 0xcf000000, 0x5aa80008, 0x42ad4000, 0xc3400000, 0xc6b44068,
+    0xc0004000, 0x40340000, 0xca400000, 0xc3000000, 0xc6f00010, 0xc1400000, 0xddd40041, 0x6f306000,
+    0xc13001fe, 0x69308010, 0x7d008000, 0x75252000, 0x6d570000, 0x6970a010, 0x42552000, 0xce400000,
+    0x5aa80002, 0x5aec0002, 0xafec0080, 0x00000000, 0xc2c00000, 0x5f6c0000, 0x84000100, 0x00000000,
+    0x80000028, 0x4391a000, 0x5f740080, 0xc0004980, 0xcf400000, 0xc3000004, 0xc000497a, 0xcf000000,
+    0x58880002, 0xc3400000, 0xc0000a14, 0xcb440030, 0x00000000, 0x00000000, 0xb4b4fff8, 0x00000000,
+    0xc0800000, 0xc3400000, 0xc0000a10, 0xcb440068, 0x6cb04000, 0x6f248000, 0x6f744000, 0x42712000,
+    0x43654000, 0xc3400000, 0xc6b44068, 0xc0004000, 0x40340000, 0xc3201e00, 0xcf000000, 0x5aa80008,
+    0x42ad4000, 0xc000100c, 0xcb400000, 0xc3000000, 0x00000000, 0xc7340068, 0xc300fffe, 0xc7341078,
+    0xcf400000, 0xc000100e, 0xcb400000, 0xc3000e28, 0x00000000, 0xc7340068, 0xc300fffe, 0xc7341078,
+    0xcf400000, 0xc0001010, 0xcb400000, 0xc3000002, 0x00000000, 0xc7341a08, 0xc7341808, 0xc3000000,
+    0xc7341908, 0xc6b40078, 0xcf400000, 0xc0004982, 0xce800000, 0x6c64a000, 0x44652000, 0x5a64000a,
+    0xc0001012, 0xcb400000, 0xc2800002, 0x00000000, 0xc6740268, 0xc6340010, 0xc000497c, 0xcb000000,
+    0xc6b41808, 0xc6b41b08, 0xc6b41c08, 0xc6b41d08, 0xc7341e08, 0xdd680001, 0x7e814000, 0x6eab2010,
+    0x77294000, 0xc6b41f08, 0xc2800000, 0xc6b41908, 0xc3000080, 0x46f18000, 0xc0004982, 0xc9000000,
+    0x47b14000, 0x880000ea, 0x41388000, 0xcd000000, 0xc7b41040, 0xc0004994, 0xce800000, 0xde100001,
+    0x46108000, 0x84000098, 0xc1000000, 0xdd110040, 0x41388000, 0x412c8000, 0x5d100080, 0xc0004980,
+    0xcd000000, 0xc1000002, 0xc000497c, 0xcd000000, 0xc5341e08, 0xdd500001, 0x7d008000, 0xc5373f08,
+    0xc000497a, 0xc9000000, 0x42390000, 0x43adc000, 0x59100002, 0xcd000000, 0x80000038, 0x42390000,
+    0x80000028, 0xc7341040, 0x41308000, 0xcd000000, 0x42310000, 0xc1000000, 0xc0004994, 0xcd000000,
+    0xc0001012, 0xcf400000, 0xc000493c, 0xce000000, 0xc0004984, 0xcf800000, 0xc000497a, 0xca400000,
+    0xc000497c, 0xca800000, 0x6c7ca000, 0x447de000, 0x5bfc4e20, 0xc0004976, 0xcac00000, 0xc0004978,
+    0xca000000, 0x5eec0002, 0x84000072, 0x42250000, 0xc2400000, 0xc000497a, 0xce400000, 0x583c0000,
+    0xc2c00000, 0xcac30040, 0x00000000, 0x00000000, 0x462d6000, 0x88000002, 0x00000000, 0xac280002,
+    0xc000497a, 0xce000000, 0xc2000000, 0x5fa80000, 0x840001c2, 0x00000000, 0x6c508000, 0xc0004880,
+    0x40100000, 0x58000018, 0xc9000000, 0x00000000, 0x00000000, 0x59100002, 0xcd000000, 0x583c000e,
+    0xc2c00000, 0xcac00080, 0xc1000000, 0xdd532209, 0x42d16000, 0x6c508000, 0xc0004880, 0x40100000,
+    0x5800001a, 0xc9000000, 0x00000000, 0x00000000, 0x412c8000, 0xcd000000, 0x990068d0, 0xd8580000,
+    0xdbd80001, 0x00000000, 0x99006618, 0xc000491c, 0xc1400000, 0xc9420050, 0xc000491c, 0x99006ad0,
+    0xc9400001, 0xc9800000, 0x00000000, 0x99006840, 0xd9580000, 0xd9980001, 0x00000000, 0xc161fffe,
+    0x5955fffe, 0x15400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x98c06490, 0xd8580000, 0xdbd80001, 0xc4580000, 0xc121fffe, 0x5911fef4, 0x15000000, 0xace80003,
+    0xc000493c, 0xcb400000, 0x00000000, 0xc3000000, 0xc7701080, 0x8000fff8, 0xc3000000, 0x583c0008,
+    0xcf001080, 0x6e210000, 0x583c0034, 0xce000840, 0xc0004980, 0xcb800000, 0x583c0034, 0x00000000,
+    0x6fba0000, 0xcf801040, 0xc000490e, 0xca000000, 0xc2c00002, 0x6ac56000, 0x72e10000, 0xce000000,
+    0x00000000, 0x00000000, 0x00000000, 0xa8e2ffc8, 0x00000000, 0xc1220002, 0xd90c0000, 0x5fa80000,
+    0x840006fa, 0xc00049a8, 0xca000000, 0x583c000a, 0x00000000, 0xce000000, 0xc221fffe, 0x5a21fffe,
+    0x583c000c, 0xce000000, 0xc0001004, 0xca000000, 0x00000000, 0x583c0012, 0x7e010000, 0xce000000,
+    0xa97000c1, 0x00000000, 0x00000000, 0xa97200a9, 0xc0001010, 0xc2740000, 0xce401a08, 0x6c64a000,
+    0x44652000, 0x5a64000a, 0x6e644000, 0xc0001012, 0xce400078, 0xc2600008, 0xce401040, 0xc27e0002,
+    0xce401f08, 0xc2760002, 0xce401b08, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xa8e2ffc8, 0x00000000, 0xc1220002, 0xd90c0000, 0xc1000000, 0xdd110040, 0x5d100000, 0x840003fa,
+    0xc0004982, 0xca000000, 0xc0004984, 0xca400000, 0xc2800000, 0xc361fffe, 0x5b75fffe, 0xa96afffb,
+    0xdfec0000, 0xc6ec1080, 0x7b6d6000, 0x6c40a000, 0x44400000, 0x58004e20, 0x58000014, 0xcec00000,
+    0xa972fffb, 0x5c000002, 0xcec00000, 0xc0001010, 0xc2f40002, 0xcec01a08, 0x6c6ca000, 0x446d6000,
+    0x5aec000a, 0x6eec4000, 0xc0001012, 0xcec00078, 0xc0004994, 0xc9800000, 0xc1400000, 0xdd150040,
+    0xc55c0000, 0x45588000, 0x00000000, 0xc59c0004, 0x5d1c0000, 0x840000ba, 0xc0001012, 0xc5d01040,
+    0xcd001040, 0xc2f60002, 0xcec01b08, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0xa8e2ffc8, 0x00000000, 0xc1220002, 0xd90c0000, 0x45588000, 0x8800003a, 0xc0004994, 0xcd000000,
+    0xc0004980, 0xcbc00000, 0x42150000, 0xc0004982, 0xce000000, 0x5ffc0000, 0x84000200, 0x58880002,
+    0xc3800000, 0xc0000a14, 0xcb840030, 0xc3c00000, 0xc0000a10, 0xb4b8fff8, 0x00000000, 0xc0800000,
+    0xcbc40068, 0x6cb84000, 0x6fac8000, 0x6ffc4000, 0x42f96000, 0x43ed0000, 0xc3400000, 0xc6344068,
+    0xc0004000, 0x40340000, 0xc2a1e000, 0xce800000, 0x5a200008, 0xc0004980, 0xcbc00000, 0xc3400000,
+    0xc0004840, 0x6ff84010, 0xc7f40010, 0x40380000, 0xcb800000, 0xc2800000, 0x6f506000, 0x6b908010,
+    0xc52c1840, 0xc3400000, 0xc6344068, 0xc0004000, 0x40340000, 0xcec00000, 0x5a200002, 0x5ffc0000,
+    0x8400007a, 0xc0001010, 0xc62c0078, 0xcec00078, 0xc0001012, 0xc7ec1040, 0xcec01040, 0xc2f60002,
+    0xcec01b08, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa8e2ffc8, 0x00000000,
+    0xc1220002, 0xd90c0000, 0xc0004994, 0xc100007e, 0x47d08000, 0xcd000000, 0x423d0000, 0xc0004982,
+    0xce000000, 0xc0004994, 0xca000000, 0xc0004980, 0xca400000, 0x5e200000, 0x84000142, 0xc2000000,
+    0xc2800000, 0x5a640002, 0xc6684030, 0xc0004982, 0xcb000000, 0xc0004000, 0xc2c00000, 0xc72c4068,
+    0x402c0000, 0x6e67c000, 0x6e67c010, 0x5ee40002, 0x84000022, 0x5ee40004, 0x84000032, 0x5ee40006,
+    0x84000042, 0x00000000, 0x80000048, 0xce0000c0, 0x5aa80002, 0x5b300006, 0x80000028, 0xce000080,
+    0x5aa80002, 0x5b300004, 0x80000008, 0xce000040, 0x5aa80002, 0x5b300002, 0x5ee80020, 0x8400003a,
+    0xc0004000, 0xc2c00000, 0xc72c4068, 0x402c0000, 0xce000000, 0x5aa80002, 0x5b300008, 0x8000ffa0,
+    0x00000000, 0x80000028, 0x583c000a, 0xd7c00000, 0xc0001004, 0xca400000, 0x00000000, 0x583c000c,
+    0xce400000, 0xc000497a, 0xca400000, 0xc2800002, 0xc0000a28, 0xc6780930, 0xc6b80808, 0xcf840838,
+    0x6c7ca000, 0x447de000, 0x5bfc4e20, 0x583c0034, 0xc4900040, 0xcd000040, 0x8000e400, 0x6c6c8000,
+    0x6c544000, 0x42d56000, 0x5aec4a00, 0xc0000824, 0xca040000, 0x6ca48000, 0x42492000, 0xc3000000,
+    0xc3400000, 0x42250000, 0x58204000, 0xca400000, 0x5a200002, 0xda240001, 0xc2800000, 0xc000495e,
+    0xce800000, 0xda600000, 0xc2800000, 0xc66b0040, 0xdaa80000, 0x582c0010, 0x6f206010, 0x40200000,
+    0xd8280001, 0xca000000, 0xc2400000, 0xc7240018, 0x6e644000, 0xda640000, 0x6a254010, 0xc3c00000,
+    0xc6bc0020, 0xc3800000, 0xdea00000, 0x5e60001e, 0x84000012, 0x5e6001e0, 0x84000002, 0x00000000,
+    0x80000068, 0xc7f80000, 0x5e7c0008, 0x84000052, 0x5bbc0002, 0x5e780008, 0x84000010, 0x5b740002,
+    0xc0004960, 0xcf000000, 0x80000018, 0x5e780006, 0x8800000a, 0xc2800002, 0xc000495e, 0xce800000,
+    0xde800001, 0xca800000, 0xde600000, 0xc240001e, 0x6a612000, 0x7e412000, 0x76694000, 0x6ba12000,
+    0x72694000, 0xce800000, 0x5e300080, 0x840000a2, 0xc2000000, 0xc7200010, 0x5e600000, 0x84000040,
+    0xde600001, 0x58204000, 0xca400000, 0x5a200002, 0xda240001, 0xc2800000, 0xc66b0040, 0xdaa80000,
+    0xda600000, 0x80000020, 0xc2800000, 0x6e206000, 0xde240000, 0x6a610000, 0xc62b0040, 0xdaa80000,
+    0x5b300002, 0x8000fdc8, 0xc2000000, 0x582c0020, 0xca020080, 0x00000000, 0xc2400000, 0x5a200002,
+    0xc6241080, 0xce401080, 0xc000480e, 0xca800000, 0x5e740000, 0x84000148, 0x46292000, 0x8800dec8,
+    0xc2400000, 0xc0000808, 0xca440018, 0x582c0010, 0xc1400000, 0xcd400001, 0xcd400001, 0xcd400001,
+    0xcd400001, 0xcd400001, 0xcd400001, 0xcd400001, 0xcd400001, 0xcd400020, 0x582c0020, 0xce001080,
+    0xc2000010, 0x5a640002, 0xb624fff8, 0x00000000, 0xc2400000, 0xc6600018, 0xc0000808, 0xce040018,
+    0xc0004956, 0xca400000, 0xc11c0000, 0xc000082c, 0xcd040e08, 0xc6600930, 0xc2400000, 0xc6600030,
+    0xc0000838, 0xce040000, 0xc2400002, 0xc0004958, 0xce400000, 0xc11c0002, 0xc000082c, 0xcd040e08,
+    0x8000dd80, 0xc000495e, 0xca000000, 0x5e740002, 0x8400dd60, 0x5e200000, 0x8400dd50, 0xc0004960,
+    0xca400000, 0xc2200004, 0x582c0002, 0xce001010, 0xc2000082, 0x46610000, 0xc6280038, 0xc0000810,
+    0xce840038, 0x99006f68, 0x582c0002, 0xc9400000, 0xc1a20000, 0x5e640000, 0x8400feb8, 0x00000000,
+    0x8000dcc0, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0xc000487c, 0xc8040000, 0x00000000,
+    0x00000000, 0x40080000, 0xcb800000, 0xc4240000, 0x00000000, 0xa7860180, 0xc3c00000, 0xc2000000,
+    0x582c000c, 0xca010040, 0x6c508000, 0xc0004880, 0x40100000, 0x58000016, 0xc9000000, 0x00000000,
+    0x00000000, 0x59100002, 0xcd000000, 0x5a200002, 0x582c000c, 0xc6100840, 0xcd000840, 0x5e600002,
+    0x84000008, 0xc2200004, 0x582c0002, 0xce001010, 0x5e600008, 0x84000048, 0xc2200002, 0x582c0002,
+    0xce001010, 0x582c000c, 0xcfc00840, 0xc2220002, 0xc0000a14, 0xce041108, 0xc22001a2, 0xc0000a1c,
+    0xce041040, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0x582c0004, 0xcb000000, 0xc3400000,
+    0x00000000, 0xa7060008, 0xcf400308, 0xc3100002, 0xc0000838, 0xcf040808, 0x582c000c, 0xcf401008,
+    0x8000dac0, 0x582c000c, 0xcfc00840, 0xc2000000, 0xc7a06018, 0x5e200000, 0x84001e18, 0x6c6c8000,
+    0x6c544000, 0x42d56000, 0x5aec4a00, 0xc000487c, 0xc8040000, 0x00000000, 0x00000000, 0x40080000,
+    0xcb800000, 0xc4240000, 0x00000000, 0xc2800000, 0xc3400000, 0xc7b5c038, 0xc0004970, 0xcf400000,
+    0xc2400000, 0xc7a4e038, 0xc000496c, 0xce400000, 0xc3000000, 0xc7b00018, 0xc3c00004, 0xc000496e,
+    0xcfc00000, 0x582c000c, 0xca000000, 0xc2400002, 0xc0004964, 0xce400000, 0xa6200352, 0x00000000,
+    0x5e700004, 0x840000d2, 0x5e700006, 0x84000068, 0xc2000002, 0x582c0002, 0xce000008, 0xc0000a14,
+    0xce841108, 0x6c508000, 0xc0004880, 0x40100000, 0x58000014, 0xc9000000, 0x00000000, 0x00000000,
+    0x59100002, 0xcd000000, 0x80001c68, 0x5e70000a, 0x84000028, 0xc2000000, 0x582c0002, 0xce000008,
+    0xc2220002, 0xc0000a14, 0xce041108, 0x8000ff58, 0x5e700008, 0x84000210, 0xc2200002, 0x582c000c,
+    0xce001008, 0x6c508000, 0xc0004880, 0x40100000, 0x58000012, 0xc9000000, 0x00000000, 0x00000000,
+    0x59100002, 0xcd000000, 0x5e340002, 0x6c508000, 0xc0004880, 0x40100000, 0x58000010, 0xc9000000,
+    0x00000000, 0x00000000, 0x41208000, 0xcd000000, 0xc0000a14, 0xce841108, 0xc0004970, 0xcb400000,
+    0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0x582c000e, 0xc4900040, 0xcd000040, 0x582c000e,
+    0xc7500840, 0xcd000840, 0xc2800000, 0x582c0004, 0xce801080, 0x582c0004, 0xce800008, 0xc00049a0,
+    0xca400000, 0x00000000, 0x582c0006, 0xce400000, 0xc261fffe, 0x5a65fffe, 0x582c0024, 0xce400000,
+    0xc2060002, 0x582c0004, 0xce000308, 0xc2400002, 0xc0004958, 0xce400000, 0xc0004878, 0xc8040000,
+    0x6c908000, 0x41088000, 0x40100000, 0x58000020, 0xc9000000, 0x582c0026, 0x00000000, 0xcd000000,
+    0x800019f8, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000016, 0xc9000000, 0x00000000,
+    0x00000000, 0x59100002, 0xcd000000, 0x8000fad8, 0x5e700000, 0x840000a8, 0xc3400082, 0xc0004970,
+    0xcf400000, 0xc2400080, 0xc000496c, 0xce400000, 0xc3c00002, 0xc000496e, 0xcfc00000, 0xc2400000,
+    0xc0004964, 0xce400000, 0xc0004878, 0xc8040000, 0x6c908000, 0x41088000, 0x40100000, 0x58000020,
+    0xc9000000, 0x582c0026, 0x00000000, 0xcd000000, 0x80000060, 0x5e700002, 0x84000040, 0xc3400082,
+    0xc0004970, 0xcf400000, 0xc3c00004, 0xc000496e, 0xcfc00000, 0xc2200000, 0x582c000c, 0xce001008,
+    0x80000018, 0x5e700004, 0x8400fe68, 0xc2600002, 0x582c000c, 0xce401008, 0xc0000a14, 0xce841108,
+    0xc000496c, 0xca400000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000012, 0xc9000000, 0x00000000,
+    0x00000000, 0x59100002, 0xcd000000, 0xc000496e, 0xcbc00000, 0x00000000, 0x00000000, 0x47f50000,
+    0x46610000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000010, 0xc9000000, 0x00000000, 0x00000000,
+    0x41208000, 0xcd000000, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00, 0x582c0004, 0xca000000,
+    0x00000000, 0x00000000, 0xa60016ea, 0x00000000, 0x6c6c8000, 0x6c544000, 0x42d56000, 0x5aec4a00,
+    0xc3000000, 0x582c0004, 0xcf000308, 0x582c0000, 0xcb002018, 0xc3c00000, 0x582c0004, 0xcbc20080,
+    0xc000491a, 0xcf000000, 0xc000493c, 0xcfc00000, 0x582c0008, 0xcb800000, 0x582c000a, 0xca400000,
+    0xc0004930, 0xcf800000, 0xc0004932, 0xce400000, 0x5ffc0000, 0x840001d8, 0x00000000, 0xa7be00e2,
+    0xc2800000, 0x6f206000, 0x47210000, 0x5a204c80, 0x5820000c, 0xca800028, 0x00000000, 0x00000000,
+    0x5ea80000, 0x840000fa, 0x00000000, 0xc161fffe, 0x5955fffe, 0x15400000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x99006330, 0xc000491a, 0xc9400000, 0x00000000,
+    0xc121fffe, 0x5911fef4, 0x15000000, 0xc0004930, 0xcb800000, 0xc0004932, 0xca400000, 0xc4781110,
+    0xc0004930, 0xcf800000, 0x582c0008, 0xcf800000, 0x582c000a, 0xce400000, 0xc7b6e110, 0x582c0004,
+    0xcf400110, 0x80000078, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x5800000c, 0xc9000000,
+    0x00000000, 0x00000000, 0x59100002, 0xcd000000, 0xc2000002, 0x582c0004, 0xce000008, 0xc0000838,
+    0xc2500002, 0xce440808, 0x80001430, 0x6c7c8000, 0x6c544000, 0x43d5e000, 0x5bfc4a00, 0x583c0006,
+    0xca000000, 0xc00049a2, 0x00000000, 0xca800001, 0xca400000, 0xc0001008, 0xce800000, 0xc0001006,
+    0xce400000, 0xc000100a, 0xce000000, 0xc2400006, 0xc0001000, 0xce400000, 0xc2600982, 0x5a643b6e,
+    0xc0001002, 0xce400000, 0x583c0024, 0xca400000, 0x00000000, 0xc0001004, 0xce400000, 0xc0004862,
+    0xc2000000, 0xca000080, 0xc360fffe, 0xc0004862, 0xce000000, 0xc0000824, 0xcb440068, 0x00000000,
+    0xc000100e, 0xcf400000, 0xc3801600, 0xc2400200, 0x6e644000, 0xc6781078, 0xc000100c, 0xcf800000,
+    0xc3200a00, 0xc0001010, 0xcf001818, 0xc2e06200, 0xc0001012, 0xcec01840, 0xc2000000, 0x583c0004,
+    0xca002010, 0xc2800000, 0xc0004966, 0xce000000, 0xc6240000, 0xc3000000, 0xc000496a, 0xcf000000,
+    0xc0004974, 0xcf000000, 0xc000493c, 0xcb400000, 0x583c000e, 0x00000000, 0x5f740000, 0x84000168,
+    0xc3400000, 0xcb410040, 0xc3000002, 0xc000496a, 0x5fb40080, 0x8400013a, 0xcf000000, 0x583c000e,
+    0xc2c00000, 0xcac00040, 0xc3800080, 0x4779c000, 0xc0004974, 0xcf800000, 0xc0001012, 0x6fba0000,
+    0xcf801040, 0x6fba0010, 0x43a5c000, 0x5b380006, 0x6f284010, 0xc7a40010, 0x6eec4000, 0x6ef08000,
+    0x432d8000, 0x43358000, 0x5b300008, 0xc0001012, 0xc7100078, 0xcd000078, 0xc2000200, 0xc2c00000,
+    0xdf6d0050, 0x46e16000, 0x46ad6000, 0x8800ffca, 0xc2000000, 0xc0004862, 0xca000268, 0x00000000,
+    0x583c0004, 0xca002010, 0xc3360002, 0xc0001010, 0xce000078, 0xc0001012, 0xcf001b08, 0xc0004974,
+    0xcb800000, 0x00000000, 0x00000000, 0x5fb80000, 0x8400002a, 0x00000000, 0x00000000, 0x00000000,
+    0xa8e2ffc8, 0x00000000, 0xc1220002, 0xd90c0000, 0xc000496c, 0xcac00000, 0x00000000, 0x00000000,
+    0x426dc000, 0x5b380006, 0x6f304010, 0xc7a40010, 0xc0004968, 0xce400000, 0xc000496e, 0xcb400000,
+    0x6ca44000, 0x6e608000, 0x42250000, 0x5a200006, 0x42350000, 0xc0001012, 0xc6100078, 0xcd000078,
+    0x6eee0000, 0xcec01040, 0xc2000200, 0xc2c00000, 0xdf6d0050, 0x46e16000, 0x42b14000, 0x46ad6000,
+    0x8800ffc2, 0xc000493c, 0xcb400000, 0xc0000838, 0xc3100002, 0x5f740000, 0x84000048, 0xcf040808,
+    0xc0004974, 0xcb800000, 0x00000000, 0x00000000, 0x5fb80000, 0x84000052, 0xc0001012, 0xc3360002,
+    0xcf001b08, 0x80000088, 0x583c0022, 0xcb400000, 0xc0004862, 0xca000000, 0x00000000, 0xc0005600,
+    0x40200000, 0xcf400000, 0xc2000000, 0xc0004862, 0xca000268, 0x00000000, 0x583c0004, 0xca002010,
+    0xc3360002, 0xc0001010, 0xce000078, 0xc0001012, 0xcf001b08, 0xc0004968, 0xcbc00000, 0xc0004964,
+    0xca400000, 0xc7e00000, 0x00000000, 0x5e640000, 0x8400fffa, 0xc2000000, 0xc0004974, 0xca400000,
+    0xc000496c, 0xca800000, 0xc000493c, 0xcb800000, 0x42698000, 0x00000000, 0x43b1a000, 0x5ef40080,
+    0x88000182, 0xc0004966, 0xcac00000, 0x6c648000, 0x6c544000, 0x42552000, 0x5a644a00, 0x58240000,
+    0x436da000, 0x4635a000, 0xc2400000, 0xca420080, 0x00000000, 0x00000000, 0x47652000, 0x8800010a,
+    0x432d8000, 0x46318000, 0x8800fff8, 0xc3000000, 0x5b300006, 0x6f304010, 0xc000493a, 0xcf000000,
+    0xc0004932, 0xc2400000, 0xca4000e0, 0x00000000, 0x6fb84010, 0x42792000, 0xc000491e, 0xce400000,
+    0xc0004862, 0xca800000, 0x00000000, 0xc2c0000a, 0xc6e80d78, 0xc7281050, 0xc000491c, 0xce800000,
+    0x6c708000, 0x6c544000, 0x43158000, 0x5b304a00, 0x6f760000, 0x58300004, 0xcf401080, 0x6ffc2000,
+    0x58300004, 0xcfc00110, 0x80000168, 0x6c708000, 0x6c544000, 0x43158000, 0x5b304a00, 0xc2800002,
+    0x58300004, 0xce800008, 0x6c508000, 0xc0004880, 0x40100000, 0x5800000e, 0xc9000000, 0x00000000,
+    0x00000000, 0x59100002, 0xcd000000, 0xc0004816, 0xc8000000, 0x00000000, 0x00000000, 0x5c000000,
+    0x84000072, 0xc11c0000, 0xc000082c, 0xcd040e08, 0xc0004816, 0xc8000000, 0x00000000, 0x00000000,
+    0x5c000000, 0x84000012, 0x00000000, 0x00000000, 0x00000000, 0x8000ffa0, 0xc11c0002, 0xc000082c,
+    0xcd040e08, 0x00000000, 0x00000000, 0x00000000, 0xa8e2ffc8, 0x00000000, 0xc1220002, 0xd90c0000,
+    0x80000a80, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa8e2ffc8, 0x00000000, 0xc1220002,
+    0xd90c0000, 0xc0004964, 0xca000000, 0x6c7c8000, 0x6c544000, 0x43d5e000, 0x5bfc4a00, 0xdfe40000,
+    0x5e200002, 0x840006a0, 0x00000000, 0x583c0004, 0xc2800000, 0xca820080, 0xc0004930, 0xcac00000,
+    0x00000000, 0x00000000, 0x6eece000, 0x6eefc010, 0x46e8a000, 0xc1000000, 0xdd500041, 0x6d106010,
+    0x4514a000, 0xc1000000, 0xdd514209, 0x4514c000, 0xa9500181, 0xc00049a6, 0xca000000, 0xa94a0003,
+    0x00000000, 0x6e660000, 0x6e660010, 0x46252000, 0x8400014a, 0x00000000, 0xc0004812, 0xc8000000,
+    0x00000000, 0x00000000, 0x5c000000, 0x84000072, 0xc11c0000, 0xc000082c, 0xcd040e08, 0xc0004812,
+    0xc8000000, 0x00000000, 0x00000000, 0x5c000000, 0x84000012, 0x00000000, 0x00000000, 0x00000000,
+    0x8000ffa0, 0xc11c0002, 0xc000082c, 0xcd040e08, 0x6c508000, 0xc0004880, 0x40100000, 0x58000004,
+    0xc9000000, 0x00000000, 0x00000000, 0x59100002, 0xcd000000, 0x6c508000, 0xc0004880, 0x40100000,
+    0x58000006, 0xc9000000, 0x00000000, 0x00000000, 0x41148000, 0xcd000000, 0x800007d0, 0x00000000,
+    0xa95203a1, 0xc0001004, 0xcb800000, 0xc3400000, 0xdd740041, 0x5f740000, 0x840000b8, 0xc1218e08,
+    0x5911baf6, 0x47908000, 0x8400035a, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000008,
+    0xc9000000, 0x00000000, 0x00000000, 0x59100002, 0xcd000000, 0x6c508000, 0xc0004880, 0x40100000,
+    0x5800000a, 0xc9000000, 0x00000000, 0x00000000, 0x41148000, 0xcd000000, 0x800006d0, 0x00000000,
+    0xc000496c, 0xcb000000, 0x583c0026, 0xcac00000, 0xc0004878, 0xc8040000, 0x6c908000, 0x41088000,
+    0x40100000, 0x58000002, 0xca800000, 0x00000000, 0x00000000, 0x6ea90000, 0x5d300008, 0x88000032,
+    0x59300002, 0xc3000000, 0xc5300010, 0x6d104010, 0x40100000, 0xca800000, 0x5c000002, 0xcac00000,
+    0x5d300000, 0x84000022, 0x6f246000, 0x6ae56000, 0xc1000040, 0x46512000, 0x6aa54010, 0x42e96000,
+    0x583c0026, 0xcec00000, 0xc1218e08, 0x5911baf6, 0xc0001004, 0xcd000000, 0x593c0026, 0xc000100e,
+    0xcd000068, 0xc1340000, 0xc0001010, 0xcd001a08, 0xc1200008, 0xa94a0003, 0xc0001012, 0xc1200004,
+    0x59100004, 0xcd0000c0, 0xc1360002, 0xcd001b08, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0xa8e2ffc8, 0x00000000, 0xc1220002, 0xd90c0000, 0xc0001004, 0xc9000000, 0x00000000,
+    0x00000000, 0x47908000, 0x8400009a, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000008,
+    0xc9000000, 0x00000000, 0x00000000, 0x59100002, 0xcd000000, 0x6c508000, 0xc0004880, 0x40100000,
+    0x5800000a, 0xc9000000, 0x00000000, 0x00000000, 0x41148000, 0xcd000000, 0x80000410, 0x00000000,
+    0x6c508000, 0xc0004880, 0x40100000, 0x58000000, 0xc9000000, 0x00000000, 0x00000000, 0x59100002,
+    0xcd000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000002, 0xc9000000, 0x00000000, 0x00000000,
+    0x41148000, 0xcd000000, 0xc0004930, 0xcd800080, 0xc3000000, 0x583c0008, 0xcf000000, 0x800000e8,
+    0xc0001004, 0xca000000, 0x583c0006, 0xce400000, 0x583c0024, 0xce000000, 0xc0004814, 0xc8000000,
+    0x00000000, 0x00000000, 0x5c000000, 0x8400008a, 0xc001fffe, 0x46400000, 0x84000070, 0xc11c0000,
+    0xc000082c, 0xcd040e08, 0xc0004814, 0xc8000000, 0x00000000, 0x00000000, 0x5c000000, 0x84000012,
+    0x00000000, 0x00000000, 0x00000000, 0x8000ffa0, 0xc11c0002, 0xc000082c, 0xcd040e08, 0xc0004862,
+    0xc2000000, 0xca000080, 0xc000493a, 0xca400000, 0x00000000, 0x00000000, 0x42254000, 0x5ee80200,
+    0x8800fffa, 0xc6e80000, 0xc0004000, 0x58001600, 0x40280000, 0xcb800000, 0x00000000, 0x583c0022,
+    0xcf800000, 0xc0004862, 0xce800080, 0xc0001406, 0xcac00000, 0xc2800002, 0x00000000, 0xc66c1050,
+    0xc6ac0a08, 0xcec00000, 0xc2000000, 0xdf600040, 0x5e600080, 0x8400ffd2, 0xc000491c, 0xca400000,
+    0xc000491e, 0xca800000, 0x99006840, 0xda580000, 0xda980001, 0x00000000, 0xc0004964, 0xcbc00000,
+    0x00000000, 0x00000000, 0x5ffc0000, 0x840000ea, 0xc2000000, 0xdf610050, 0x5e6001fe, 0x8800ffd0,
+    0xc000491a, 0xc9800000, 0xc0004862, 0xc9400000, 0x6d9c6000, 0x459ce000, 0x59dc4c80, 0x990066a0,
+    0xd9580000, 0xd9980001, 0xd9d40000, 0x99006618, 0xc000491c, 0xc1400000, 0xc9420050, 0xc2000000,
+    0xdf600040, 0x5e600080, 0x8400ffd2, 0xc000491c, 0xca400000, 0xc000491e, 0xca800000, 0x99006840,
+    0xda580000, 0xda980001, 0x00000000, 0xc0004970, 0xcb400000, 0x00000000, 0x00000000, 0x5e740082,
+    0x8400e498, 0x00000000, 0x8000bc70, 0x00000000, 0x6c508000, 0xc0004880, 0x40100000, 0x58000016,
+    0xc9000000, 0x00000000, 0x00000000, 0x59100002, 0xcd000000, 0x8000e0c8, 0x6c6c8000, 0x6c544000,
+    0x42d56000, 0x5aec4a00, 0xc000487c, 0xc8040000, 0x00000000, 0x00000000, 0x40080000, 0xca000000,
+    0xc4240000, 0x00000000, 0xa6060108, 0xc3c00000, 0xc2000000, 0x582c000c, 0xca010040, 0x00000000,
+    0x00000000, 0x5a200002, 0xc6100840, 0xcd000840, 0x5e60000e, 0x8400bb58, 0xc2200000, 0x582c0002,
+    0xce001010, 0x582c000c, 0xcfc00840, 0x582c0020, 0xcfc01080, 0x582c0010, 0xc1400000, 0xcd400001,
+    0xcd400001, 0xcd400001, 0xcd400001, 0xcd400001, 0xcd400001, 0xcd400001, 0xcd400001, 0xcd400020,
+    0xc000481a, 0xca000000, 0x00000000, 0x00000000, 0x5a200002, 0xce000000, 0x8000ba90, 0xc2200004,
+    0x582c0002, 0xce001010, 0x582c000c, 0xcfc00840, 0x99006f68, 0x582c0002, 0xc9400000, 0xc1a20000,
+    0x8000ba40, 0xc3e1fffe, 0x597dfffe, 0x593dfef4, 0x94000001, 0x00000000, 0x00000000, 0x00000000,
+    0xc0800000, 0xdf4b0040, 0xc0004900, 0xcb800000, 0xc2000000, 0xc000490a, 0xa78000b0, 0xcbc00000,
+    0xc1000000, 0xd9000001, 0xc1000002, 0xd90c0000, 0x6ff46000, 0x47f5a000, 0x5b744c80, 0xc2400000,
+    0x58340004, 0xca400080, 0xc0004900, 0xce000008, 0x5a640002, 0x58340004, 0xc6500080, 0xcd000080,
+    0xc0004914, 0xca400000, 0xc2000002, 0x6a3d0000, 0x72252000, 0xce400000, 0xc0000408, 0xce000000,
+    0xa78200a8, 0xc0004908, 0xcbc00000, 0xc1000000, 0xd9000001, 0xc1000002, 0xd90c0000, 0x6ff4a000,
+    0x47f5a000, 0x5b744e20, 0xc2800000, 0x58340006, 0xca800080, 0xc2000000, 0xc0004900, 0xce000108,
+    0x5ea80002, 0x58340006, 0xc6900080, 0xcd000080, 0x5a7c0020, 0xc2000002, 0x6a250000, 0xc0000408,
+    0xce000000, 0xdca80001, 0x5ea80000, 0x8400a7f8, 0x00000000, 0xa4800210, 0x00000000, 0xc3c00000,
+    0xc000140e, 0xcbc00020, 0xc3400000, 0xc2400000, 0x6ff86000, 0x47f9c000, 0x5bb84c80, 0x58380008,
+    0xcb400080, 0x58380006, 0xca400080, 0x5f740002, 0x58380008, 0xc7500080, 0xcd000080, 0xc2000000,
+    0x58380004, 0xca020080, 0xc3000000, 0x5838000c, 0xcb000028, 0x5a640002, 0x46250000, 0x8400fff8,
+    0xc2400000, 0x58380006, 0xc6500080, 0xcd000080, 0xc2000000, 0x5838000a, 0xca020080, 0x5b300002,
+    0x5838000c, 0xc7100028, 0xcd000028, 0xc2420020, 0x5a200004, 0x46612000, 0x8400fff8, 0xc2000000,
+    0x5838000a, 0xc6101080, 0xcd001080, 0xc000498c, 0xca400000, 0xc2000002, 0x6a3d0000, 0x72252000,
+    0xce400000, 0x5f740000, 0x84000028, 0xc0004912, 0xca000000, 0xc2c00002, 0x6afd6000, 0x7ec16000,
+    0x76e10000, 0xce000000, 0x5f300020, 0x84000028, 0xc0004924, 0xca000000, 0xc2c00002, 0x6afd6000,
+    0x7ec16000, 0x76e10000, 0xce000000, 0xa4820050, 0xc2400000, 0xc000140e, 0xca408020, 0xc2000002,
+    0xc0004900, 0xce000008, 0xc000490a, 0xce400000, 0xc1000000, 0xd9000001, 0xd8400080, 0xc1000004,
+    0xd9000001, 0xa48402b8, 0x00000000, 0xc3c00000, 0xc000140e, 0xcbc10020, 0xc2800000, 0xc2000000,
+    0x6ff8a000, 0x47f9c000, 0x5bb84e20, 0x58380036, 0xca800080, 0x58380006, 0xca020080, 0xc3400000,
+    0x58380036, 0xcb420080, 0x5aa80002, 0x46290000, 0x8400fff8, 0xc2800000, 0x58380036, 0xc6900080,
+    0xcd000080, 0x5f740002, 0x58380036, 0xc7501080, 0xcd001080, 0xc000498e, 0xca400000, 0xc2000002,
+    0x6a3d0000, 0x72252000, 0xce400000, 0xc000492a, 0xca800000, 0x5e740000, 0x84000028, 0xc0004910,
+    0xca000000, 0xc2c00002, 0x6afd6000, 0x7ec16000, 0x76e10000, 0xce000000, 0x6abd4010, 0xa6800112,
+    0x00000000, 0x5838003a, 0xca000000, 0x58000002, 0xca400000, 0x5838000e, 0x00000000, 0xce000001,
+    0xce400000, 0xc2400000, 0xdd250040, 0xc1000080, 0x46508000, 0xc2400000, 0xc6240080, 0x45250000,
+    0x00000000, 0xc5240004, 0x5d240078, 0xc1000078, 0xc5240004, 0xc6600080, 0x5c000002, 0xce000080,
+    0xc000492a, 0xca000000, 0xc2c00002, 0x6afd6000, 0x72e10000, 0xce000000, 0xc000492c, 0xca000000,
+    0xc2c00002, 0x6afd6000, 0x72e10000, 0xce000000, 0x80000028, 0xc000492c, 0xca000000, 0xc2c00002,
+    0x6afd6000, 0x7ec16000, 0x76e10000, 0xce000000, 0xa4880068, 0xc2c00000, 0xc000140e, 0xcac20020,
+    0xc000490e, 0xca400000, 0xc2000002, 0x6a2d0000, 0x7e010000, 0x76252000, 0xce400000, 0xc0004990,
+    0xca400000, 0xc2000002, 0x6a2d0000, 0x72252000, 0xce400000, 0xa4860050, 0xc2400000, 0xc000140e,
+    0xca418020, 0xc2020002, 0xc0004900, 0xce000108, 0xc0004908, 0xce400000, 0xc1000000, 0xd9000001,
+    0xd8400080, 0xc1000004, 0xd9000001, 0xc0001408, 0xcc800000, 0xc10e0002, 0xd90c0000, 0x8000f738,
+    0xdfbc0001, 0xc0004992, 0x99006fa8, 0xc9400000, 0xc7d80000, 0x00000000, 0xc5700000, 0x5ef00020,
+    0x88000140, 0x6f346000, 0x4735a000, 0x5b744c80, 0x58340008, 0xc2400000, 0xca400080, 0x00000000,
+    0xc2000000, 0x5a640002, 0xc6500080, 0xcd000080, 0x58340004, 0xca000080, 0x00000000, 0x00000000,
+    0x5e200002, 0xc6100080, 0xcd000080, 0xc0004912, 0xca800000, 0xc2400002, 0x6a712000, 0x72694000,
+    0xce800000, 0x5e200000, 0x8400003a, 0xc000480a, 0xca000000, 0xc0000408, 0xca800000, 0x76610000,
+    0x00000000, 0x72294000, 0xce800000, 0x80000020, 0xc0004914, 0xca000000, 0x7e412000, 0x00000000,
+    0x76610000, 0xce000000, 0x800000b0, 0x6ef4a000, 0x46f5a000, 0x5b744e20, 0x58340036, 0xc2400000,
+    0xca420080, 0x00000000, 0xc2000000, 0x5a640002, 0xc6501080, 0xcd001080, 0x58340006, 0xca000080,
+    0x00000000, 0x00000000, 0x5a200002, 0xc6100080, 0xcd000080, 0xc0004910, 0xca400000, 0xc2000002,
+    0x6a2d0000, 0x72252000, 0xce400000, 0xc2000002, 0x6a310000, 0xc000042a, 0xce000000, 0xc1040002,
+    0xd90c0000, 0x00000000, 0x8000f4a0, 0x00000000, 0xc4980930, 0x9d000000, 0xc5580030, 0xc0000838,
+    0xcd840000, 0xc1440200, 0xc1c01600, 0xc55c1078, 0xc000100e, 0x9d000000, 0xcd800000, 0xc000100c,
+    0xcdc00000, 0xc0004862, 0xc9c00000, 0x00000000, 0x00000000, 0xd9d80001, 0xc0005600, 0x401c0000,
+    0x5dc05800, 0x8800fffa, 0x5c000200, 0xcd800000, 0xc1f0000a, 0x71d4a000, 0xdd980000, 0xdd9c0001,
+    0x41d8e000, 0xc5d40268, 0xc0001010, 0xcd400000, 0x6c9c8000, 0x449ce000, 0x449ce000, 0x59dc0004,
+    0xc1601260, 0xc5d40268, 0x9d000000, 0xc0001012, 0xcd400000, 0x00000000, 0x00000000, 0xd9580000,
+    0x6d586000, 0x4558c000, 0x59984c80, 0xd9980001, 0x5818000a, 0xc1800000, 0xc9800080, 0xc0005400,
+    0x6d5ca000, 0x401c0000, 0x40180000, 0xc9400000, 0x58000002, 0x00000000, 0xc9c00000, 0xc0004930,
+    0xcd400000, 0xc0004932, 0xcdc00000, 0x59980004, 0xc1c20020, 0xb59cfff8, 0x00000000, 0xc1800000,
+    0xdd9c0001, 0x581c000a, 0xcd800080, 0x581c000c, 0xc1800000, 0xc9800028, 0xc1c00002, 0xdd940000,
+    0x69d4e000, 0x5d980002, 0xcd800028, 0xc0004924, 0xc9800000, 0x00000000, 0x9d000000, 0x00000000,
+    0x71d8c000, 0xcd800000, 0xc000492a, 0xc9400000, 0xc1c00002, 0x69d8e000, 0x7dc0c000, 0x7594a000,
+    0xcd400000, 0xc000492c, 0xc9400000, 0xdd800001, 0x5800003a, 0x75d4a000, 0x840000f0, 0xc9400001,
+    0xc9800000, 0xdd800001, 0x5800000e, 0x00000000, 0xcd400001, 0xcd800000, 0xc1800000, 0xdd190040,
+    0xc1000080, 0x45908000, 0xc1800000, 0xc5580080, 0x4518a000, 0x00000000, 0xc5180004, 0x5d180078,
+    0xc1000078, 0xc5180004, 0xc5940080, 0x5c000002, 0xcd400080, 0xc000492c, 0xc9400000, 0xc000492a,
+    0xc9800000, 0x71d4a000, 0xc000492c, 0xcd400000, 0x71d8c000, 0xc000492a, 0xcd800000, 0x9cc00000,
+    0x00000000, 0x00000000, 0x00000000, 0xc0004862, 0xc9800000, 0x00000000, 0xc1c00200, 0x4194c000,
+    0x45d8e000, 0x8800fffa, 0xc5d80000, 0xc0004862, 0xcd800000, 0xc0001406, 0xc9800000, 0xc1c00002,
+    0x9d000000, 0xc5d80a08, 0xc5581050, 0xcd800000, 0xc0004930, 0xc9800000, 0xc0004932, 0xc9c00000,
+    0xc140000e, 0xc5581c20, 0xdd940000, 0xc0005600, 0x40140000, 0x5d405800, 0x8800fffa, 0x5c000200,
+    0xcd800000, 0x58000002, 0x5d405800, 0x8800fffa, 0x5c000200, 0xcdc00000, 0xdd540000, 0xc1c00000,
+    0x58140006, 0xc9c20080, 0xc1800000, 0x58140000, 0xc98000e0, 0x6ddc2000, 0xc000491e, 0x41d8e000,
+    0xcdc00000, 0xdd980000, 0xc1c00022, 0xc5d80d78, 0xdd940001, 0xc5581c20, 0xc000491c, 0xcd800000,
+    0xdd540000, 0xc1c00000, 0x58140006, 0xc9c20080, 0xc1800000, 0x58140004, 0xc9820080, 0x00000000,
+    0x59dc0002, 0x459cc000, 0x8400fff8, 0xc1c00000, 0x9d000000, 0x58140006, 0xc5d81080, 0xcd801080,
+    0xc0004860, 0xc9400000, 0xc1820080, 0xc1d00002, 0x58146b00, 0xd5800000, 0x58000002, 0xd5800001,
+    0x59540004, 0xb558fff8, 0xc0004860, 0xc1400000, 0xcd400000, 0xdd980001, 0x9d000000, 0xdd940000,
+    0xc0001404, 0xcdc00808, 0xc1c00000, 0xc1800200, 0x5d980004, 0xdf5d0050, 0x45d8a000, 0x8800ffda,
+    0xdd800001, 0x5800000e, 0x00000000, 0xc9400001, 0xc9800000, 0xc1c00002, 0xc5d43f08, 0xc5d81e08,
+    0xc0004862, 0xc9c00000, 0x00000000, 0x00000000, 0x581c5600, 0x5dc05800, 0x8800fffa, 0x5c000200,
+    0xcd400000, 0x58000002, 0x5dc05800, 0x8800fffa, 0x5c000200, 0xcd800000, 0xc0004862, 0xc9c00000,
+    0x00000000, 0xc15004c0, 0xc5d40068, 0xdd9c0000, 0xc5d41c20, 0xc1c00000, 0xdd800001, 0x58000038,
+    0xc9c00080, 0xdd800001, 0xc1800000, 0x58000002, 0xc98000e0, 0x6ddc2000, 0xc000491c, 0x41d8e000,
+    0xcd400001, 0xcdc00000, 0xdd940001, 0xc1c00000, 0x58140038, 0xc9c00080, 0xc1800000, 0x58140006,
+    0xc9820080, 0x00000000, 0x59dc0002, 0x459cc000, 0x8400fff8, 0xc1c00000, 0x9d000000, 0x58140038,
+    0xc5d80080, 0xcd800080, 0xc1c00000, 0xdf5c0040, 0x5ddc0080, 0x8400ffd2, 0x00000000, 0x9d000000,
+    0x00000000, 0x00000000, 0x00000000, 0xc160fffe, 0xc0000a10, 0xc9440068, 0xc1a0fffe, 0x59980e28,
+    0xc000100c, 0xcd400000, 0xc000100e, 0xcd800000, 0xc0004962, 0xc9800000, 0x00000000, 0xc170000a,
+    0x7194a000, 0x6c988000, 0x4498c000, 0x4498c000, 0x59980004, 0xc5940278, 0xc0001010, 0xcd400000,
+    0xc0004946, 0xc9400000, 0x00000000, 0x00000000, 0x6d58a000, 0x6d5c4000, 0x45d8c000, 0x4558c000,
+    0xc000494a, 0xc9400000, 0xc0004948, 0xc9c00000, 0x4194c000, 0xc1400012, 0xc55c1820, 0x9d000000,
+    0xc59c0270, 0xc0001012, 0xcdc00000, 0xc1400000, 0x58000014, 0xc9410040, 0xc0004950, 0xc9c00000,
+    0xc5580000, 0xc5940840, 0xc5581080, 0xd9940000, 0xc000493c, 0xc9400000, 0xc0004954, 0xc9800000,
+    0x59dc00a8, 0x455ce000, 0x41d8e000, 0x5d5c0030, 0x8800fff8, 0xc1c00030, 0xc1800000, 0xc5d84030,
+    0xc1400000, 0xc5d40010, 0x5dd40002, 0x8400005a, 0x5dd40004, 0x84000082, 0x5dd40006, 0x840000aa,
+    0x5dd80026, 0x840000d2, 0xdd540000, 0xdd800001, 0x58000008, 0x40180000, 0xcd400000, 0x59980002,
+    0x8000ffa8, 0xdd540000, 0xdd800001, 0x58000008, 0x40180000, 0xcd4000c0, 0x59980002, 0x8000ff70,
+    0xdd540000, 0xdd800001, 0x58000008, 0x40180000, 0xcd400080, 0x59980002, 0x8000ff38, 0xdd540000,
+    0xdd800001, 0x58000008, 0x40180000, 0xcd400040, 0x59980002, 0x8000ff00, 0x00000000, 0x9d000000,
+    0x00000000, 0x00000000, 0x00000000, 0x58000014, 0xc9400000, 0xc0004954, 0xc9c00000, 0xc0004950,
+    0xc9400080, 0xdd800001, 0x5800002a, 0x5d9c0000, 0x8400003a, 0x5d9c0002, 0x8400003a, 0x5d9c0004,
+    0x84000052, 0xc55b0040, 0xc55c08c0, 0xcd800041, 0xcdc008c0, 0x80000048, 0xcd400000, 0x80000038,
+    0xc55900c0, 0xc55c1840, 0xcd8000c1, 0xcdc01840, 0x80000010, 0xc55a0080, 0xc55c1080, 0xcd800081,
+    0xcdc01080, 0x9d000000, 0x00000000, 0x00000000, 0x00000000, 0xc1e00000, 0xa540fffa, 0xc0000a14,
+    0xc1a20002, 0x9d000000, 0xcd841108, 0xc0000a1c, 0xcdc41040, 0x59540002, 0x6994e018, 0x61c0c008,
+    0x4194a000, 0x5d940040, 0x8800fffa, 0xc5940000, 0x9d000000, 0xcd400000, 0x00000000, 0x00000000,
+};
+
+static unsigned int firmware_binary_data[] = {
+};
+
+
+#endif  //  IFXMIPS_PTM_FW_DANUBE_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_adsl.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_adsl.h
new file mode 100644
index 0000000..d6bdfd9
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_adsl.h
@@ -0,0 +1,284 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_fw_regs_adsl.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (firmware register for ADSL)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_FW_REGS_ADSL_H
+#define IFXMIPS_PTM_FW_REGS_ADSL_H
+
+
+
+#if defined(CONFIG_DANUBE)
+  #include "ifxmips_ptm_fw_regs_danube.h"
+#elif defined(CONFIG_AMAZON_SE)
+  #include "ifxmips_ptm_fw_regs_amazon_se.h"
+#elif defined(CONFIG_AR9)
+  #include "ifxmips_ptm_fw_regs_ar9.h"
+#elif defined(CONFIG_VR9)
+  #error VR9 is not ADSL PTM mode!
+#else
+  #error Platform is not specified!
+#endif
+
+
+
+/*
+ *  MIB Table Maintained by Firmware
+ */
+
+struct wan_mib_table {
+    unsigned int            wrx_correct_pdu;            /* 0 */
+    unsigned int            wrx_correct_pdu_bytes;      /* 1 */
+    unsigned int            wrx_tccrc_err_pdu;          /* 2 */
+    unsigned int            wrx_tccrc_err_pdu_bytes;    /* 3 */
+    unsigned int            wrx_ethcrc_err_pdu;         /* 4 */
+    unsigned int            wrx_ethcrc_err_pdu_bytes;   /* 5 */
+    unsigned int            wrx_nodesc_drop_pdu;        /* 6 */
+    unsigned int            wrx_len_violation_drop_pdu; /* 7 */
+    unsigned int            wrx_idle_bytes;             /* 8 */
+    unsigned int            wrx_nonidle_cw;             /* 9 */
+    unsigned int            wrx_idle_cw;                /* A */
+    unsigned int            wrx_err_cw;                 /* B */
+    unsigned int            wtx_total_pdu;              /* C */
+    unsigned int            wtx_total_bytes;            /* D */
+    unsigned int            res0;                       /* E */
+    unsigned int            res1;                       /* F */
+};
+
+
+/*
+ *  Host-PPE Communication Data Structure
+ */
+
+#if defined(__BIG_ENDIAN)
+
+  struct fw_ver_id {
+    unsigned int family         :4;
+    unsigned int fwtype         :4;
+    unsigned int interface      :4;
+    unsigned int fwmode         :4;
+    unsigned int major          :8;
+    unsigned int minor          :8;
+  };
+
+  struct wrx_port_cfg_status {
+    /* 0h */
+    unsigned int mfs            :16;
+    unsigned int res0           :12;
+    unsigned int dmach          :3;
+    unsigned int res1           :1;
+
+    /* 1h */
+    unsigned int res2           :14;
+    unsigned int local_state    :2;     //  init with 0, written by firmware only
+    unsigned int res3           :15;
+    unsigned int partner_state  :1;     //  init with 0, written by firmware only
+
+  };
+
+  struct wrx_dma_channel_config {
+    /*  0h  */
+    unsigned int res3           :1;
+    unsigned int res4           :2;
+    unsigned int res5           :1;
+    unsigned int desba          :28;
+    /*  1h  */
+    unsigned int res1           :16;
+    unsigned int res2           :16;
+    /*  2h  */
+    unsigned int deslen         :16;
+    unsigned int vlddes         :16;
+  };
+
+  struct wtx_port_cfg {
+    /* 0h */
+    unsigned int tx_cwth2       :8;
+    unsigned int tx_cwth1       :8;
+    unsigned int res0           :16;
+  };
+
+  struct wtx_dma_channel_config {
+    /*  0h  */
+    unsigned int res3           :1;
+    unsigned int res4           :2;
+    unsigned int res5           :1;
+    unsigned int desba          :28;
+
+    /*  1h  */
+    unsigned int res1           :16;
+    unsigned int res2           :16;
+
+    /*  2h  */
+    unsigned int deslen         :16;
+    unsigned int vlddes         :16;
+  };
+
+  struct eth_efmtc_crc_cfg {
+    /*  0h  */
+    unsigned int res0               :6;
+    unsigned int tx_eth_crc_gen     :1;
+    unsigned int tx_tc_crc_gen      :1;
+    unsigned int tx_tc_crc_len      :8;
+    unsigned int res1               :5;
+    unsigned int rx_eth_crc_present :1;
+    unsigned int rx_eth_crc_check   :1;
+    unsigned int rx_tc_crc_check    :1;
+    unsigned int rx_tc_crc_len      :8;
+  };
+
+  /* DMA descriptor */
+  struct rx_descriptor {
+    /*  0 - 3h  */
+    unsigned int own            :1;
+    unsigned int c              :1;
+    unsigned int sop            :1;
+    unsigned int eop            :1;
+    unsigned int res1           :3;
+    unsigned int byteoff        :2;
+    unsigned int res2           :2;
+    unsigned int id             :4;
+    unsigned int err            :1;
+    unsigned int datalen        :16;
+    /*  4 - 7h  */
+    unsigned int res3           :4;
+    unsigned int dataptr        :28;
+  };
+
+  struct tx_descriptor {
+    /*  0 - 3h  */
+    unsigned int own            :1;
+    unsigned int c              :1;
+    unsigned int sop            :1;
+    unsigned int eop            :1;
+    unsigned int byteoff        :5;
+    unsigned int res1           :5;
+    unsigned int iscell         :1;
+    unsigned int clp            :1;
+    unsigned int datalen        :16;
+    /*  4 - 7h  */
+    unsigned int res2           :4;
+    unsigned int dataptr        :28;
+  };
+
+#else /* defined(__BIG_ENDIAN) */
+
+  struct wrx_port_cfg_status {
+    /* 0h */
+    unsigned int res1           :1;
+    unsigned int dmach          :3;
+    unsigned int res0           :12;
+    unsigned int mfs            :16;
+
+    /* 1h */
+    unsigned int partner_state  :1;
+    unsigned int res3           :15;
+    unsigned int local_state    :2;
+    unsigned int res2           :14;
+  };
+
+  struct wrx_dma_channel_config {
+    /*  0h  */
+    unsigned int desba          :28;
+    unsigned int res5           :1;
+    unsigned int res4           :2;
+    unsigned int res3           :1;
+    /*  1h  */
+    unsigned int res2           :16;
+    unsigned int res1           :16;
+    /*  2h  */
+    unsigned int vlddes         :16;
+    unsigned int deslen         :16;
+  };
+
+  struct wtx_port_cfg {
+    /* 0h */
+    unsigned int res0           :16;
+    unsigned int tx_cwth1       :8;
+    unsigned int tx_cwth2       :8;
+  };
+
+  struct wtx_dma_channel_config {
+    /*  0h  */
+    unsigned int desba          :28;
+    unsigned int res5           :1;
+    unsigned int res4           :2;
+    unsigned int res3           :1;
+    /*  1h  */
+    unsigned int res2           :16;
+    unsigned int res1           :16;
+    /*  2h  */
+    unsigned int vlddes         :16;
+    unsigned int deslen         :16;
+  };
+
+  struct eth_efmtc_crc_cfg {
+    /*  0h  */
+    unsigned int rx_tc_crc_len      :8;
+    unsigned int rx_tc_crc_check    :1;
+    unsigned int rx_eth_crc_check   :1;
+    unsigned int rx_eth_crc_present :1;
+    unsigned int res1               :5;
+    unsigned int tx_tc_crc_len      :8;
+    unsigned int tx_tc_crc_gen      :1;
+    unsigned int tx_eth_crc_gen     :1;
+    unsigned int res0               :6;
+  };
+
+  /* DMA descriptor */
+  struct rx_descriptor {
+    /*  4 - 7h  */
+    unsigned int dataptr        :28;
+    unsigned int res3           :4;
+    /*  0 - 3h  */
+    unsigned int datalen        :16;
+    unsigned int err            :1;
+    unsigned int id             :4;
+    unsigned int res2           :2;
+    unsigned int byteoff        :2;
+    unsigned int res1           :3;
+    unsigned int eop            :1;
+    unsigned int sop            :1;
+    unsigned int c              :1;
+    unsigned int own            :1;
+  };
+
+  struct tx_descriptor {
+    /*  4 - 7h  */
+    unsigned int dataptr        :28;
+    unsigned int res2           :4;
+    /*  0 - 3h  */
+    unsigned int datalen        :16;
+    unsigned int clp            :1;
+    unsigned int iscell         :1;
+    unsigned int res1           :5;
+    unsigned int byteoff        :5;
+    unsigned int eop            :1;
+    unsigned int sop            :1;
+    unsigned int c              :1;
+    unsigned int own            :1;
+  };
+#endif  /* defined(__BIG_ENDIAN) */
+
+
+
+#endif  //  IFXMIPS_PTM_FW_REGS_ADSL_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_amazon_se.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_amazon_se.h
new file mode 100644
index 0000000..1219b6b
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_amazon_se.h
@@ -0,0 +1,48 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_fw_regs_amazon_se.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (firmware register for Amazon-SE)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_FW_REGS_AMAZON_SE_H
+#define IFXMIPS_PTM_FW_REGS_AMAZON_SE_H
+
+
+
+/*
+ *  Host-PPE Communication Data Address Mapping
+ */
+#define FW_VER_ID                       ((volatile struct fw_ver_id *)              SB_BUFFER(0x2401))
+#define CFG_WAN_WRDES_DELAY             SB_BUFFER(0x2404)
+#define CFG_WRX_DMACH_ON                SB_BUFFER(0x2405)
+#define CFG_WTX_DMACH_ON                SB_BUFFER(0x2406)
+#define CFG_WRX_LOOK_BITTH              SB_BUFFER(0x2407)
+#define CFG_ETH_EFMTC_CRC               ((volatile struct eth_efmtc_crc_cfg *)      SB_BUFFER(0x2408))
+#define WAN_MIB_TABLE                   ((volatile struct wan_mib_table*)           SB_BUFFER(0x2440))
+#define WRX_PORT_CONFIG(i)              ((volatile struct wrx_port_cfg_status*)     SB_BUFFER(0x2500 + (i) * 20))
+#define WRX_DMA_CHANNEL_CONFIG(i)       ((volatile struct wrx_dma_channel_config*)  SB_BUFFER(0x2640 + (i) * 7))
+#define WTX_PORT_CONFIG(i)              ((volatile struct wtx_port_cfg*)            SB_BUFFER(0x2710 + (i) * 31))
+#define WTX_DMA_CHANNEL_CONFIG(i)       ((volatile struct wtx_dma_channel_config*)  SB_BUFFER(0x2711 + (i) * 31))
+
+
+
+#endif  //  IFXMIPS_PTM_FW_REGS_AMAZON_SE_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_ar9.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_ar9.h
new file mode 100644
index 0000000..43f4da9
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_ar9.h
@@ -0,0 +1,48 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_fw_regs_ar9.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (firmware register for AR9)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_FW_REGS_AR9_H
+#define IFXMIPS_PTM_FW_REGS_AR9_H
+
+
+
+/*
+ *  Host-PPE Communication Data Address Mapping
+ */
+#define FW_VER_ID                       ((volatile struct fw_ver_id *)              SB_BUFFER(0x2001))
+#define CFG_WAN_WRDES_DELAY             SB_BUFFER(0x2404)
+#define CFG_WRX_DMACH_ON                SB_BUFFER(0x2405)
+#define CFG_WTX_DMACH_ON                SB_BUFFER(0x2406)
+#define CFG_WRX_LOOK_BITTH              SB_BUFFER(0x2407)
+#define CFG_ETH_EFMTC_CRC               ((volatile struct eth_efmtc_crc_cfg *)      SB_BUFFER(0x2408))
+#define WAN_MIB_TABLE                   ((volatile struct wan_mib_table*)           SB_BUFFER(0x2440))
+#define WRX_PORT_CONFIG(i)              ((volatile struct wrx_port_cfg_status*)     SB_BUFFER(0x3F00 + (i) * 20))
+#define WRX_DMA_CHANNEL_CONFIG(i)       ((volatile struct wrx_dma_channel_config*)  SB_BUFFER(0x2640 + (i) * 7))
+#define WTX_PORT_CONFIG(i)              ((volatile struct wtx_port_cfg*)            SB_BUFFER(0x3B00 + (i) * 31))
+#define WTX_DMA_CHANNEL_CONFIG(i)       ((volatile struct wtx_dma_channel_config*)  SB_BUFFER(0x3B01 + (i) * 31))
+
+
+
+#endif  //  IFXMIPS_PTM_FW_REGS_AR9_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_danube.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_danube.h
new file mode 100644
index 0000000..d8685f3
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_danube.h
@@ -0,0 +1,48 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_fw_regs_danube.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (firmware register for Danube)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_FW_REGS_DANUBE_H
+#define IFXMIPS_PTM_FW_REGS_DANUBE_H
+
+
+
+/*
+ *  Host-PPE Communication Data Address Mapping
+ */
+#define FW_VER_ID                       ((volatile struct fw_ver_id *)              SB_BUFFER(0x2001))
+#define CFG_WAN_WRDES_DELAY             SB_BUFFER(0x2404)
+#define CFG_WRX_DMACH_ON                SB_BUFFER(0x2405)
+#define CFG_WTX_DMACH_ON                SB_BUFFER(0x2406)
+#define CFG_WRX_LOOK_BITTH              SB_BUFFER(0x2407)
+#define CFG_ETH_EFMTC_CRC               ((volatile struct eth_efmtc_crc_cfg *)      SB_BUFFER(0x2408))
+#define WAN_MIB_TABLE                   ((volatile struct wan_mib_table*)           SB_BUFFER(0x2440))
+#define WRX_PORT_CONFIG(i)              ((volatile struct wrx_port_cfg_status*)     SB_BUFFER(0x2500 + (i) * 20))
+#define WRX_DMA_CHANNEL_CONFIG(i)       ((volatile struct wrx_dma_channel_config*)  SB_BUFFER(0x2640 + (i) * 7))
+#define WTX_PORT_CONFIG(i)              ((volatile struct wtx_port_cfg*)            SB_BUFFER(0x2710 + (i) * 31))
+#define WTX_DMA_CHANNEL_CONFIG(i)       ((volatile struct wtx_dma_channel_config*)  SB_BUFFER(0x2711 + (i) * 31))
+
+
+
+#endif  //  IFXMIPS_PTM_FW_REGS_DANUBE_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_vdsl.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_vdsl.h
new file mode 100644
index 0000000..e357197
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_vdsl.h
@@ -0,0 +1,278 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_fw_regs_vdsl.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (firmware register for VDSL)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_FW_REGS_VDSL_H
+#define IFXMIPS_PTM_FW_REGS_VDSL_H
+
+
+
+#if defined(CONFIG_DANUBE)
+  #error Danube is not VDSL PTM mode!
+#elif defined(CONFIG_AMAZON_SE)
+  #error Amazon-SE is not VDSL PTM mode!
+#elif defined(CONFIG_AR9)
+  #error AR9 is not VDSL PTM mode!
+#elif defined(CONFIG_VR9)
+  #include "ifxmips_ptm_fw_regs_vr9.h"
+#else
+  #error Platform is not specified!
+#endif
+
+
+
+/*
+ *  MIB Table Maintained by Firmware
+ */
+
+struct wan_rx_mib_table {
+    unsigned int            res1[2];
+    unsigned int            wrx_dropdes_pdu;
+    unsigned int            wrx_total_bytes;
+    unsigned int            res2[4];
+    //  wrx_total_pdu is implemented with hardware counter (not used by PTM TC)
+    //  check register "TC_RX_MIB_CMD"
+    //  "HEC_INC" used to increase preemption Gamma interface (wrx_total_pdu)
+    //  "AIIDLE_INC" used to increase normal Gamma interface (wrx_total_pdu)
+};
+
+struct wan_tx_mib_table {
+    //unsigned int            wtx_total_pdu;        //  version before 0.26
+    //unsigned int            small_pkt_drop_cnt;
+    //unsigned int            total_pkt_drop_cnt;
+    unsigned int            wrx_total_pdu;          //  version 0.26 and onwards
+    unsigned int            wrx_total_bytes;
+    unsigned int            wtx_total_pdu;
+    unsigned int            wtx_total_bytes;
+
+    unsigned int            wtx_cpu_dropsmall_pdu;
+    unsigned int            wtx_cpu_dropdes_pdu;
+    unsigned int            wtx_fast_dropsmall_pdu;
+    unsigned int            wtx_fast_dropdes_pdu;
+};
+
+
+/*
+ *  Host-PPE Communication Data Structure
+ */
+
+#if defined(__BIG_ENDIAN)
+
+  struct fw_ver_id {
+    unsigned int family         :4;
+    unsigned int fwtype         :4;
+    unsigned int interface      :4;
+    unsigned int fwmode         :4;
+    unsigned int major          :8;
+    unsigned int minor          :8;
+  };
+
+  struct cfg_std_data_len {
+    unsigned int res1           :14;
+    unsigned int byte_off       :2;     //  byte offset in RX DMA channel
+    unsigned int data_len       :16;    //  data length for standard size packet buffer
+  };
+
+  struct tx_qos_cfg {
+    unsigned int time_tick      :16;    //  number of PP32 cycles per basic time tick
+    unsigned int overhd_bytes   :8;     //  number of overhead bytes per packet in rate shaping
+    unsigned int eth1_eg_qnum   :4;     //  number of egress QoS queues (< 8);
+    unsigned int eth1_burst_chk :1;     //  always 1, more accurate WFQ
+    unsigned int eth1_qss       :1;     //  1: FW QoS, 0: HW QoS
+    unsigned int shape_en       :1;     //  1: enable rate shaping, 0: disable
+    unsigned int wfq_en         :1;     //  1: WFQ enabled, 0: strict priority enabled
+  };
+
+  struct psave_cfg {
+    unsigned int res1           :15;
+    unsigned int start_state    :1;     //  1: start from partial PPE reset, 0: start from full PPE reset
+    unsigned int res2           :15;
+    unsigned int sleep_en       :1;     //  1: enable sleep mode, 0: disable sleep mode
+  };
+
+  struct eg_bwctrl_cfg {
+    unsigned int fdesc_wm       :16;    //  if free descriptors in QoS/Swap channel is less than this watermark, large size packets are discarded
+    unsigned int class_len      :16;    //  if packet length is not less than this value, the packet is recognized as large packet
+  };
+
+  struct test_mode {
+    unsigned int res1           :30;
+    unsigned int mib_clear_mode :1;     //  1: MIB counter is cleared with TPS-TC software reset, 0: MIB counter not cleared
+    unsigned int test_mode      :1;     //  1: test mode, 0: normal mode
+  };
+
+  struct gpio_mode {
+    unsigned int res1           :3;
+    unsigned int gpio_bit_bc1   :5;
+    unsigned int res2           :3;
+    unsigned int gpio_bit_bc0   :5;
+
+    unsigned int res3           :7;
+    unsigned int gpio_bc1_en    :1;
+
+    unsigned int res4           :7;
+    unsigned int gpio_bc0_en    :1;
+  };
+
+  struct gpio_wm_cfg {
+    unsigned int stop_wm_bc1    :8;
+    unsigned int start_wm_bc1   :8;
+    unsigned int stop_wm_bc0    :8;
+    unsigned int start_wm_bc0   :8;
+  };
+
+  struct rx_bc_cfg {
+    unsigned int res1           :14;
+    unsigned int local_state    :2;     //  0: local receiver is "Looking", 1: local receiver is "Freewheel Sync False", 2: local receiver is "Synced", 3: local receiver is "Freewheel Sync Truee"
+    unsigned int res2           :15;
+    unsigned int remote_state   :1;     //  0: remote receiver is "Out-of-Sync", 1: remote receiver is "Synced"
+    unsigned int to_false_th    :16;    //  the number of consecutive "Miss Sync" for leaving "Freewheel Sync False" to "Looking" (default 3)
+    unsigned int to_looking_th  :16;    //  the number of consecutive "Miss Sync" for leaving "Freewheel Sync True" to "Freewheel Sync False" (default 7)
+    unsigned int res_word[30];
+  };
+
+  struct rx_gamma_itf_cfg {
+    unsigned int res1           :31;
+    unsigned int receive_state  :1;     //  0: "Out-of-Fragment", 1: "In-Fragment"
+    unsigned int res2           :16;
+    unsigned int rx_min_len     :8;     //  min length of packet, padding if packet length is smaller than this value
+    unsigned int rx_pad_en      :1;     //  0:  padding disabled, 1: padding enabled
+    unsigned int res3           :2;
+    unsigned int rx_eth_fcs_ver_dis :1; //  0: ETH FCS verification is enabled, 1: disabled
+    unsigned int rx_rm_eth_fcs      :1; //  0: ETH FCS field is not removed, 1: ETH FCS field is removed
+    unsigned int rx_tc_crc_ver_dis  :1; //  0: TC CRC verification enabled, 1: disabled
+    unsigned int rx_tc_crc_size     :2; //  0: 0-bit, 1: 16-bit, 2: 32-bit
+    unsigned int rx_eth_fcs_result;     //  if the ETH FCS result matches this magic number, then the packet is valid packet
+    unsigned int rx_tc_crc_result;      //  if the TC CRC result matches this magic number, then the packet is valid packet
+    unsigned int rx_crc_cfg     :16;    //  TC CRC config, please check the description of SAR context data structure in the hardware spec
+    unsigned int res4           :16;
+    unsigned int rx_eth_fcs_init_value; //  ETH FCS initialization value
+    unsigned int rx_tc_crc_init_value;  //  TC CRC initialization value
+    unsigned int res_word1;
+    unsigned int rx_max_len_sel :1;     //  0: normal, the max length is given by MAX_LEN_NORMAL, 1: fragment, the max length is given by MAX_LEN_FRAG
+    unsigned int res5           :2;
+    unsigned int rx_edit_num2   :4;     //  number of bytes to be inserted/removed
+    unsigned int rx_edit_pos2   :7;     //  first byte position to be edited
+    unsigned int rx_edit_type2  :1;     //  0: remove, 1: insert
+    unsigned int rx_edit_en2    :1;     //  0: disable insertion or removal of data, 1: enable
+    unsigned int res6           :3;
+    unsigned int rx_edit_num1   :4;     //  number of bytes to be inserted/removed
+    unsigned int rx_edit_pos1   :7;     //  first byte position to be edited
+    unsigned int rx_edit_type1  :1;     //  0: remove, 1: insert
+    unsigned int rx_edit_en1    :1;     //  0: disable insertion or removal of data, 1: enable
+    unsigned int res_word2[2];
+    unsigned int rx_inserted_bytes_1l;
+    unsigned int rx_inserted_bytes_1h;
+    unsigned int rx_inserted_bytes_2l;
+    unsigned int rx_inserted_bytes_2h;
+    int rx_len_adj;                     //  the packet length adjustment, it is sign integer
+    unsigned int res_word3[16];
+  };
+
+  struct tx_bc_cfg {
+    unsigned int fill_wm        :16;    //  default 2
+    unsigned int uflw_wm        :16;    //  default 2
+    unsigned int res_word[31];
+  };
+
+  struct tx_gamma_itf_cfg {
+    unsigned int res_word1;
+    unsigned int res1           :8;
+    unsigned int tx_len_adj     :4;     //  4 * (not TX_ETH_FCS_GEN_DIS) + TX_TC_CRC_SIZE
+    unsigned int tx_crc_off_adj :4;     //  4 + TX_TC_CRC_SIZE
+    unsigned int tx_min_len     :8;     //  min length of packet, if length is less than this value, packet is padded
+    unsigned int res2           :3;
+    unsigned int tx_eth_fcs_gen_dis :1; //  0: ETH FCS generation enabled, 1: disabled
+    unsigned int res3           :2;
+    unsigned int tx_tc_crc_size :2;     //  0: 0-bit, 1: 16-bit, 2: 32-bit
+    unsigned int res4           :24;
+    unsigned int queue_mapping  :8;     //  TX queue attached to this Gamma interface
+    unsigned int res_word2;
+    unsigned int tx_crc_cfg     :16;    //  TC CRC config, please check the description of SAR context data structure in the hardware spec
+    unsigned int res5           :16;
+    unsigned int tx_eth_fcs_init_value; //  ETH FCS initialization value
+    unsigned int tx_tc_crc_init_value;  //  TC CRC initialization value
+    unsigned int res_word3[25];
+  };
+
+  struct wtx_qos_q_desc_cfg {
+    unsigned int threshold      :8;
+    unsigned int length         :8;
+    unsigned int addr           :16;
+    unsigned int rd_ptr         :16;
+    unsigned int wr_ptr         :16;
+  };
+
+  struct wtx_eg_q_shaping_cfg {
+    unsigned int t              :8;
+    unsigned int w              :24;
+    unsigned int s              :16;
+    unsigned int r              :16;
+    unsigned int res1           :8;
+    unsigned int d              :24;    //  ppe internal variable
+    unsigned int res2           :8;
+    unsigned int tick_cnt       :8;     //  ppe internal variable
+    unsigned int b              :16;    //  ppe internal variable
+  };
+
+  /* DMA descriptor */
+  struct rx_descriptor {
+    /*  0 - 3h  */
+    unsigned int own            :1;     //  0: Central DMA TX or MIPS, 1: PPE
+    unsigned int c              :1;     //  PPE tells current descriptor is complete
+    unsigned int sop            :1;
+    unsigned int eop            :1;
+    unsigned int res1           :3;
+    unsigned int byteoff        :2;
+    unsigned int res2           :7;
+    unsigned int datalen        :16;
+    /*  4 - 7h  */
+    unsigned int res3           :4;
+    unsigned int dataptr        :28;    //  byte address
+  };
+
+  struct tx_descriptor {
+    /*  0 - 3h  */
+    unsigned int own            :1;     //  CPU path - 0: MIPS, 1: PPE Dispatcher, Fastpath - 0: PPE Dispatcher, 1: Central DMA, QoS Queue - 0: PPE Dispatcher, 1: PPE DMA, SWAP Channel - 0: MIPS, 1: PPE Dispatcher
+    unsigned int c              :1;     //  MIPS or central DMA tells PPE the current descriptor is complete
+    unsigned int sop            :1;
+    unsigned int eop            :1;
+    unsigned int byteoff        :5;
+    unsigned int qid            :4;     //  TX Queue ID, bit 3 is reserved
+    unsigned int res1           :3;
+    unsigned int datalen        :16;
+    /*  4 - 7h  */
+    unsigned int small          :1;     //  0: standard size, 1: less than standard size
+    unsigned int res2           :3;
+    unsigned int dataptr        :28;    //  byte address
+  };
+
+#else /* defined(__BIG_ENDIAN) */
+  #error structures are defined in big endian
+#endif  /* defined(__BIG_ENDIAN) */
+
+
+
+#endif  //  IFXMIPS_PTM_FW_REGS_VDSL_H
+
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_vr9.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_vr9.h
new file mode 100644
index 0000000..a640cfb
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_vr9.h
@@ -0,0 +1,90 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_fw_regs_vr9.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (firmware register for VR9)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_FW_REGS_VR9_H
+#define IFXMIPS_PTM_FW_REGS_VR9_H
+
+
+
+/*
+ *  Host-PPE Communication Data Address Mapping
+ */
+#define FW_VER_ID                               ((volatile struct fw_ver_id *)              SB_BUFFER(0x2001))
+#define CFG_STD_DATA_LEN                        ((volatile struct cfg_std_data_len *)       SB_BUFFER(0x2011))
+#define TX_QOS_CFG                              ((volatile struct tx_qos_cfg *)             SB_BUFFER(0x2012))
+#define EG_BWCTRL_CFG                           ((volatile struct eg_bwctrl_cfg *)          SB_BUFFER(0x2013))
+#define PSAVE_CFG                               ((volatile struct psave_cfg *)              SB_BUFFER(0x2014))
+#define GPIO_ADDR                               SB_BUFFER(0x2019)
+#define GPIO_MODE                               ((volatile struct gpio_mode *)              SB_BUFFER(0x201C))
+#define GPIO_WM_CFG                             ((volatile struct gpio_wm_cfg *)            SB_BUFFER(0x201D))
+#define TEST_MODE                               ((volatile struct test_mode *)              SB_BUFFER(0x201F))
+#define WTX_QOS_Q_DESC_CFG(i)                   ((volatile struct wtx_qos_q_desc_cfg *)     SB_BUFFER(0x2FF0 + (i) * 2))    /*  i < 8   */
+#define WTX_EG_Q_PORT_SHAPING_CFG(i)            ((volatile struct wtx_eg_q_shaping_cfg *)   SB_BUFFER(0x2680 + (i) * 4))    /*  i < 1   */
+#define WTX_EG_Q_SHAPING_CFG(i)                 ((volatile struct wtx_eg_q_shaping_cfg *)   SB_BUFFER(0x2684 + (i) * 4))    /*  i < 8   */
+#define TX_QUEUE_CFG(i)                         WTX_EG_Q_PORT_SHAPING_CFG(i)    //  i < 9
+#define RX_BC_CFG(i)                            ((volatile struct rx_bc_cfg *)              SB_BUFFER(0x3E80 + (i) * 0x20)) //  i < 2
+#define TX_BC_CFG(i)                            ((volatile struct tx_bc_cfg *)              SB_BUFFER(0x3EC0 + (i) * 0x20)) //  i < 2
+#define RX_GAMMA_ITF_CFG(i)                     ((volatile struct rx_gamma_itf_cfg *)       SB_BUFFER(0x3D80 + (i) * 0x20)) //  i < 4
+#define TX_GAMMA_ITF_CFG(i)                     ((volatile struct tx_gamma_itf_cfg *)       SB_BUFFER(0x3E00 + (i) * 0x20)) //  i < 4
+#define WAN_RX_MIB_TABLE(i)                     ((volatile struct wan_rx_mib_table *)       SB_BUFFER(0x5B00 + (i) * 8))    //  i < 4
+#define WAN_TX_MIB_TABLE(i)                     ((volatile struct wan_tx_mib_table *)       SB_BUFFER(0x5B20 + (i) * 8))    //  i < 8
+#define TX_CTRL_K_TABLE(i)                      SB_BUFFER(0x47F0 + (i)) //  i < 16
+//  following MIB for debugging purpose
+#define RECEIVE_NON_IDLE_CELL_CNT(i)            SB_BUFFER(5020 + (i))
+#define RECEIVE_IDLE_CELL_CNT(i)                SB_BUFFER(5022 + (i))
+#define TRANSMIT_CELL_CNT(i)                    SB_BUFFER(5024 + (i))
+#define FP_RECEIVE_PKT_CNT                      SB_BUFFER(5026)
+
+#define UTP_CFG                                 SB_BUFFER(0x2018)   //  bit 0~3 - 0x0F: in showtime, 0x00: not in showtime
+
+/*
+ *  Descriptor Base Address
+ */
+#define CPU_TO_WAN_TX_DESC_BASE                 ((volatile struct tx_descriptor *)SB_BUFFER(0x3D00))
+#define __ETH_WAN_TX_QUEUE_NUM                  g_wanqos_en
+#define __ETH_WAN_TX_QUEUE_LEN                  ((WAN_TX_DESC_NUM_TOTAL / __ETH_WAN_TX_QUEUE_NUM) < 256 ? (WAN_TX_DESC_NUM_TOTAL / __ETH_WAN_TX_QUEUE_NUM) : 255)
+#define __ETH_WAN_TX_DESC_BASE(i)               (0x5C00 + (i) * 2 * __ETH_WAN_TX_QUEUE_LEN)
+#define WAN_TX_DESC_BASE(i)                     ((volatile struct tx_descriptor *)SB_BUFFER(__ETH_WAN_TX_DESC_BASE(i))) //  i < __ETH_WAN_TX_QUEUE_NUM, __ETH_WAN_TX_QUEUE_LEN each queue
+#define WAN_SWAP_DESC_BASE                      ((volatile struct tx_descriptor *)SB_BUFFER(0x2E80))
+#define FASTPATH_TO_WAN_TX_DESC_BASE            ((volatile struct tx_descriptor *)SB_BUFFER(0x2580))
+#define DMA_RX_CH1_DESC_BASE                    FASTPATH_TO_WAN_TX_DESC_BASE
+#define WAN_RX_DESC_BASE                        ((volatile struct rx_descriptor *)SB_BUFFER(0x2600))
+#define DMA_TX_CH1_DESC_BASE                    WAN_RX_DESC_BASE
+
+/*
+ *  Descriptor Number
+ */
+#define CPU_TO_WAN_TX_DESC_NUM                  64
+#define WAN_TX_DESC_NUM                         __ETH_WAN_TX_QUEUE_LEN
+#define WAN_SWAP_DESC_NUM                       64
+#define WAN_TX_DESC_NUM_TOTAL                   512
+#define FASTPATH_TO_WAN_TX_DESC_NUM             64
+#define DMA_RX_CH1_DESC_NUM                     FASTPATH_TO_WAN_TX_DESC_NUM
+#define WAN_RX_DESC_NUM                         64
+#define DMA_TX_CH1_DESC_NUM                     WAN_RX_DESC_NUM
+
+
+
+#endif  //  IFXMIPS_PTM_FW_REGS_VR9_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_vr9.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_vr9.h
new file mode 100644
index 0000000..b895ee8
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_fw_vr9.h
@@ -0,0 +1,380 @@
+#ifndef IFXMIPS_PTM_FW_VR9_H
+#define IFXMIPS_PTM_FW_VR9_H
+
+
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_fw_vr9.h
+** PROJECT      : UEIP
+** MODULES     	: PTM (VDSL)
+**
+** DATE         : 22 OCT 2007
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM Driver (PP32 Firmware)
+** COPYRIGHT    : 	Copyright (c) 2006
+**			Infineon Technologies AG
+**			Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 22 OCT 2007  Xu Liang        Initiate Version, v00.01
+*******************************************************************************/
+
+
+#define PTM_FW_VER_MAJOR        0
+#define PTM_FW_VER_MINOR        30
+
+
+static unsigned int firmware_binary_code[] = {
+ 0x80000980, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0xc1c20002, 0xd9cc00f8, 0xc0006950, 0xcbc000f8, 0xc0004024, 0xc8c000f8, 0xc0006950, 0x5bfc0002,
+ 0xcfc000f8, 0xa4c252a2, 0x00000000, 0x00000000, 0x800007a0, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0xc0e1fffe, 0x58cdfffe, 0xc1e1fffa, 0x59ddfffe, 0x94000001, 0x00000000, 0x00000000, 0x00000000,
+ 0xc0e1fffe, 0x58cdfffe, 0xc1e1fffa, 0x59ddfffe, 0x900009a1, 0x00000000, 0x00000000, 0x00000000,
+ 0x90cc0941, 0x00000000, 0x00000000, 0x00000000, 0xc3e0e2a2, 0x5bfc003c, 0xc0004002, 0xcfc000f8,
+ 0xc3c00000, 0xc0004024, 0xcbc20078, 0x00000000, 0x00000000, 0xc1c00000, 0xd9c400f9, 0xdbc40078,
+ 0xc1c00006, 0xd9c400f9, 0xc3c0fc10, 0xc0006952, 0xcfc000f8, 0xc3c00000, 0xc3400000, 0xc3000040,
+ 0xc2c00080, 0x6ff8a000, 0x5bb87d00, 0x5838001c, 0xcf4000f8, 0x5838001e, 0xcec000f8, 0x58380020,
+ 0xcf4000f8, 0x58380022, 0xcf0000f8, 0x5bfc0002, 0x5ebc0004, 0x8400ffa0, 0x00000000, 0xc1e1fffe,
+ 0x59ddfffa, 0x141c0000, 0xc1c00000, 0xc000691c, 0xcdc000f8, 0xab64002a, 0xc3c00000, 0xab66001a,
+ 0xc3c00002, 0x80001130, 0xc1c00002, 0xc000691c, 0xcdc000f8, 0x6ff8a000, 0x5bb87d00, 0x58380004,
+ 0xcb4000f8, 0xc2800000, 0x58380000, 0xca820008, 0xc000e824, 0xc3000000, 0xcb3c0070, 0x6f5c8000,
+ 0x41f4e000, 0x431d8000, 0x5b304000, 0xc000e828, 0xc1c00000, 0xc9fc0070, 0x00000000, 0xc0004000,
+ 0x41f4e000, 0x401c0000, 0xcac000f8, 0x5de80004, 0x84000880, 0xa6c607ea, 0x00000000, 0x6fe42000,
+ 0xc6e4a000, 0x6e60a000, 0x5a207b00, 0xc1800000, 0x58200000, 0xc9800000, 0xc2800000, 0xc6e80010,
+ 0x5dd80000, 0x8400003a, 0x5de80008, 0xc6a82012, 0xc1c00004, 0x45e8e000, 0x88000030, 0x80000558,
+ 0x5de80004, 0xc6a8010a, 0x5de80008, 0x84000538, 0x58380000, 0xc1c00002, 0xcdc00000, 0x58200000,
+ 0xc1c00002, 0xcdc00000, 0x5de80002, 0xcdc00002, 0xc000ea14, 0xc1e20000, 0xcdfe3100, 0xc000fb60,
+ 0xc1c00002, 0xcdfc0000, 0xc0006940, 0xc9c000f8, 0x403c0000, 0x00000000, 0x59dc0002, 0xcdc000f8,
+ 0xc1c00004, 0x45e8e000, 0x880000fa, 0x58200020, 0xc9c000f8, 0xc0c00018, 0xc1000000, 0xa5c0002a,
+ 0xc1400080, 0x5de80000, 0xc6ccf930, 0xc54c1932, 0x5de80000, 0xc1c0000a, 0xc5cc1230, 0xc5cc3202,
+ 0x58200022, 0xc9c000f8, 0xc74c0b30, 0xc7cc0008, 0xc5cc0528, 0xc1800000, 0xc6982000, 0xc1c00000,
+ 0xc69c0000, 0x71d8e000, 0xc5cc0400, 0x98404c78, 0xc5d00000, 0x7d80e000, 0xc5d00100, 0x5dd80002,
+ 0x84000388, 0xc1c00000, 0xc6ddc030, 0x59dc0006, 0xc5ec0e30, 0xc0c00018, 0xc1000004, 0x59dc0002,
+ 0xc5cc1230, 0xc74c0b30, 0xc7cc0008, 0xc0000088, 0x441ce000, 0xc5cc1930, 0xa6cc02b0, 0xc1c80002,
+ 0x70dc6000, 0xc1400000, 0xc6d5c030, 0x5d540002, 0x6d5c4010, 0x431c0000, 0xc88000f8, 0xc1c00000,
+ 0xc55c0008, 0xc0000006, 0x441ce000, 0x6ddc6000, 0x689c4010, 0xc1c001fe, 0x749c4000, 0x59540002,
+ 0xc1c000fe, 0x749c4000, 0x5c880020, 0xc48c1930, 0x4148c000, 0x59980002, 0x5dd80088, 0x8800002a,
+ 0x58200000, 0xc1c00000, 0xcdc00000, 0x800000c8, 0xc1400000, 0x6d9c4010, 0x431c0000, 0xc94000f8,
+ 0xc1c00000, 0xc59c0008, 0xc0000006, 0x441ce000, 0x6ddc6000, 0x695ca010, 0xc1c001fe, 0x755ca000,
+ 0x00000000, 0x00000000, 0x5dd40000, 0x84000018, 0x59980002, 0x8000ff48, 0x59980002, 0xc0800002,
+ 0x5dd400a0, 0xc4902100, 0xc4ac2602, 0x4588c002, 0xdbc800f9, 0xda4800f8, 0xda1000f9, 0x90404391,
+ 0x58200020, 0xc9c000f8, 0x58200022, 0xc94000f8, 0x5ddc0002, 0xc1c00000, 0xc5cc1932, 0xc6ddc030,
+ 0x59dc0002, 0x98404c78, 0xc5cc1230, 0xc54c0528, 0xc4d08000, 0xa5020072, 0xc1c00002, 0xc5d00100,
+ 0xc5ac0e30, 0xa6ccfdc2, 0xc1c00000, 0xc5cc0400, 0xc1c00086, 0x45d8e000, 0xc5cc1930, 0x8000ff28,
+ 0x00000000, 0x00000000, 0x00000000, 0x80000070, 0xdbc800f9, 0xda4800f8, 0xda1000f9, 0x90404391,
+ 0x58200022, 0xc98000f8, 0x58200020, 0xc9c000f8, 0x00000000, 0x98404c78, 0x5ddc0002, 0xc58c0528,
+ 0xc5cc1932, 0x80000200, 0xc1400000, 0xc000403e, 0xc9400000, 0xc1800000, 0x58200000, 0xc9800000,
+ 0x5dd40002, 0x84000020, 0x5dd80002, 0x84000010, 0x80000110, 0x5de80006, 0x84000088, 0x58380000,
+ 0xc1c00002, 0xcdc00000, 0xc000ea14, 0xc1e20000, 0xcdfe3100, 0xc000fb60, 0xc1c20002, 0xcdfc2100,
+ 0xc0006944, 0xc9c000f8, 0x403c0000, 0x00000000, 0x59dc0002, 0xcdc000f8, 0x800000f0, 0x5de8000a,
+ 0x84000070, 0x58380000, 0xc1c00000, 0xcdc00000, 0xc000ea14, 0xc1e20002, 0xcdfe3100, 0xc000fb60,
+ 0xc1c20002, 0xcdfc2100, 0xc000facc, 0xc1c00002, 0xcdfc0000, 0x80000078, 0xa6ca0040, 0xc000facc,
+ 0xc1ca0002, 0xcdfca500, 0xc000fb64, 0xc1c60002, 0xcdfc6300, 0x80000038, 0xc000facc, 0xc1c80002,
+ 0xcdfc8400, 0xc000fb64, 0xc1c40002, 0xcdfc4200, 0xc0c00010, 0x98404c78, 0xc7cc0008, 0xc74c0b30,
+ 0xc1000004, 0x80000808, 0xc1c00002, 0x58380008, 0xcdc000f8, 0x58380000, 0xc1e00006, 0xcdc21008,
+ 0xc000facc, 0xc1c80002, 0xcdfc8400, 0xc000fb64, 0xc1c40002, 0xcdfc4200, 0xc0c00010, 0x98404c78,
+ 0xc7cc0008, 0xc74c0b30, 0xc1000004, 0x80000778, 0x5de80006, 0x84000170, 0xa6c60032, 0x00000000,
+ 0x58380000, 0xc1e00004, 0xcdc21008, 0x8000f760, 0x58380008, 0xca8000f8, 0xc2400000, 0x58380002,
+ 0xca420078, 0x00000000, 0x5aa80002, 0x58380008, 0xce8000f8, 0x46a4e000, 0x8800008a, 0x58380000,
+ 0xc1e00002, 0xcdc21008, 0x58380000, 0xc1c00000, 0xcdc00000, 0xc000facc, 0xc1c20002, 0xcdfc2100,
+ 0xc1e1e1a2, 0xc000ea1c, 0xcdfc00f8, 0xc000ea14, 0xc1e20002, 0xcdfe3100, 0x80000038, 0xc000facc,
+ 0xc1c80002, 0xcdfc8400, 0xc000fb64, 0xc1c40002, 0xcdfc4200, 0xc0c00010, 0x98404c78, 0xc7cc0008,
+ 0xc74c0b30, 0xc1000004, 0x80000600, 0x5de80002, 0x84000150, 0xa6c6004a, 0x00000000, 0x58380000,
+ 0xc1e00004, 0xcdc21008, 0xc1f8001e, 0xc000ea1c, 0xcdfc00f8, 0x8000f5d0, 0x58380008, 0xca8000f8,
+ 0xc2400000, 0x58380002, 0xca400078, 0xc000facc, 0xc1c20002, 0xcdfc2100, 0x5aa80002, 0x58380008,
+ 0xce8000f8, 0x46a4e000, 0x88000072, 0x58380000, 0xc1e00000, 0xcdc21008, 0xc1c00000, 0x58380006,
+ 0xcdc000f8, 0xc000e82c, 0xc1c00000, 0xcdfdce00, 0xc000e820, 0xc1c00000, 0xcdfc0000, 0x80000300,
+ 0xc0c00010, 0x98404c78, 0xc7cc0008, 0xc74c0b30, 0xc1000004, 0x800004a8, 0x5838001c, 0xca8000f8,
+ 0x5838001e, 0xca4000f8, 0x5aa80002, 0x5838001c, 0xce8000f8, 0x4668e000, 0x88000098, 0x58380022,
+ 0xca4000f8, 0x58380020, 0xca0000f8, 0xc000e82c, 0xc1c00000, 0xcdfdce00, 0xc000e810, 0xce7c0030,
+ 0xc2800000, 0x5838001c, 0xce8000f8, 0x5a200002, 0x58380020, 0xce0000f8, 0xc000e82c, 0xc1dc0002,
+ 0xcdfdce00, 0x58380006, 0xc8c000f8, 0x5830001c, 0xca8000f9, 0xca4000f9, 0xc2000000, 0xca000001,
+ 0x5dcc0006, 0x88000028, 0x58cc0002, 0x58380006, 0xccc000f8, 0x80000250, 0x5838000a, 0xc8c000f9,
+ 0xc90000f9, 0xc1400000, 0xc9400001, 0x74e86000, 0x75248000, 0x7560a000, 0x58380010, 0xca8000f9,
+ 0xca4000f9, 0xc2000000, 0xca000001, 0x98404de8, 0x74e86000, 0x75248000, 0x7560a000, 0x5dc800a0,
+ 0x840001ba, 0x58380016, 0xca8000f9, 0xca4000f9, 0xc2000000, 0xca000001, 0x98404de8, 0x74e86000,
+ 0x75248000, 0x7560a000, 0x5dc800a0, 0x84000162, 0x58380000, 0xc1e00004, 0xcdc21008, 0x5838001c,
+ 0xc1c00000, 0xcdc000f8, 0xc000e82c, 0xc1c00000, 0xcdfdce00, 0xc1f8001e, 0xc000ea1c, 0xcdfc00f8,
+ 0xc000e820, 0xc1c00002, 0xcdfc0000, 0xc1c00082, 0x45c8e000, 0xc000e810, 0xcdfc0030, 0xc2400000,
+ 0xc000e82c, 0xca7c0038, 0xc000e83c, 0xc2800000, 0xcabc0038, 0xc0c00010, 0x98404c78, 0xc7cc0008,
+ 0xc74c0b30, 0xc1000004, 0x5b740002, 0x4674e000, 0xc1c00000, 0xc5f400fe, 0x5ea80002, 0x8400ffb0,
+ 0xc000e83c, 0xc1c00000, 0xcdfc0038, 0xc000e82c, 0xc1dc0002, 0xcdfdce00, 0x80000178, 0x58380010,
+ 0xca8000f9, 0xca4000f9, 0xc2000000, 0xca000001, 0x58380016, 0xce8000f9, 0xce4000f9, 0xce000001,
+ 0x5838000a, 0xca8000f9, 0xca4000f9, 0xc2000000, 0xca000001, 0x58380010, 0xce8000f9, 0xce4000f9,
+ 0xce000001, 0x5830001c, 0xca8000f9, 0xca4000f9, 0xc2000000, 0xca000001, 0x5838000a, 0xce8000f9,
+ 0xce4000f9, 0xce000001, 0xc000facc, 0xc1c20002, 0xcdfc2100, 0xc0c00010, 0x98404c78, 0xc7cc0008,
+ 0xc74c0b30, 0xc1000004, 0xc000e83c, 0xc1d00002, 0xcdfd0800, 0xc0c00000, 0xc000e82c, 0xc8fc0038,
+ 0x5b740002, 0x00000000, 0x44f4e000, 0xc1c00000, 0xc5f400fe, 0x58380004, 0xcf4000f8, 0x98404ec0,
+ 0x00000000, 0x00000000, 0x00000000, 0xc0006914, 0xcbc000f8, 0xc2800000, 0xc2400000, 0x5bfc4b00,
+ 0xc7c000f8, 0xcb0000f8, 0x58000002, 0xcac000f8, 0xc0004026, 0xca800078, 0xc0004026, 0xca420078,
+ 0xc3400000, 0xc7366018, 0xa73e0172, 0x00000000, 0xc777e300, 0xc000694c, 0xc9c000f8, 0x00000000,
+ 0x00000000, 0x59dc0002, 0xcdc000f8, 0x6f5c6000, 0x58dcb640, 0x580c0000, 0xc90000f8, 0x580c0002,
+ 0xc94000f8, 0x59100002, 0x580c0000, 0xcd0000f8, 0xc1c00000, 0xc71c0078, 0x415ca000, 0x580c0002,
+ 0xcd4000f8, 0x98402008, 0x5834fc10, 0xc8c000f8, 0xc1000000, 0x5dc80000, 0x84000070, 0x6f402000,
+ 0x58005fe0, 0xc3800000, 0x58000000, 0xcb800078, 0xc1c00000, 0x58000002, 0xc9c00078, 0x984022c0,
+ 0x00000000, 0x439dc000, 0x00000000, 0x80000028, 0x98402098, 0xc48c00f8, 0x00000000, 0x00000000,
+ 0xc0006916, 0xcbc000f8, 0xc3400000, 0x00000000, 0x5bfc7a00, 0xc7c000f8, 0xcb0000f8, 0x58000002,
+ 0xcac000f8, 0xc7366018, 0xa73e0900, 0x00000000, 0xc777e300, 0xc000694e, 0xc9c000f8, 0x00000000,
+ 0x00000000, 0x59dc0002, 0xcdc000f8, 0x6f5c6000, 0x58dcb640, 0x580c0000, 0xc90000f8, 0x580c0002,
+ 0xc94000f8, 0x59100002, 0x580c0000, 0xcd0000f8, 0xc1c00000, 0xc71c0078, 0x415ca000, 0x580c0002,
+ 0xcd4000f8, 0x98402008, 0x5834fc10, 0xc8c000f8, 0xc1000000, 0x5dc80000, 0x84000070, 0x6f402000,
+ 0x58005fe0, 0xc3800000, 0x58000000, 0xcb800078, 0xc1c00000, 0x58000002, 0xc9c00078, 0x984025d0,
+ 0x00000000, 0x439dc000, 0x00000000, 0x800007b8, 0x984021c0, 0xc48c00f8, 0x00000000, 0x00000000,
+ 0x80000790, 0xc7100078, 0xc0800000, 0x6f402000, 0x58005fe0, 0xc1400000, 0x58000000, 0xc9420038,
+ 0x4690e000, 0x88000030, 0x454ca000, 0x9c400000, 0x4564e000, 0xc1c00004, 0xc5c800fe, 0x9c400000,
+ 0x454ce000, 0xc1c00002, 0xc5c800fe, 0xc0006914, 0xc90000f8, 0xc1400000, 0xc0004022, 0xc9400078,
+ 0x583c0000, 0xc1fc0000, 0xcdc3de00, 0x583c0000, 0xcd400078, 0x583c0000, 0xc1fe0002, 0xcdc3ff00,
+ 0x59100004, 0xc1c00100, 0x45d0e000, 0xc1c00000, 0xc5d000fe, 0xc0006914, 0xcd0000f8, 0x6f546000,
+ 0x5954b640, 0x5dcc0002, 0x84000038, 0x5814000c, 0xc9c000f8, 0x00000000, 0x00000000, 0x59dc0002,
+ 0xcdc000f8, 0x5814000e, 0xc9c000f8, 0x00000000, 0x9c400000, 0x59dc0002, 0xcdc000f8, 0x00000000,
+ 0xc0006916, 0xc90000f8, 0x583c0000, 0xc1fc0000, 0xcdc3de00, 0x583c0000, 0xc1fe0000, 0xcdc3ff00,
+ 0x59100004, 0xc1c00100, 0x45d0e000, 0xc1c00000, 0xc5d000fe, 0xc0006916, 0xcd0000f8, 0x6f546000,
+ 0x5954b640, 0x5dcc0002, 0x84000038, 0x58140008, 0xc9c000f8, 0x00000000, 0x00000000, 0x59dc0002,
+ 0xcdc000f8, 0x5814000a, 0xc9c000f8, 0x00000000, 0x9c400000, 0x59dc0002, 0xcdc000f8, 0x00000000,
+ 0x58380002, 0xc90000f8, 0x5c000002, 0xc8c000f8, 0xa53e0178, 0xc0006918, 0xca0000f8, 0x00000000,
+ 0x00000000, 0x5a205d00, 0xc60000f8, 0xc94000f8, 0x58000002, 0xc98000f8, 0xa57e006a, 0xc1c00000,
+ 0xc0c00004, 0xc71c0078, 0xc46000f8, 0x98402098, 0x45e8e000, 0xc1c00002, 0xc5cc00fe, 0x9e000000,
+ 0xc1e00002, 0xc000e408, 0xcdc21000, 0xc55c00f8, 0xc4d400f8, 0xc5cc00f8, 0xc59c00f8, 0xc51800f8,
+ 0xc5d000f8, 0xc1c00000, 0xc5d41f00, 0xc5d3ff00, 0x58200002, 0xcd8000f8, 0x5c000002, 0xcd4000f8,
+ 0x5e205d00, 0x5a200004, 0xc1c00100, 0x45e0e000, 0xc1c00000, 0xc5e000fe, 0xc0006918, 0xce0000f8,
+ 0xc1e00002, 0xc000e408, 0xcdc21000, 0xc6dc00f8, 0xc52c00f8, 0xc5d000f8, 0xc71c00f8, 0xc4f000f8,
+ 0xc5cc00f8, 0xc0004022, 0xcb000078, 0xc1c00002, 0xc5cc1f00, 0xc5f01f00, 0xc5f3fe00, 0x58380002,
+ 0xcd0000f8, 0x5c000002, 0xccc000f8, 0x6f402000, 0x58005fe0, 0xc1c00000, 0xc9c20138, 0xc2000000,
+ 0x58000002, 0xca000078, 0x00000000, 0x00000000, 0x5a200004, 0x45e0e000, 0xc1c00000, 0xc5e000fe,
+ 0xce000078, 0x5e3c4b00, 0x5a200004, 0xc1c00100, 0x45e0e000, 0xc1c00000, 0xc5e000fe, 0xc0006914,
+ 0xce0000f8, 0xc1c00002, 0x69f4e000, 0xc5dc0838, 0xd9f000f8, 0x583c0002, 0xcec000f8, 0x5c000002,
+ 0xcf0000f8, 0x9c400000, 0x58380002, 0xc90000f8, 0x5c000002, 0xc8c000f8, 0xc6dc00f8, 0xc52c00f8,
+ 0xc5d000f8, 0xc71c00f8, 0xc4f000f8, 0xc5cc00f8, 0xc1c00002, 0xc5cc1f00, 0xc1c00000, 0xc5f01f00,
+ 0xc5f3fe00, 0x58380002, 0xcd0000f8, 0x5c000002, 0xccc000f8, 0x6f402000, 0x58005fe0, 0xc1c00000,
+ 0xc9c20138, 0xc2000000, 0x58000002, 0xca000078, 0x00000000, 0x00000000, 0x5a200004, 0x45e0e000,
+ 0xc1c00000, 0xc5e000fe, 0xce000078, 0x5e3c7a00, 0x5a200004, 0xc1c00100, 0x45e0e000, 0xc1c00000,
+ 0xc5e000fe, 0xc0006916, 0xce0000f8, 0xc1c00002, 0x69f4e000, 0xc5dc0838, 0xd9f000f8, 0x583c0002,
+ 0xcec000f8, 0x5c000002, 0xcf0000f8, 0xc1e20002, 0xc000e408, 0xcdc23100, 0x9c400000, 0x00000000,
+ 0x00000000, 0x00000000, 0xc3c00000, 0x6ff8a000, 0x5bb87d80, 0x583cfb50, 0xc2800000, 0xca80c030,
+ 0xc2400000, 0x58380000, 0xca400078, 0x58380006, 0xca0000f8, 0x583cea28, 0xc9c000f8, 0xc0c00000,
+ 0x00000000, 0xc5cc0038, 0x420c8000, 0x4268a000, 0x4514e000, 0x880000aa, 0x58380004, 0xca4000f8,
+ 0xc000ea28, 0x6e1d2000, 0xcdfd2928, 0xc000ea28, 0xc1d00002, 0xcdfd0800, 0xc0006948, 0xc9c000f8,
+ 0x403c0000, 0x00000000, 0x41e0e000, 0xcdc000f8, 0x46612000, 0x58380004, 0xce4000f8, 0x58380006,
+ 0xc1c00000, 0xcdc000f8, 0x58380004, 0xca4000f8, 0x583cea28, 0xc9c000f8, 0xc0c00000, 0x00000000,
+ 0xc5cc0038, 0xc1400000, 0x58380000, 0xc9420078, 0x424d0000, 0x00000000, 0x42948000, 0x4520e000,
+ 0x8800163a, 0xc000fa40, 0xc9bc00f8, 0x6ff42000, 0xc3000000, 0xc5b4e000, 0xc2c07c00, 0x6f5ca000,
+ 0x42dd6000, 0x582c0022, 0xc98000f8, 0x00000000, 0x00000000, 0x5dd80000, 0x840003c2, 0x582c0026,
+ 0xca8000f8, 0x5838000a, 0xc98000f8, 0xc000ea10, 0xc2400000, 0xca7c0070, 0x6d9c8000, 0x41d8e000,
+ 0x425d2000, 0x5a644000, 0x582c002e, 0xc98000f8, 0x582c0030, 0xc94000f8, 0x00000000, 0x00000000,
+ 0x4194e000, 0xd9f800f8, 0x5ddc0080, 0x880000a2, 0x00000000, 0xa7400018, 0xc180001e, 0xc180015e,
+ 0xc1400000, 0x6d5c4010, 0x425c0000, 0xc1c00006, 0x755c8000, 0x5dd00000, 0xcd80183a, 0x5dd00002,
+ 0xcd80103a, 0x5dd00004, 0xcd80083a, 0x5dd00006, 0xcd80003a, 0x5b300008, 0x80000278, 0x58240002,
+ 0xc1800000, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9,
+ 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9,
+ 0xcd8000f9, 0xa7400018, 0xc18001e0, 0xc18001ea, 0xc1400000, 0x6d5c4010, 0x425c0000, 0xc90000f8,
+ 0xc1c00000, 0xc55c0308, 0x691c8008, 0xc5901838, 0x691c8018, 0xcd0000f8, 0x6d5c4010, 0x425c0000,
+ 0xc1c00006, 0x755c8000, 0x5dd00000, 0xcd80183a, 0x5dd00002, 0xcd80103a, 0x5dd00004, 0xcd80083a,
+ 0x5dd00006, 0xcd80003a, 0x5b300008, 0xdf9400f8, 0xc1008fe0, 0x6d5c4010, 0x411c0000, 0xc98000f8,
+ 0xc1c00000, 0xc55c0308, 0x699cc000, 0x6d9b0010, 0x6f1c4010, 0x425c0000, 0xc94000f8, 0xc1c00000,
+ 0xc71c0308, 0x695ca008, 0xc5941838, 0x695ca018, 0xcd4000f8, 0x6f1c4010, 0x425c0000, 0xc1c00006,
+ 0x771ca000, 0x5dd40000, 0xcd80183a, 0x5dd40002, 0xcd80103a, 0x5dd40004, 0xcd80083a, 0x5dd40006,
+ 0xcd80003a, 0x5b300002, 0x582c0022, 0xc1c00000, 0xcdc000f8, 0x80000e18, 0xdb8800f9, 0xdb4800f8,
+ 0xc2400000, 0xdf240038, 0xc0004024, 0xcb8000f8, 0x00000000, 0xc3400000, 0xc7b50038, 0xc2800000,
+ 0xc7a88018, 0xc000fa40, 0xc8fc00f8, 0xc2800000, 0x582c0004, 0xca800038, 0xa4ce0042, 0x58ec0040,
+ 0xc1c00000, 0x580c0004, 0xc9c00038, 0x00000000, 0x00000000, 0x729d4000, 0x7e412000, 0x76692000,
+ 0xc0400000, 0xc7840008, 0xc000a0ae, 0x5de40000, 0x84000070, 0xc0c00000, 0xc8c000f8, 0x5dc40000,
+ 0xdcb800fb, 0xdcb400fa, 0x84000ffa, 0x5dcc0000, 0xdcb800fb, 0xdcb400fa, 0x84000fda, 0xc0c00000,
+ 0xccc000f8, 0x800001b8, 0xc0c00002, 0xccc000f8, 0xc65000f8, 0x61010028, 0x5dc40000, 0x84000018,
+ 0x62410008, 0x800002e8, 0x6e144000, 0x59544d08, 0xc0400000, 0x58140004, 0xc84000b8, 0xa78200d0,
+ 0xc0800000, 0xc1c00000, 0x6e1c2000, 0x59dc5fe0, 0x581c0002, 0xc8820078, 0x581c0000, 0xc9c00078,
+ 0xc1800000, 0x58140006, 0xc9800078, 0x409ce000, 0xc0800000, 0x581c0000, 0xc8800078, 0x00000000,
+ 0x00000000, 0x40b44000, 0x4588e000, 0x88000030, 0xc1c00002, 0x69e0e000, 0x7dc0e000, 0x765d2000,
+ 0x80000038, 0xa7800030, 0x5dc40000, 0x84000022, 0xc1ee0002, 0x75c4e000, 0xc4cc2002, 0x61010028,
+ 0xa60afed0, 0x00000000, 0x5de40000, 0xdcb800fb, 0xdcb400fa, 0x84000e22, 0x5dcc0000, 0x840000ba,
+ 0xa78000b0, 0x62810028, 0x840000a2, 0x6e0c4000, 0x58cc4d08, 0xc1000000, 0x580c0004, 0xc90000b8,
+ 0x580c0000, 0xc98000b8, 0x7d00a000, 0xc1f00002, 0x5ddc0002, 0x755ca000, 0x59540002, 0xc1ee0002,
+ 0x75d0e000, 0xc5d400fa, 0x45948000, 0x580c0004, 0xcd0000b8, 0x8000ff60, 0x5de40000, 0xdcb800fb,
+ 0xdcb400fa, 0x84000d42, 0x62410008, 0xa7800098, 0x00000000, 0xc0c00000, 0xc65000f8, 0x6100a028,
+ 0x6d584000, 0x59984d08, 0xc0400000, 0x58180004, 0xc84000b8, 0x00000000, 0x00000000, 0xa46e002a,
+ 0x44c4e000, 0x88000018, 0xc56000f8, 0xc44c00f8, 0x6100a028, 0xa54aff98, 0x6e184000, 0x59984d08,
+ 0xc0400000, 0xc0800000, 0x6e1c2000, 0x59dc5fe0, 0x581c0002, 0xc8420078, 0x581c0000, 0xc8800078,
+ 0xc1400000, 0x58180006, 0xc9400078, 0x40484000, 0xc0c00000, 0x58080000, 0xc8c00078, 0x00000000,
+ 0xa7820038, 0x40f42000, 0x5dd5fffe, 0x84000022, 0x4544a000, 0x58180006, 0xcd400078, 0xa7800088,
+ 0xc0400000, 0x58180000, 0xc84000b8, 0xc1000000, 0x58180004, 0xc90000b8, 0x5dc40000, 0x8400004a,
+ 0xc1ee0002, 0x5ddc0002, 0x445ce000, 0x8400002a, 0x450c8000, 0x45348000, 0x58180004, 0xcd0000b8,
+ 0x6e106000, 0x5910b640, 0x58100006, 0xc98000f8, 0x58100004, 0xc94000f8, 0x418cc000, 0x58100006,
+ 0xcd8000f8, 0x59540002, 0x58100004, 0xcd4000f8, 0x6e242000, 0x5a645fe0, 0xc0c00000, 0x58240002,
+ 0xc8c20078, 0xc1000000, 0x58240000, 0xc9020038, 0x582c002a, 0xcc8000f8, 0x582c002c, 0xce0000f8,
+ 0x6d102000, 0x58cc0004, 0x450ce000, 0xc1c00000, 0xc5cc00fe, 0x58240002, 0x6cde0000, 0xcdc21078,
+ 0xc0e00002, 0x68e06000, 0xd8f000f8, 0xdcb800f9, 0xdcb400f8, 0xc0006910, 0xc8c000f9, 0xc90000f8,
+ 0xc1c00000, 0xc1400040, 0x60c04000, 0x7494e000, 0x8400007a, 0xc1400080, 0x61004000, 0x58880040,
+ 0x7494e000, 0x84000052, 0x00000000, 0xab6c0002, 0x00000000, 0x00000000, 0x984047e8, 0xc0006902,
+ 0xc8c000f8, 0xc3c00000, 0x8000ff58, 0xc0006910, 0xc1c00000, 0xc49ca000, 0x401c0000, 0xc8c000f8,
+ 0xc1000002, 0xc1400000, 0xc4940020, 0x6914e000, 0x70dc6000, 0xccc000f8, 0x582c0020, 0xcc8000f8,
+ 0xc1c00002, 0x582c0022, 0xcdc000f8, 0xc2409c00, 0x6c9c6000, 0x425d2000, 0xc2807600, 0x6c9c6000,
+ 0x429d4000, 0x582c002c, 0xc98000f8, 0x582c0026, 0xce8000f8, 0x582c0028, 0xce4000f8, 0x58240008,
+ 0xcd8000f8, 0x5838000a, 0xc98000f8, 0xc000ea10, 0xc2000000, 0xca3c0070, 0x6d9c8000, 0x41d8e000,
+ 0x421d0000, 0x5a204000, 0x582c002a, 0xc98000f8, 0xc1400000, 0xc1000000, 0x58180000, 0xc942e020,
+ 0x58180002, 0xc90000e0, 0x5828000e, 0xcd8000f8, 0x58280002, 0xc1c00000, 0xcdc00078, 0x41148000,
+ 0x58280004, 0xcd0000e0, 0x58a40000, 0x586c0008, 0xc44000f8, 0xc8c000f9, 0xc90000f9, 0xc94000f8,
+ 0xc48000f8, 0xccc000f9, 0xcd0000f9, 0xcd4000f9, 0x5df00000, 0x84000138, 0x58200000, 0xc1800000,
+ 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9,
+ 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9, 0xcd8000f9,
+ 0xcd8000f9, 0xc18001ea, 0xc1c00002, 0x75f4e000, 0xc1c001e0, 0xc5d800fa, 0xc1400000, 0x6d5c4010,
+ 0x421c0000, 0xc1c00006, 0x755c8000, 0x5dd00000, 0xcd80183a, 0x5dd00002, 0xcd80103a, 0x5dd00004,
+ 0xcd80083a, 0x5dd00006, 0xcd80003a, 0x5b300008, 0xc000fa40, 0xc93c00f8, 0xc1400000, 0x582c0002,
+ 0xc9428018, 0xc0400000, 0xc0800080, 0x44944000, 0xc45800f8, 0xc1c00200, 0x75d0e000, 0xc49c00f8,
+ 0xc5d800fa, 0x582c0030, 0xcd4000f8, 0xd97800f8, 0x5828000e, 0xc9c000f8, 0xc0c00000, 0x582c0002,
+ 0xc8c10038, 0xc1000000, 0x581c0000, 0xc9000078, 0x00000000, 0x00000000, 0xc50800f8, 0x4518e000,
+ 0xc59c00f8, 0xc5c800fc, 0xc4d400f8, 0x44c8e000, 0xc49c00f8, 0xc5d400fc, 0x582c002e, 0xcd4000f8,
+ 0xdf9000f8, 0x4150e000, 0xd9f800f8, 0x41f0e000, 0x5ddc0086, 0x88000082, 0xc18000a0, 0x6f1c4010,
+ 0x421c0000, 0xc1c00006, 0x771ca000, 0x5dd40000, 0xcd80183a, 0x5dd40002, 0xcd80103a, 0x5dd40004,
+ 0xcd80083a, 0x5dd40006, 0xcd80003a, 0x5b300002, 0x80000158, 0x00000000, 0x00000000, 0x00000000,
+ 0xdf9400f8, 0xc1008fe0, 0x6d5c4010, 0x411c0000, 0xc98000f8, 0xc1c00000, 0xc55c0308, 0x699cc000,
+ 0x6d9b0010, 0x6f1c4010, 0x421c0000, 0xc1c00006, 0x771c6000, 0x5dcc0000, 0xcd80183a, 0x5dcc0002,
+ 0xcd80103a, 0x5dcc0004, 0xcd80083a, 0x5dcc0006, 0xcd80003a, 0x5b300002, 0xc18000a0, 0x6f1c4010,
+ 0x421c0000, 0xc1c00006, 0x771ca000, 0x5dd40000, 0xcd80183a, 0x5dd40002, 0xcd80103a, 0x5dd40004,
+ 0xcd80083a, 0x5dd40006, 0xcd80003a, 0x5b300002, 0x582c0022, 0xc1c00000, 0xcdc000f8, 0x00000000,
+ 0x00000000, 0x5df00088, 0x880002f8, 0x582c0020, 0xc98000f8, 0xc2800000, 0xc2400000, 0xc5a80528,
+ 0x582c002e, 0xc98000f8, 0xc1000088, 0x45308000, 0xc51400f8, 0x4590e000, 0xc59c00f8, 0xc5d400fc,
+ 0xc5681930, 0x5838000a, 0xc90000f8, 0xc7281230, 0xc7e80008, 0xc5280b30, 0xd93800f8, 0xc1c00002,
+ 0xc5e80400, 0x4594e000, 0x8400001a, 0xc1c00000, 0xc5e80400, 0x5dd80000, 0x8400002a, 0xc1c00002,
+ 0xc5e80300, 0xc1c00002, 0xc5e80200, 0x582c0022, 0xc94000f8, 0xc7640e08, 0x00000000, 0x5d540002,
+ 0x8400001a, 0xc1c00002, 0xc5e40d00, 0xc0c00000, 0xc68f2030, 0x430c8000, 0xc5241838, 0xc0800088,
+ 0x44904000, 0xc1c00000, 0xc5c800fc, 0x582c0030, 0xc94000f8, 0xc0400000, 0x582c0002, 0xc8420018,
+ 0xc49000f8, 0x4548e000, 0xc55c00f8, 0xc5d000fc, 0xc5241418, 0x44546000, 0xc4e41018, 0x4550a000,
+ 0x582c0030, 0xcd4000f8, 0xc0c00000, 0xc68f2030, 0x458cc000, 0x582c002e, 0xcd8000f8, 0x43118000,
+ 0x430d8000, 0xdf9800f8, 0xc000ea10, 0xc1400000, 0xc97c0070, 0x6d9c8000, 0x41d8e000, 0x415ca000,
+ 0x59544000, 0x00000000, 0xc1000000, 0xc0000000, 0xc9140038, 0x00000000, 0x00000000, 0x59100002,
+ 0xcd140038, 0x98404d30, 0xc68c00f8, 0xc65000f8, 0x00000000, 0x5df00088, 0x8800ef02, 0x00000000,
+ 0x80000008, 0x5df00000, 0x840000ba, 0xc1c00002, 0xc000691c, 0xcdc000f8, 0x5838000a, 0xc94000f8,
+ 0xc1000000, 0xc000ea14, 0xc93c0038, 0x59540002, 0x00000000, 0x4514e000, 0xc1c00000, 0xc5d400fe,
+ 0x5838000a, 0xcd4000f8, 0x58380004, 0xc94000f8, 0x00000000, 0x00000000, 0x59540002, 0x58380004,
+ 0xcd4000f8, 0x5df00000, 0x84000058, 0xa7400020, 0x00000000, 0x6ff42000, 0x8000ea00, 0x5bfc0002,
+ 0x5dfc0002, 0x8400e812, 0x00000000, 0x00000000, 0x00000000, 0xab6c0052, 0x984047e8, 0xc0006902,
+ 0xc8c000f8, 0xc3c00000, 0xab6c002a, 0x984047e8, 0xc0006902, 0xc8c000f8, 0xc3c00000, 0xc0004032,
+ 0xcbc000f8, 0xc0004038, 0xcb8000f8, 0xc000691a, 0xcb0000f8, 0xc000403a, 0xcb4000f8, 0xc72c00f8,
+ 0xa7800058, 0xc2800000, 0x00000000, 0x984041b8, 0xc0c07c80, 0xc0007c00, 0x00000000, 0x98404220,
+ 0xc0006952, 0xc80000f8, 0xc1000000, 0xa7900058, 0xc2800002, 0x00000000, 0x984041b8, 0xc0c07c80,
+ 0xc0007c00, 0x00000000, 0x98404220, 0xc0006952, 0xc80000f8, 0xc1000000, 0x472ce000, 0x8400023a,
+ 0xc0c00000, 0xc78e0020, 0xc1c00002, 0x69cc8000, 0xc78f0020, 0x69cce000, 0x711c8000, 0xc000f41a,
+ 0xcfc000f8, 0xc1c00000, 0xc7dc4050, 0x581cc000, 0xcb0000f8, 0x00000000, 0x00000000, 0x76d16000,
+ 0x7d008000, 0x77118000, 0x732d8000, 0xcf0000f8, 0xc000691a, 0xcec000f8, 0x80000180, 0x5ea80000,
+ 0xc40c00fa, 0xc2400000, 0x580c0004, 0xca400038, 0x58cc0040, 0xc1c00000, 0x580c0004, 0xc9c00038,
+ 0x9c400000, 0x00000000, 0x00000000, 0x725d2000, 0x62406028, 0x84000032, 0xc9cc00f8, 0x00000000,
+ 0x00000000, 0x411c8000, 0x8000ffd0, 0xc1400000, 0xc7970020, 0x6f4e0010, 0x5de80000, 0xc74c00fa,
+ 0xc7960022, 0xc1c00000, 0xc4dd0038, 0x45d0e000, 0x88000048, 0xc1c00000, 0xc4dc0038, 0x451ce000,
+ 0x88000050, 0x9c400000, 0x00000000, 0x00000000, 0x00000000, 0xc1c00002, 0x9c400000, 0x69d4e000,
+ 0x7dc0e000, 0x76dd6000, 0x9c400000, 0xc1c00002, 0x69d4e000, 0x72dd6000, 0xc0004028, 0xcbc000f8,
+ 0xc000691c, 0xcb8000f8, 0xa7c0c780, 0x00000000, 0x5df80000, 0x8400c768, 0xc1c00002, 0xc000e070,
+ 0xcdc00000, 0x8000c748, 0xdcbc00f9, 0xdcb800f8, 0xdd3400f9, 0xc2400040, 0xc000690c, 0xc8c000f9,
+ 0xc90000f8, 0xc1c00000, 0x60c18000, 0x7724e000, 0x84000052, 0x61018000, 0x7724e000, 0x84000032,
+ 0x98404ec0, 0x00000000, 0x00000000, 0x00000000, 0x8000ff90, 0x5b300040, 0xc2c09400, 0x6f1c6000,
+ 0x42dd6000, 0xc2809800, 0x429d4000, 0x58340022, 0xcf0000f8, 0x582c0008, 0xcf8000f8, 0xc000690c,
+ 0xc1c00000, 0xc71ca000, 0x401c0000, 0xc8c000f8, 0xc2000002, 0x6a30e000, 0x70dc6000, 0xccc000f8,
+ 0x58340008, 0xc8c000f9, 0xc90000f9, 0xc94000f9, 0x582c0000, 0xccc000f9, 0xcd0000f9, 0xcd4000f9,
+ 0x58340010, 0xc9c000f9, 0xc8c000f9, 0xc90000f9, 0xc94000f9, 0xc98000f9, 0xc84000f9, 0xc88000f9,
+ 0x58280000, 0xcdc000f9, 0xccc000f9, 0xcd0000f9, 0xcd4000f9, 0xcd8000f9, 0xcc4000f9, 0xcc8000f9,
+ 0xc1c00000, 0x5828000e, 0xc9c3e000, 0x00000000, 0x00000000, 0x5ddc0002, 0x840001ba, 0xc0006908,
+ 0xc8c000f8, 0xc0004c00, 0xc1000000, 0x400c0000, 0x58000000, 0xc903e000, 0x00000000, 0x00000000,
+ 0x5dd00002, 0x840000e8, 0xc1000000, 0x58000002, 0xc90000e0, 0xc1c00000, 0xc0004022, 0xc9c20008,
+ 0x5828000e, 0xcd0000e0, 0x411ce000, 0x58280004, 0xcdc000e0, 0x5828000e, 0xc1fe0002, 0xcdc3ff00,
+ 0x5828000e, 0xc1fc0000, 0xcdc3de00, 0x58340020, 0xc1c00000, 0xcdc000f8, 0x58cc0004, 0xc1c00100,
+ 0x45cce000, 0xc1c00000, 0xc5cc00fe, 0xc0006908, 0xccc000f8, 0x800000f8, 0xc0c0b600, 0x6f9c6000,
+ 0x40dc6000, 0x580c0004, 0xc90000f8, 0x5828000e, 0xc1fc0002, 0xcdc3de00, 0x58340020, 0xc1c00002,
+ 0xcdc000f8, 0x59100002, 0x580c0004, 0xcd0000f8, 0x80000080, 0xc0c00000, 0xc0004022, 0xc8c20008,
+ 0xc1000000, 0x5828000e, 0xc90000e0, 0x5828000e, 0xc1fc0000, 0xcdc3de00, 0x58340020, 0xc1c00000,
+ 0xcdc000f8, 0x410ce000, 0x58280004, 0xcdc000e0, 0x94000000, 0xc1c00002, 0xc000691c, 0xcdc000f8,
+ 0xd87800f8, 0xc3800000, 0x580c7400, 0xca4000f9, 0xca0000f8, 0xc3400000, 0xc67c0008, 0xc639c008,
+ 0xc674a028, 0xc0c00000, 0xc64d6030, 0xc000ea10, 0xc3000000, 0xcb3c0070, 0x6cdc8000, 0x41cce000,
+ 0x431d8000, 0x5b304000, 0x6faca000, 0x5aec7c00, 0xc0c00000, 0xc0000000, 0xc8f00038, 0x6f686000,
+ 0x5aa89c00, 0x5ccc0002, 0xccf00038, 0xc1000000, 0xc6128018, 0x5dd00000, 0x840000f2, 0xc1800000,
+ 0xc0800000, 0xc61a0018, 0xc60b0038, 0xc1c40002, 0x419cc000, 0x6d9c4010, 0x429c0000, 0xc94000f8,
+ 0xc1c00000, 0xc59c0308, 0x695ca000, 0x6d570010, 0x59980002, 0x6c9c4010, 0x431c0000, 0xc1c00006,
+ 0x749c2000, 0x5dc40000, 0xcd40183a, 0x5dc40002, 0xcd40103a, 0x5dc40004, 0xcd40083a, 0x5dc40006,
+ 0xcd40003a, 0x58880002, 0x5d100002, 0x8400ff50, 0xa61a00a0, 0x582c002a, 0xc90000f8, 0xc0000000,
+ 0xc1c00000, 0xcdd3ff00, 0xc1000002, 0x58280008, 0xc94000f8, 0x5df40040, 0xc0006912, 0x44100004,
+ 0xc98000f8, 0x6934e000, 0x7dc0e000, 0x759cc000, 0xcd8000f8, 0xc1b00002, 0x6994c000, 0xd9b000f8,
+ 0x5ccc0000, 0x84000160, 0x6fcca000, 0x58cc7d80, 0x580c0006, 0xc90000f8, 0xc1400000, 0xc615a000,
+ 0x59100002, 0x580c0006, 0xcd0000f8, 0xc1c00000, 0x7d40a000, 0xc55c0000, 0x582c0024, 0xcdc000f8,
+ 0xa61a00e8, 0x7f80e000, 0xc5f80000, 0x6faca000, 0x5aec7c00, 0x582c0024, 0xc94000f8, 0x580c0004,
+ 0xc98000f8, 0x5dd40002, 0x8400009a, 0xc000ea28, 0x6d1d2000, 0xcdfd2928, 0xc000ea28, 0xc1d00002,
+ 0xcdfd0800, 0xc0006948, 0xc9c000f8, 0x403c0000, 0x00000000, 0x41d0e000, 0xcdc000f8, 0x4590c000,
+ 0x580c0004, 0xcd8000f8, 0x580c0006, 0xc1c00000, 0xcdc000f8, 0xc0006902, 0xc8c000f8, 0x00000000,
+ 0x00000000, 0x58cc0004, 0xc1c00200, 0x45cce000, 0xc1c00000, 0xc5cc00fe, 0xccc000f8, 0xc000f01e,
+ 0xc1d00002, 0xcdc10800, 0xdf8400f8, 0x9c400000, 0x00000000, 0x00000000, 0x00000000, 0xc0006904,
+ 0xc94000f8, 0xab68008a, 0x00000000, 0x58147200, 0xccc000f9, 0xcd0000f9, 0xc000f016, 0xc1d00002,
+ 0xcdc10800, 0x59540004, 0xc1c00200, 0x45d4e000, 0xc1c00000, 0xc5d400fe, 0x9c400000, 0xc0006904,
+ 0xcd4000f8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ff60, 0xc0006906, 0xc94000f8,
+ 0xab6a008a, 0x00000000, 0x58147400, 0xccc000f9, 0xcd0000f9, 0xc000f404, 0xc1d00002, 0xcdc10800,
+ 0x59540004, 0xc1c00200, 0x45d4e000, 0xc1c00000, 0xc5d400fe, 0x9c400000, 0xc0006906, 0xcd4000f8,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ff60, 0xc08000a0, 0x74d0c000, 0x84000090,
+ 0x78d0c000, 0x8400006a, 0x61800018, 0x6180e008, 0x441cc000, 0x84000060, 0x5d940000, 0x84000050,
+ 0x60c04008, 0xa48a0040, 0x9c400000, 0x61004008, 0x58880040, 0x00000000, 0xa5400018, 0x00000000,
+ 0xc0800080, 0x9c400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0xc000f412, 0xc9c000f8, 0xc1800000, 0xc0800000, 0xa5c004e8, 0xc5d82028, 0x6d886000, 0x59089800,
+ 0x5810000e, 0xc9c3c000, 0x59489400, 0xd9b800f8, 0xa5c0044a, 0x58140008, 0xc98000f8, 0xc0c07b00,
+ 0xc0800000, 0x6d9ca000, 0x40dc6000, 0xd9b800f8, 0x580c0002, 0xc8808000, 0x00000000, 0x00000000,
+ 0xa480004a, 0x580c0004, 0xc98000f8, 0x58140002, 0xc88000f8, 0x00000000, 0x00000000, 0x4498e000,
+ 0x84000110, 0xc1c00000, 0x580c0002, 0xc9c04000, 0x00000000, 0x00000000, 0xa5c0004a, 0x580c0006,
+ 0xc98000f8, 0x58140004, 0xc88000f8, 0x00000000, 0x00000000, 0x4498e000, 0x840000a0, 0xc0800000,
+ 0x58100002, 0xc8800078, 0x580c001e, 0xc94000f8, 0xc1800000, 0x580c0002, 0xc9810038, 0x40944000,
+ 0xa4be0052, 0xc1400000, 0x4498e000, 0x88000118, 0x580c0002, 0xc940e000, 0x00000000, 0x00000000,
+ 0xa54000ca, 0xc1c00000, 0x00000000, 0x00000000, 0x00000000, 0xdf9400f8, 0x00000000, 0x00000000,
+ 0xc1800000, 0xc5582000, 0xa5400042, 0xc000fb64, 0xc1c00002, 0xcdd80000, 0xc000facc, 0xc1c40002,
+ 0xcdd84200, 0x80000220, 0xc000fb64, 0xc1c20002, 0xcdd82100, 0xc000facc, 0xc1c60002, 0xcdd86300,
+ 0x800001e8, 0x580c0002, 0xc9c10038, 0x00000000, 0x00000000, 0x589c0000, 0xc000690a, 0xc94000f8,
+ 0xc1c00000, 0x5810000e, 0xc9c000e0, 0x59944c00, 0x58180000, 0xcc800078, 0x58180002, 0xcdc000e0,
+ 0x58180000, 0xc1fa0002, 0xcdc3bd00, 0x58180000, 0xc1f80002, 0xcdc39c00, 0x58180000, 0xc1fe0000,
+ 0xcdc3ff00, 0x59540004, 0xc1c00100, 0x45d4e000, 0xc1c00000, 0xc5d400fe, 0xc000690a, 0xcd4000f8,
+ 0xc000e408, 0xc1c00002, 0xcdc000f8, 0x5810000e, 0xc1fe0000, 0xcdc3ff00, 0xdf9400f8, 0xc1800000,
+ 0x58100002, 0xc9800078, 0x6d486000, 0x5888b600, 0x58080006, 0xc9c000f8, 0x00000000, 0x00000000,
+ 0x419cc000, 0x58080006, 0xcd8000f8, 0xc1800000, 0xc5582000, 0xa540002a, 0xc000fb60, 0xc1c40002,
+ 0xcdd84200, 0x80000020, 0xc000fb60, 0xc1c60002, 0xcdd86300, 0xdf9400f8, 0xc1800002, 0x00000000,
+ 0x00000000, 0x5dd40040, 0xc000690e, 0x44180004, 0xc88000f8, 0x6994e000, 0x7dc0e000, 0x749c4000,
+ 0xcc8000f8, 0x9c400000, 0x00000000, 0x00000000, 0x00000000, 0xc3c00000, 0xc4fc8018, 0xc3800000,
+ 0x6fb44000, 0x5b744d08, 0xc3000000, 0x58340006, 0xcb020038, 0xc2c00000, 0xc2800000, 0x5f300002,
+ 0x84000080, 0x58340006, 0xcac00078, 0x58340002, 0xca800078, 0xc2000000, 0x58340002, 0xca020078,
+ 0x42e92000, 0x00000000, 0x4624e000, 0xc62400fc, 0x58340000, 0xcb030038, 0x58340006, 0xce400078,
+ 0x58340006, 0x6f1e0000, 0xcdc21038, 0x5bb80002, 0x47bce000, 0x8800ff1a, 0x8000b410, 0x00000000,
+ 0x00000000, 0x00000000,};
+
+static unsigned int firmware_binary_data[] = {
+};
+
+
+#endif  //  IFXMIPS_PTM_FW_VR9_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_amazon_se.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_amazon_se.h
new file mode 100644
index 0000000..f912039
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_amazon_se.h
@@ -0,0 +1,186 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_ppe_amazon_se.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (PPE register for Amazon-SE)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_PPE_AMAZON_SE_H
+#define IFXMIPS_PTM_PPE_AMAZON_SE_H
+
+
+
+/*
+ *  FPI Configuration Bus Register and Memory Address Mapping
+ */
+#define IFX_PPE                                 (KSEG1 | 0x1E180000)
+#define PP32_DEBUG_REG_ADDR(i, x)               ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0000) << 2)))
+#define PPM_INT_REG_ADDR(i, x)                  ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0030) << 2)))
+#define PP32_INTERNAL_RES_ADDR(i, x)            ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0040) << 2)))
+#define CDM_CODE_MEMORY(i, x)                   ((volatile unsigned int*)(IFX_PPE + (((x) + 0x1000) << 2)))
+#define PPE_REG_ADDR(x)                         ((volatile unsigned int*)(IFX_PPE + (((x) + 0x4000) << 2)))
+#define CDM_DATA_MEMORY(i, x)                   ((volatile unsigned int*)(IFX_PPE + (((x) + 0x5000) << 2)))
+#define PPM_INT_UNIT_ADDR(x)                    ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6000) << 2)))
+#define PPM_TIMER0_ADDR(x)                      ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6100) << 2)))
+#define PPM_TASK_IND_REG_ADDR(x)                ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6200) << 2)))
+#define PPS_BRK_ADDR(x)                         ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6300) << 2)))
+#define PPM_TIMER1_ADDR(x)                      ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6400) << 2)))
+#define SB_RAM0_ADDR(x)                         ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8200) << 2)))
+#define SB_RAM1_ADDR(x)                         ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8C00) << 2)))
+#define QSB_CONF_REG_ADDR(x)                    ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2)))
+
+/*
+ *  DWORD-Length of Memory Blocks
+ */
+#define PP32_DEBUG_REG_DWLEN                    0x0030
+#define PPM_INT_REG_DWLEN                       0x0010
+#define PP32_INTERNAL_RES_DWLEN                 0x00C0
+#define CDM_CODE_MEMORYn_DWLEN(n)               ((n) == 0 ? 0x1000 : 0x0800)
+#define PPE_REG_DWLEN                           0x1000
+#define CDM_DATA_MEMORY_DWLEN                   CDM_CODE_MEMORYn_DWLEN(1)
+#define PPM_INT_UNIT_DWLEN                      0x0100
+#define PPM_TIMER0_DWLEN                        0x0100
+#define PPM_TASK_IND_REG_DWLEN                  0x0100
+#define PPS_BRK_DWLEN                           0x0100
+#define PPM_TIMER1_DWLEN                        0x0100
+#define SB_RAM0_DWLEN                           0x0A00
+#define SB_RAM1_DWLEN                           0x0A00
+#define QSB_CONF_REG_DWLEN                      0x0100
+
+/*
+ *  PP32 to FPI Address Mapping
+ */
+#define SB_BUFFER(__sb_addr)                    ((volatile unsigned int *)((((__sb_addr) >= 0x0000) && ((__sb_addr) <= 0x0FFF)) ? PPE_REG_ADDR((__sb_addr) - 0x0000) :   \
+                                                                           (((__sb_addr) >= 0x2200) && ((__sb_addr) <= 0x2BFF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2200) :   \
+                                                                           (((__sb_addr) >= 0x2C00) && ((__sb_addr) <= 0x35FF)) ? SB_RAM1_ADDR((__sb_addr) - 0x2C00) :   \
+                                                                        0))
+
+/*
+ *  PP32 Debug Control Register
+ */
+#define NUM_OF_PP32                             1
+
+#define PP32_DBG_CTRL(n)                        PP32_DEBUG_REG_ADDR(n, 0x0000)
+
+#define DBG_CTRL_RESTART                        0
+#define DBG_CTRL_STOP                           1
+
+#define PP32_CTRL_CMD(n)                        PP32_DEBUG_REG_ADDR(n, 0x0B00)
+  #define PP32_CTRL_CMD_RESTART                 (1 << 0)
+  #define PP32_CTRL_CMD_STOP                    (1 << 1)
+  #define PP32_CTRL_CMD_STEP                    (1 << 2)
+  #define PP32_CTRL_CMD_BREAKOUT                (1 << 3)
+
+#define PP32_CTRL_OPT(n)                        PP32_DEBUG_REG_ADDR(n, 0x0C00)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_STOP_ON     (3 << 0)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_STOP_OFF    (2 << 0)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_ON  (3 << 2)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_OFF (2 << 2)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKIN_ON      (3 << 4)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKIN_OFF     (2 << 4)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_ON   (3 << 6)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_OFF  (2 << 6)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_STOP(n)     (*PP32_CTRL_OPT(n) & (1 << 0))
+  #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN(n)  (*PP32_CTRL_OPT(n) & (1 << 2))
+  #define PP32_CTRL_OPT_STOP_ON_BREAKIN(n)      (*PP32_CTRL_OPT(n) & (1 << 4))
+  #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT(n)   (*PP32_CTRL_OPT(n) & (1 << 6))
+
+#define PP32_BRK_PC(n, i)                       PP32_DEBUG_REG_ADDR(n, 0x0900 + (i) * 2)
+#define PP32_BRK_PC_MASK(n, i)                  PP32_DEBUG_REG_ADDR(n, 0x0901 + (i) * 2)
+#define PP32_BRK_DATA_ADDR(n, i)                PP32_DEBUG_REG_ADDR(n, 0x0904 + (i) * 2)
+#define PP32_BRK_DATA_ADDR_MASK(n, i)           PP32_DEBUG_REG_ADDR(n, 0x0905 + (i) * 2)
+#define PP32_BRK_DATA_VALUE_RD(n, i)            PP32_DEBUG_REG_ADDR(n, 0x0908 + (i) * 2)
+#define PP32_BRK_DATA_VALUE_RD_MASK(n, i)       PP32_DEBUG_REG_ADDR(n, 0x0909 + (i) * 2)
+#define PP32_BRK_DATA_VALUE_WR(n, i)            PP32_DEBUG_REG_ADDR(n, 0x090C + (i) * 2)
+#define PP32_BRK_DATA_VALUE_WR_MASK(n, i)       PP32_DEBUG_REG_ADDR(n, 0x090D + (i) * 2)
+  #define PP32_BRK_CONTEXT_MASK(i)              (1 << (i))
+  #define PP32_BRK_CONTEXT_MASK_EN              (1 << 4)
+  #define PP32_BRK_COMPARE_GREATER_EQUAL        (1 << 5)    //  valid for break data value rd/wr only
+  #define PP32_BRK_COMPARE_LOWER_EQUAL          (1 << 6)
+  #define PP32_BRK_COMPARE_EN                   (1 << 7)
+
+#define PP32_BRK_SRC(n)                         PP32_DEBUG_REG_ADDR(n, 0x0F00)
+#define PP32_BRK_TRIG(n)                        PP32_BRK_SRC(n)
+  #define PP32_BRK_GRPi_PCn_ON(i, n)            ((3 << ((n) * 2)) << ((i) * 16))
+  #define PP32_BRK_GRPi_PCn_OFF(i, n)           ((2 << ((n) * 2)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_ADDRn_ON(i, n)     ((3 << ((n) * 2 + 4)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_ADDRn_OFF(i, n)    ((2 << ((n) * 2 + 4)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_RDn_ON(i, n) ((3 << ((n) * 2 + 8)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_RDn_OFF(i, n)((2 << ((n) * 2 + 8)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_WRn_ON(i, n) ((3 << ((n) * 2 + 12)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_WRn_OFF(i, n)((2 << ((n) * 2 + 12)) << ((i) * 16))
+  #define PP32_BRK_GRPi_PCn(k, i, n)            (*PP32_BRK_TRIG(k) & ((1 << ((n))) << ((i) * 8)))
+  #define PP32_BRK_GRPi_DATA_ADDRn(k, i, n)     (*PP32_BRK_TRIG(k) & ((1 << ((n) + 2)) << ((i) * 8)))
+  #define PP32_BRK_GRPi_DATA_VALUE_RDn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 4)) << ((i) * 8)))
+  #define PP32_BRK_GRPi_DATA_VALUE_WRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 6)) << ((i) * 8)))
+
+#define PP32_CPU_STATUS(n)                      PP32_DEBUG_REG_ADDR(n, 0x0D00)
+#define PP32_HALT_STAT(n)                       PP32_CPU_STATUS(n)
+#define PP32_DBG_CUR_PC(n)                      PP32_DEBUG_REG_ADDR(n, 0x0F80)
+  #define PP32_CPU_USER_STOPPED(n)              (*PP32_CPU_STATUS(n) & (1 << 0))
+  #define PP32_CPU_USER_BREAKIN_RCV(n)          (*PP32_CPU_STATUS(n) & (1 << 1))
+  #define PP32_CPU_USER_BREAKPOINT_MET(n)       (*PP32_CPU_STATUS(n) & (1 << 2))
+  #define PP32_CPU_CUR_PC(n)                    (*PP32_DBG_CUR_PC(n) & 0xFFFF)
+
+#define PP32_BREAKPOINT_REASONS(n)              PP32_DEBUG_REG_ADDR(n, 0x0A00)
+  #define PP32_BRK_PC_MET(n, i)                 (*PP32_BREAKPOINT_REASONS(n) & (1 << (i)))
+  #define PP32_BRK_DATA_ADDR_MET(n, i)          (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 2)))
+  #define PP32_BRK_DATA_VALUE_RD_MET(n, i)      (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 4)))
+  #define PP32_BRK_DATA_VALUE_WR_MET(n, i)      (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 6)))
+  #define PP32_BRK_DATA_VALUE_RD_LO_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 8)))
+  #define PP32_BRK_DATA_VALUE_RD_GT_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 9)))
+  #define PP32_BRK_DATA_VALUE_WR_LO_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 12)))
+  #define PP32_BRK_DATA_VALUE_WR_GT_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 13)))
+//  #define PP32_BRK_CUR_CONTEXT(n)               ((*PP32_BREAKPOINT_REASONS(n) >> 16) & 0x03)
+#define PP32_DBG_TASK_NO(n)                     PP32_DEBUG_REG_ADDR(n, 0x0F81)
+  #define PP32_BRK_CUR_CONTEXT(n)               (*PP32_DBG_TASK_NO(n) & 0x03)
+
+#define PP32_GP_REG_BASE(n)                     PP32_DEBUG_REG_ADDR(n, 0x0E00)
+#define PP32_GP_CONTEXTi_REGn(n, i, j)          PP32_DEBUG_REG_ADDR(n, 0x0E00 + (i) * 16 + (j))
+
+/*
+ *  Share Buffer
+ */
+#define SB_MST_PRI0                             PPE_REG_ADDR(0x0300)
+#define SB_MST_PRI1                             PPE_REG_ADDR(0x0301)
+
+/*
+ *  EMA Registers
+ */
+#define EMA_CMDCFG                              PPE_REG_ADDR(0x0A00)
+#define EMA_DATACFG                             PPE_REG_ADDR(0x0A01)
+#define EMA_CMDCNT                              PPE_REG_ADDR(0x0A02)
+#define EMA_DATACNT                             PPE_REG_ADDR(0x0A03)
+#define EMA_ISR                                 PPE_REG_ADDR(0x0A04)
+#define EMA_IER                                 PPE_REG_ADDR(0x0A05)
+#define EMA_CFG                                 PPE_REG_ADDR(0x0A06)
+#define EMA_SUBID                               PPE_REG_ADDR(0x0A07)
+
+#define EMA_ALIGNMENT                           4
+
+/*
+ *  Mailbox IGU1 Interrupt
+ */
+#define PPE_MAILBOX_IGU1_INT                    INT_NUM_IM2_IRL13
+
+
+
+#endif  //  IFXMIPS_PTM_PPE_AMAZON_SE_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_ar9.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_ar9.h
new file mode 100644
index 0000000..9355747
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_ar9.h
@@ -0,0 +1,213 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_ppe_ar9.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (PPE register for AR9)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_PPE_AR9_H
+#define IFXMIPS_PTM_PPE_AR9_H
+
+
+
+/*
+ *  FPI Configuration Bus Register and Memory Address Mapping
+ */
+#define IFX_PPE                         (KSEG1 | 0x1E180000)
+#define PP32_DEBUG_REG_ADDR(i, x)       ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0000) << 2)))
+#define PPM_INT_REG_ADDR(i, x)          ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0030) << 2)))
+#define PP32_INTERNAL_RES_ADDR(i, x)    ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0040) << 2)))
+#define CDM_CODE_MEMORY(i, x)           ((volatile unsigned int*)(IFX_PPE + (((x) + 0x1000) << 2)))
+#define PPE_REG_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x4000) << 2)))
+#define CDM_DATA_MEMORY(i, x)           ((volatile unsigned int*)(IFX_PPE + (((x) + 0x5000) << 2)))
+#define PPM_INT_UNIT_ADDR(x)            ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6000) << 2)))
+#define PPM_TIMER0_ADDR(x)              ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6100) << 2)))
+#define PPM_TASK_IND_REG_ADDR(x)        ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6200) << 2)))
+#define PPS_BRK_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6300) << 2)))
+#define PPM_TIMER1_ADDR(x)              ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6400) << 2)))
+#define SB_RAM0_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8000) << 2)))
+#define SB_RAM1_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8800) << 2)))
+#define SB_RAM2_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x9000) << 2)))
+#define SB_RAM3_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x9800) << 2)))
+#define SB_RAM4_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0xA000) << 2)))
+#define QSB_CONF_REG_ADDR(x)            ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2)))
+
+/*
+ *  DWORD-Length of Memory Blocks
+ */
+#define PP32_DEBUG_REG_DWLEN            0x0030
+#define PPM_INT_REG_DWLEN               0x0010
+#define PP32_INTERNAL_RES_DWLEN         0x00C0
+#define CDM_CODE_MEMORYn_DWLEN(n)       0x1000
+#define PPE_REG_DWLEN                   0x1000
+#define CDM_DATA_MEMORY_DWLEN           CDM_CODE_MEMORYn_DWLEN(1)
+#define PPM_INT_UNIT_DWLEN              0x0100
+#define PPM_TIMER0_DWLEN                0x0100
+#define PPM_TASK_IND_REG_DWLEN          0x0100
+#define PPS_BRK_DWLEN                   0x0100
+#define PPM_TIMER1_DWLEN                0x0100
+#define SB_RAM0_DWLEN                   0x0800
+#define SB_RAM1_DWLEN                   0x0800
+#define SB_RAM2_DWLEN                   0x0800
+#define SB_RAM3_DWLEN                   0x0800
+#define SB_RAM4_DWLEN                   0x0C00
+#define QSB_CONF_REG_DWLEN              0x0100
+
+/*
+ *  PP32 to FPI Address Mapping
+ */
+#define SB_BUFFER(__sb_addr)            ((volatile unsigned int *)((((__sb_addr) >= 0x0000) && ((__sb_addr) <= 0x0FFF)) ? PP32_DEBUG_REG_ADDR(0, (__sb_addr)):   \
+                                                                   (((__sb_addr) >= 0x2000) && ((__sb_addr) <= 0x27FF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2000) :   \
+                                                                   (((__sb_addr) >= 0x2800) && ((__sb_addr) <= 0x2FFF)) ? SB_RAM1_ADDR((__sb_addr) - 0x2800) :   \
+                                                                   (((__sb_addr) >= 0x3000) && ((__sb_addr) <= 0x37FF)) ? SB_RAM2_ADDR((__sb_addr) - 0x3000) :   \
+                                                                   (((__sb_addr) >= 0x3800) && ((__sb_addr) <= 0x3FFF)) ? SB_RAM3_ADDR((__sb_addr) - 0x3800) :   \
+                                                                   (((__sb_addr) >= 0x4000) && ((__sb_addr) <= 0x4BFF)) ? SB_RAM4_ADDR((__sb_addr) - 0x4000) :   \
+                                                                0))
+
+/*
+ *  PP32 Debug Control Register
+ */
+#define NUM_OF_PP32                             1
+
+#define PP32_DBG_CTRL(n)                        PP32_DEBUG_REG_ADDR(n, 0x0000)
+
+#define DBG_CTRL_RESTART                        0
+#define DBG_CTRL_STOP                           1
+
+#define PP32_CTRL_CMD(n)                        PP32_DEBUG_REG_ADDR(n, 0x0B00)
+  #define PP32_CTRL_CMD_RESTART                 (1 << 0)
+  #define PP32_CTRL_CMD_STOP                    (1 << 1)
+  #define PP32_CTRL_CMD_STEP                    (1 << 2)
+  #define PP32_CTRL_CMD_BREAKOUT                (1 << 3)
+
+#define PP32_CTRL_OPT(n)                        PP32_DEBUG_REG_ADDR(n, 0x0C00)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_STOP_ON     (3 << 0)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_STOP_OFF    (2 << 0)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_ON  (3 << 2)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_OFF (2 << 2)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKIN_ON      (3 << 4)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKIN_OFF     (2 << 4)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_ON   (3 << 6)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_OFF  (2 << 6)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_STOP(n)     (*PP32_CTRL_OPT(n) & (1 << 0))
+  #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN(n)  (*PP32_CTRL_OPT(n) & (1 << 2))
+  #define PP32_CTRL_OPT_STOP_ON_BREAKIN(n)      (*PP32_CTRL_OPT(n) & (1 << 4))
+  #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT(n)   (*PP32_CTRL_OPT(n) & (1 << 6))
+
+#define PP32_BRK_PC(n, i)                       PP32_DEBUG_REG_ADDR(n, 0x0900 + (i) * 2)
+#define PP32_BRK_PC_MASK(n, i)                  PP32_DEBUG_REG_ADDR(n, 0x0901 + (i) * 2)
+#define PP32_BRK_DATA_ADDR(n, i)                PP32_DEBUG_REG_ADDR(n, 0x0904 + (i) * 2)
+#define PP32_BRK_DATA_ADDR_MASK(n, i)           PP32_DEBUG_REG_ADDR(n, 0x0905 + (i) * 2)
+#define PP32_BRK_DATA_VALUE_RD(n, i)            PP32_DEBUG_REG_ADDR(n, 0x0908 + (i) * 2)
+#define PP32_BRK_DATA_VALUE_RD_MASK(n, i)       PP32_DEBUG_REG_ADDR(n, 0x0909 + (i) * 2)
+#define PP32_BRK_DATA_VALUE_WR(n, i)            PP32_DEBUG_REG_ADDR(n, 0x090C + (i) * 2)
+#define PP32_BRK_DATA_VALUE_WR_MASK(n, i)       PP32_DEBUG_REG_ADDR(n, 0x090D + (i) * 2)
+  #define PP32_BRK_CONTEXT_MASK(i)              (1 << (i))
+  #define PP32_BRK_CONTEXT_MASK_EN              (1 << 4)
+  #define PP32_BRK_COMPARE_GREATER_EQUAL        (1 << 5)    //  valid for break data value rd/wr only
+  #define PP32_BRK_COMPARE_LOWER_EQUAL          (1 << 6)
+  #define PP32_BRK_COMPARE_EN                   (1 << 7)
+
+#define PP32_BRK_TRIG(n)                        PP32_DEBUG_REG_ADDR(n, 0x0F00)
+  #define PP32_BRK_GRPi_PCn_ON(i, n)            ((3 << ((n) * 2)) << ((i) * 16))
+  #define PP32_BRK_GRPi_PCn_OFF(i, n)           ((2 << ((n) * 2)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_ADDRn_ON(i, n)     ((3 << ((n) * 2 + 4)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_ADDRn_OFF(i, n)    ((2 << ((n) * 2 + 4)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_RDn_ON(i, n) ((3 << ((n) * 2 + 8)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_RDn_OFF(i, n)((2 << ((n) * 2 + 8)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_WRn_ON(i, n) ((3 << ((n) * 2 + 12)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_WRn_OFF(i, n)((2 << ((n) * 2 + 12)) << ((i) * 16))
+  #define PP32_BRK_GRPi_PCn(k, i, n)            (*PP32_BRK_TRIG(k) & ((1 << ((n))) << ((i) * 8)))
+  #define PP32_BRK_GRPi_DATA_ADDRn(k, i, n)     (*PP32_BRK_TRIG(k) & ((1 << ((n) + 2)) << ((i) * 8)))
+  #define PP32_BRK_GRPi_DATA_VALUE_RDn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 4)) << ((i) * 8)))
+  #define PP32_BRK_GRPi_DATA_VALUE_WRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 6)) << ((i) * 8)))
+
+#define PP32_CPU_STATUS(n)                      PP32_DEBUG_REG_ADDR(n, 0x0D00)
+#define PP32_HALT_STAT(n)                       PP32_CPU_STATUS(n)
+#define PP32_DBG_CUR_PC(n)                      PP32_CPU_STATUS(n)
+  #define PP32_CPU_USER_STOPPED(n)              (*PP32_CPU_STATUS(n) & (1 << 0))
+  #define PP32_CPU_USER_BREAKIN_RCV(n)          (*PP32_CPU_STATUS(n) & (1 << 1))
+  #define PP32_CPU_USER_BREAKPOINT_MET(n)       (*PP32_CPU_STATUS(n) & (1 << 2))
+  #define PP32_CPU_CUR_PC(n)                    (*PP32_CPU_STATUS(n) >> 16)
+
+#define PP32_BREAKPOINT_REASONS(n)              PP32_DEBUG_REG_ADDR(n, 0x0A00)
+  #define PP32_BRK_PC_MET(n, i)                 (*PP32_BREAKPOINT_REASONS(n) & (1 << (i)))
+  #define PP32_BRK_DATA_ADDR_MET(n, i)          (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 2)))
+  #define PP32_BRK_DATA_VALUE_RD_MET(n, i)      (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 4)))
+  #define PP32_BRK_DATA_VALUE_WR_MET(n, i)      (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 6)))
+  #define PP32_BRK_DATA_VALUE_RD_LO_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 8)))
+  #define PP32_BRK_DATA_VALUE_RD_GT_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 9)))
+  #define PP32_BRK_DATA_VALUE_WR_LO_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 12)))
+  #define PP32_BRK_DATA_VALUE_WR_GT_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 13)))
+  #define PP32_BRK_CUR_CONTEXT(n)               ((*PP32_BREAKPOINT_REASONS(n) >> 16) & 0x03)
+
+#define PP32_GP_REG_BASE(n)                     PP32_DEBUG_REG_ADDR(n, 0x0E00)
+#define PP32_GP_CONTEXTi_REGn(n, i, j)          PP32_DEBUG_REG_ADDR(n, 0x0E00 + (i) * 16 + (j))
+
+/*
+ *  Share Buffer Registers
+ */
+#define SB_MST_PRI0                     PPE_REG_ADDR(0x0300)
+#define SB_MST_PRI1                     PPE_REG_ADDR(0x0301)
+
+/*
+ *  EMA Registers
+ */
+#define EMA_CMDCFG                      PPE_REG_ADDR(0x0A00)
+#define EMA_DATACFG                     PPE_REG_ADDR(0x0A01)
+#define EMA_CMDCNT                      PPE_REG_ADDR(0x0A02)
+#define EMA_DATACNT                     PPE_REG_ADDR(0x0A03)
+#define EMA_ISR                         PPE_REG_ADDR(0x0A04)
+#define EMA_IER                         PPE_REG_ADDR(0x0A05)
+#define EMA_CFG                         PPE_REG_ADDR(0x0A06)
+#define EMA_SUBID                       PPE_REG_ADDR(0x0A07)
+
+#define EMA_ALIGNMENT                   4
+
+/*
+ *  DPlus Registers
+ */
+#define DM_RXDB                         PPE_REG_ADDR(0x0612)
+#define DM_RXCB                         PPE_REG_ADDR(0x0613)
+#define DM_RXCFG                        PPE_REG_ADDR(0x0614)
+#define DM_RXPGCNT                      PPE_REG_ADDR(0x0615)
+#define DM_RXPKTCNT                     PPE_REG_ADDR(0x0616)
+#define DS_RXDB                         PPE_REG_ADDR(0x0710)
+#define DS_RXCB                         PPE_REG_ADDR(0x0711)
+#define DS_RXCFG                        PPE_REG_ADDR(0x0712)
+#define DS_RXPGCNT                      PPE_REG_ADDR(0x0713)
+
+/*
+ *  3-Port Switch Registers (partial)
+ */
+#define IFX_SW                          (KSEG1 | 0x1E108000)
+#define SW_REG(off)                     ((volatile unsigned int*)(IFX_SW + (off)))
+#define SW_P2_CTL                       SW_REG(0x00C)
+
+
+/*
+ *  Mailbox IGU1 Interrupt
+ */
+#define PPE_MAILBOX_IGU1_INT            INT_NUM_IM2_IRL24
+
+
+
+#endif  //  IFXMIPS_PTM_PPE_AR9_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_common.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_common.h
new file mode 100644
index 0000000..63a5a37
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_common.h
@@ -0,0 +1,311 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_ppe_common.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (PPE register for all platform)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_PPE_COMMON_H
+#define IFXMIPS_PTM_PPE_COMMON_H
+
+
+
+#if defined(CONFIG_DANUBE)
+  #include "ifxmips_ptm_ppe_danube.h"
+#elif defined(CONFIG_AMAZON_SE)
+  #include "ifxmips_ptm_ppe_amazon_se.h"
+#elif defined(CONFIG_AR9)
+  #include "ifxmips_ptm_ppe_ar9.h"
+#elif defined(CONFIG_VR9)
+  #include "ifxmips_ptm_ppe_vr9.h"
+#else
+  #error Platform is not specified!
+#endif
+
+
+
+/*
+ *  Code/Data Memory (CDM) Interface Configuration Register
+ */
+#define CDM_CFG                         PPE_REG_ADDR(0x0100)
+
+#define CDM_CFG_RAM1                    GET_BITS(*CDM_CFG, 3, 2)
+#define CDM_CFG_RAM0                    (*CDM_CFG & (1 << 1))
+
+#define CDM_CFG_RAM1_SET(value)         SET_BITS(0, 3, 2, value)
+#define CDM_CFG_RAM0_SET(value)         ((value) ? (1 << 1) : 0)
+
+/*
+ *  QSB Internal Cell Delay Variation Register
+ */
+#define QSB_ICDV                        QSB_CONF_REG_ADDR(0x0007)
+
+#define QSB_ICDV_TAU                    GET_BITS(*QSB_ICDV, 5, 0)
+
+#define QSB_ICDV_TAU_SET(value)         SET_BITS(0, 5, 0, value)
+
+/*
+ *  QSB Scheduler Burst Limit Register
+ */
+#define QSB_SBL                         QSB_CONF_REG_ADDR(0x0009)
+
+#define QSB_SBL_SBL                     GET_BITS(*QSB_SBL, 3, 0)
+
+#define QSB_SBL_SBL_SET(value)          SET_BITS(0, 3, 0, value)
+
+/*
+ *  QSB Configuration Register
+ */
+#define QSB_CFG                         QSB_CONF_REG_ADDR(0x000A)
+
+#define QSB_CFG_TSTEPC                  GET_BITS(*QSB_CFG, 1, 0)
+
+#define QSB_CFG_TSTEPC_SET(value)       SET_BITS(0, 1, 0, value)
+
+/*
+ *  QSB RAM Transfer Table Register
+ */
+#define QSB_RTM                         QSB_CONF_REG_ADDR(0x000B)
+
+#define QSB_RTM_DM                      (*QSB_RTM)
+
+#define QSB_RTM_DM_SET(value)           ((value) & 0xFFFFFFFF)
+
+/*
+ *  QSB RAM Transfer Data Register
+ */
+#define QSB_RTD                         QSB_CONF_REG_ADDR(0x000C)
+
+#define QSB_RTD_TTV                     (*QSB_RTD)
+
+#define QSB_RTD_TTV_SET(value)          ((value) & 0xFFFFFFFF)
+
+/*
+ *  QSB RAM Access Register
+ */
+#define QSB_RAMAC                       QSB_CONF_REG_ADDR(0x000D)
+
+#define QSB_RAMAC_RW                    (*QSB_RAMAC & (1 << 31))
+#define QSB_RAMAC_TSEL                  GET_BITS(*QSB_RAMAC, 27, 24)
+#define QSB_RAMAC_LH                    (*QSB_RAMAC & (1 << 16))
+#define QSB_RAMAC_TESEL                 GET_BITS(*QSB_RAMAC, 9, 0)
+
+#define QSB_RAMAC_RW_SET(value)         ((value) ? (1 << 31) : 0)
+#define QSB_RAMAC_TSEL_SET(value)       SET_BITS(0, 27, 24, value)
+#define QSB_RAMAC_LH_SET(value)         ((value) ? (1 << 16) : 0)
+#define QSB_RAMAC_TESEL_SET(value)      SET_BITS(0, 9, 0, value)
+
+/*
+ *  QSB Queue Scheduling and Shaping Definitions
+ */
+#define QSB_WFQ_NONUBR_MAX              0x3f00
+#define QSB_WFQ_UBR_BYPASS              0x3fff
+#define QSB_TP_TS_MAX                   65472
+#define QSB_TAUS_MAX                    64512
+#define QSB_GCR_MIN                     18
+
+/*
+ *  QSB Constant
+ */
+#define QSB_RAMAC_RW_READ               0
+#define QSB_RAMAC_RW_WRITE              1
+
+#define QSB_RAMAC_TSEL_QPT              0x01
+#define QSB_RAMAC_TSEL_SCT              0x02
+#define QSB_RAMAC_TSEL_SPT              0x03
+#define QSB_RAMAC_TSEL_VBR              0x08
+
+#define QSB_RAMAC_LH_LOW                0
+#define QSB_RAMAC_LH_HIGH               1
+
+#define QSB_QPT_SET_MASK                0x0
+#define QSB_QVPT_SET_MASK               0x0
+#define QSB_SET_SCT_MASK                0x0
+#define QSB_SET_SPT_MASK                0x0
+#define QSB_SET_SPT_SBVALID_MASK        0x7FFFFFFF
+
+#define QSB_SPT_SBV_VALID               (1 << 31)
+#define QSB_SPT_PN_SET(value)           (((value) & 0x01) ? (1 << 16) : 0)
+#define QSB_SPT_INTRATE_SET(value)      SET_BITS(0, 13, 0, value)
+
+/*
+ *  QSB Queue Parameter Table Entry and Queue VBR Parameter Table Entry
+ */
+#if defined(__BIG_ENDIAN)
+    union qsb_queue_parameter_table {
+        struct {
+            unsigned int    res1    :1;
+            unsigned int    vbr     :1;
+            unsigned int    wfqf    :14;
+            unsigned int    tp      :16;
+        }               bit;
+        u32             dword;
+    };
+
+    union qsb_queue_vbr_parameter_table {
+        struct {
+            unsigned int    taus    :16;
+            unsigned int    ts      :16;
+        }               bit;
+        u32             dword;
+    };
+#else
+    union qsb_queue_parameter_table {
+        struct {
+            unsigned int    tp      :16;
+            unsigned int    wfqf    :14;
+            unsigned int    vbr     :1;
+            unsigned int    res1    :1;
+        }               bit;
+        u32             dword;
+    };
+
+    union qsb_queue_vbr_parameter_table {
+        struct {
+            unsigned int    ts      :16;
+            unsigned int    taus    :16;
+        }               bit;
+        u32             dword;
+    };
+#endif  //  defined(__BIG_ENDIAN)
+
+/*
+ *  Mailbox IGU0 Registers
+ */
+#define MBOX_IGU0_ISRS                  PPE_REG_ADDR(0x0200)
+#define MBOX_IGU0_ISRC                  PPE_REG_ADDR(0x0201)
+#define MBOX_IGU0_ISR                   PPE_REG_ADDR(0x0202)
+#define MBOX_IGU0_IER                   PPE_REG_ADDR(0x0203)
+
+#define MBOX_IGU0_ISRS_SET(n)           (1 << (n))
+#define MBOX_IGU0_ISRC_CLEAR(n)         (1 << (n))
+#define MBOX_IGU0_ISR_ISR(n)            (*MBOX_IGU0_ISR & (1 << (n)))
+#define MBOX_IGU0_IER_EN(n)             (*MBOX_IGU0_IER & (1 << (n)))
+#define MBOX_IGU0_IER_EN_SET(n)         (1 << (n))
+
+/*
+ *  Mailbox IGU1 Registers
+ */
+#define MBOX_IGU1_ISRS                  PPE_REG_ADDR(0x0204)
+#define MBOX_IGU1_ISRC                  PPE_REG_ADDR(0x0205)
+#define MBOX_IGU1_ISR                   PPE_REG_ADDR(0x0206)
+#define MBOX_IGU1_IER                   PPE_REG_ADDR(0x0207)
+
+#define MBOX_IGU1_ISRS_SET(n)           (1 << (n))
+#define MBOX_IGU1_ISRC_CLEAR(n)         (1 << (n))
+#define MBOX_IGU1_ISR_ISR(n)            (*MBOX_IGU1_ISR & (1 << (n)))
+#define MBOX_IGU1_IER_EN(n)             (*MBOX_IGU1_IER & (1 << (n)))
+#define MBOX_IGU1_IER_EN_SET(n)         (1 << (n))
+
+/*
+ *  Mailbox IGU3 Registers
+ */
+#define MBOX_IGU3_ISRS                  PPE_REG_ADDR(0x0214)
+#define MBOX_IGU3_ISRC                  PPE_REG_ADDR(0x0215)
+#define MBOX_IGU3_ISR                   PPE_REG_ADDR(0x0216)
+#define MBOX_IGU3_IER                   PPE_REG_ADDR(0x0217)
+
+#define MBOX_IGU3_ISRS_SET(n)           (1 << (n))
+#define MBOX_IGU3_ISRC_CLEAR(n)         (1 << (n))
+#define MBOX_IGU3_ISR_ISR(n)            (*MBOX_IGU3_ISR & (1 << (n)))
+#define MBOX_IGU3_IER_EN(n)             (*MBOX_IGU3_IER & (1 << (n)))
+#define MBOX_IGU3_IER_EN_SET(n)         (1 << (n))
+
+/*
+ *  RTHA/TTHA Registers
+ */
+#define RFBI_CFG                        PPE_REG_ADDR(0x0400)
+#define RBA_CFG0                        PPE_REG_ADDR(0x0404)
+#define RBA_CFG1                        PPE_REG_ADDR(0x0405)
+#define RCA_CFG0                        PPE_REG_ADDR(0x0408)
+#define RCA_CFG1                        PPE_REG_ADDR(0x0409)
+#define RDES_CFG0                       PPE_REG_ADDR(0x040C)
+#define RDES_CFG1                       PPE_REG_ADDR(0x040D)
+#define SFSM_STATE0                     PPE_REG_ADDR(0x0410)
+#define SFSM_STATE1                     PPE_REG_ADDR(0x0411)
+#define SFSM_DBA0                       PPE_REG_ADDR(0x0412)
+#define SFSM_DBA1                       PPE_REG_ADDR(0x0413)
+#define SFSM_CBA0                       PPE_REG_ADDR(0x0414)
+#define SFSM_CBA1                       PPE_REG_ADDR(0x0415)
+#define SFSM_CFG0                       PPE_REG_ADDR(0x0416)
+#define SFSM_CFG1                       PPE_REG_ADDR(0x0417)
+#define SFSM_PGCNT0                     PPE_REG_ADDR(0x041C)
+#define SFSM_PGCNT1                     PPE_REG_ADDR(0x041D)
+#define FFSM_DBA0                       PPE_REG_ADDR(0x0508)
+#define FFSM_DBA1                       PPE_REG_ADDR(0x0509)
+#define FFSM_CFG0                       PPE_REG_ADDR(0x050A)
+#define FFSM_CFG1                       PPE_REG_ADDR(0x050B)
+#define FFSM_IDLE_HEAD_BC0              PPE_REG_ADDR(0x050E)
+#define FFSM_IDLE_HEAD_BC1              PPE_REG_ADDR(0x050F)
+#define FFSM_PGCNT0                     PPE_REG_ADDR(0x0514)
+#define FFSM_PGCNT1                     PPE_REG_ADDR(0x0515)
+
+/*
+ *  PPE TC Logic Registers (partial)
+ */
+#define DREG_A_VERSION                  PPE_REG_ADDR(0x0D00)
+#define DREG_A_CFG                      PPE_REG_ADDR(0x0D01)
+#define DREG_AT_CTRL                    PPE_REG_ADDR(0x0D02)
+#define DREG_AT_CB_CFG0                 PPE_REG_ADDR(0x0D03)
+#define DREG_AT_CB_CFG1                 PPE_REG_ADDR(0x0D04)
+#define DREG_AR_CTRL                    PPE_REG_ADDR(0x0D08)
+#define DREG_AR_CB_CFG0                 PPE_REG_ADDR(0x0D09)
+#define DREG_AR_CB_CFG1                 PPE_REG_ADDR(0x0D0A)
+#define DREG_A_UTPCFG                   PPE_REG_ADDR(0x0D0E)
+#define DREG_A_STATUS                   PPE_REG_ADDR(0x0D0F)
+#define DREG_AT_CFG0                    PPE_REG_ADDR(0x0D20)
+#define DREG_AT_CFG1                    PPE_REG_ADDR(0x0D21)
+#define DREG_AT_FB_SIZE0                PPE_REG_ADDR(0x0D22)
+#define DREG_AT_FB_SIZE1                PPE_REG_ADDR(0x0D23)
+#define DREG_AT_CELL0                   PPE_REG_ADDR(0x0D24)
+#define DREG_AT_CELL1                   PPE_REG_ADDR(0x0D25)
+#define DREG_AT_IDLE_CNT0               PPE_REG_ADDR(0x0D26)
+#define DREG_AT_IDLE_CNT1               PPE_REG_ADDR(0x0D27)
+#define DREG_AT_IDLE0                   PPE_REG_ADDR(0x0D28)
+#define DREG_AT_IDLE1                   PPE_REG_ADDR(0x0D29)
+#define DREG_AR_CFG0                    PPE_REG_ADDR(0x0D60)
+#define DREG_AR_CFG1                    PPE_REG_ADDR(0x0D61)
+#define DREG_AR_CELL0                   PPE_REG_ADDR(0x0D68)
+#define DREG_AR_CELL1                   PPE_REG_ADDR(0x0D69)
+#define DREG_AR_IDLE_CNT0               PPE_REG_ADDR(0x0D6A)
+#define DREG_AR_IDLE_CNT1               PPE_REG_ADDR(0x0D6B)
+#define DREG_AR_AIIDLE_CNT0             PPE_REG_ADDR(0x0D6C)
+#define DREG_AR_AIIDLE_CNT1             PPE_REG_ADDR(0x0D6D)
+#define DREG_AR_BE_CNT0                 PPE_REG_ADDR(0x0D6E)
+#define DREG_AR_BE_CNT1                 PPE_REG_ADDR(0x0D6F)
+#define DREG_AR_HEC_CNT0                PPE_REG_ADDR(0x0D70)
+#define DREG_AR_HEC_CNT1                PPE_REG_ADDR(0x0D71)
+#define DREG_AR_IDLE0                   PPE_REG_ADDR(0x0D74)
+#define DREG_AR_IDLE1                   PPE_REG_ADDR(0x0D75)
+#define DREG_AR_CERRN_CNT0              PPE_REG_ADDR(0x0DA0)
+#define DREG_AR_CERRN_CNT1              PPE_REG_ADDR(0x0DA1)
+#define DREG_AR_CERRNP_CNT0             PPE_REG_ADDR(0x0DA2)
+#define DREG_AR_CERRNP_CNT1             PPE_REG_ADDR(0x0DA3)
+#define DREG_AR_CVN_CNT0                PPE_REG_ADDR(0x0DA4)
+#define DREG_AR_CVN_CNT1                PPE_REG_ADDR(0x0DA5)
+#define DREG_AR_CVNP_CNT0               PPE_REG_ADDR(0x0DA6)
+#define DREG_AR_CVNP_CNT1               PPE_REG_ADDR(0x0DA7)
+#define DREG_B0_LADR                    PPE_REG_ADDR(0x0DA8)
+#define DREG_B1_LADR                    PPE_REG_ADDR(0x0DA9)
+
+
+
+#endif  //  IFXMIPS_PTM_PPE_COMMON_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_danube.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_danube.h
new file mode 100644
index 0000000..5f896e6
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_danube.h
@@ -0,0 +1,135 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_ppe_danube.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (PPE register for Danube)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_PPE_DANUBE_H
+#define IFXMIPS_PTM_PPE_DANUBE_H
+
+
+
+/*
+ *  FPI Configuration Bus Register and Memory Address Mapping
+ */
+#define IFX_PPE                      	(KSEG1 | 0x1E180000)
+#define PP32_DEBUG_REG_ADDR(i, x)       ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0000) << 2)))
+#define PPM_INT_REG_ADDR(i, x)          ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0030) << 2)))
+#define PP32_INTERNAL_RES_ADDR(i, x)    ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0040) << 2)))
+#define CDM_CODE_MEMORY(i, x)           ((volatile unsigned int*)(IFX_PPE + (((x) + 0x1000) << 2)))
+#define PPE_REG_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x4000) << 2)))
+#define CDM_DATA_MEMORY(i, x)           ((volatile unsigned int*)(IFX_PPE + (((x) + 0x5000) << 2)))
+#define PPM_INT_UNIT_ADDR(x)            ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6000) << 2)))
+#define PPM_TIMER0_ADDR(x)              ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6100) << 2)))
+#define PPM_TASK_IND_REG_ADDR(x)        ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6200) << 2)))
+#define PPS_BRK_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6300) << 2)))
+#define PPM_TIMER1_ADDR(x)              ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6400) << 2)))
+#define SB_RAM0_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8000) << 2)))
+#define SB_RAM1_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8400) << 2)))
+#define SB_RAM2_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8C00) << 2)))
+#define SB_RAM3_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x9600) << 2)))
+#define QSB_CONF_REG_ADDR(x)            ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2)))
+
+/*
+ *  DWORD-Length of Memory Blocks
+ */
+#define PP32_DEBUG_REG_DWLEN            0x0030
+#define PPM_INT_REG_DWLEN               0x0010
+#define PP32_INTERNAL_RES_DWLEN         0x00C0
+#define CDM_CODE_MEMORYn_DWLEN(n)       ((n) == 0 ? 0x1000 : 0x0800)
+#define PPE_REG_DWLEN                   0x1000
+#define CDM_DATA_MEMORY_DWLEN           CDM_CODE_MEMORYn_DWLEN(1)
+#define PPM_INT_UNIT_DWLEN              0x0100
+#define PPM_TIMER0_DWLEN                0x0100
+#define PPM_TASK_IND_REG_DWLEN          0x0100
+#define PPS_BRK_DWLEN                   0x0100
+#define PPM_TIMER1_DWLEN                0x0100
+#define SB_RAM0_DWLEN                   0x0400
+#define SB_RAM1_DWLEN                   0x0800
+#define SB_RAM2_DWLEN                   0x0A00
+#define SB_RAM3_DWLEN                   0x0400
+#define QSB_CONF_REG_DWLEN              0x0100
+
+/*
+ *  PP32 to FPI Address Mapping
+ */
+#define SB_BUFFER(__sb_addr)            ((volatile unsigned int *)((((__sb_addr) >= 0x2000) && ((__sb_addr) <= 0x23FF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2000) :   \
+                                                                   (((__sb_addr) >= 0x2400) && ((__sb_addr) <= 0x2BFF)) ? SB_RAM1_ADDR((__sb_addr) - 0x2400) :   \
+                                                                   (((__sb_addr) >= 0x2C00) && ((__sb_addr) <= 0x35FF)) ? SB_RAM2_ADDR((__sb_addr) - 0x2C00) :   \
+                                                                   (((__sb_addr) >= 0x3600) && ((__sb_addr) <= 0x39FF)) ? SB_RAM3_ADDR((__sb_addr) - 0x3600) :   \
+                                                                0))
+
+/*
+ *  PP32 Debug Control Register
+ */
+#define PP32_DBG_CTRL                   PP32_DEBUG_REG_ADDR(0, 0x0000)
+
+#define DBG_CTRL_START_SET(value)       ((value) ? (1 << 0) : 0)
+#define DBG_CTRL_STOP_SET(value)        ((value) ? (1 << 1) : 0)
+#define DBG_CTRL_STEP_SET(value)        ((value) ? (1 << 2) : 0)
+
+#define PP32_HALT_STAT                  PP32_DEBUG_REG_ADDR(0, 0x0001)
+
+#define PP32_BRK_SRC                    PP32_DEBUG_REG_ADDR(0, 0x0002)
+  #define PP32_BRK_SRC_PC(i)            (1 << (i))
+  #define PP32_BRK_SRC_DATA(i, cmd)     ((cmd) << ((i) * 3 + 8))
+
+#define PP32_DBG_PC_MIN(i)              PP32_DEBUG_REG_ADDR(0, 0x0010 + (i))
+#define PP32_DBG_PC_MAX(i)              PP32_DEBUG_REG_ADDR(0, 0x0014 + (i))
+#define PP32_DBG_DATA_MIN(i)            PP32_DEBUG_REG_ADDR(0, 0x0018 + (i))
+#define PP32_DBG_DATA_MAX(i)            PP32_DEBUG_REG_ADDR(0, 0x001A + (i))
+#define PP32_DBG_DATA_VAL(i)            PP32_DEBUG_REG_ADDR(0, 0x001C + (i))
+
+#define PP32_DBG_TASK_GPR(task, i)      PP32_DEBUG_REG_ADDR(0, 0x0040 + (task) * 0x0010 + (i))
+
+#define PP32_DBG_CUR_PC                 PP32_DEBUG_REG_ADDR(0, 0x0080)
+#define PP32_DBG_TASK_NO                PP32_DEBUG_REG_ADDR(0, 0x0081)
+#define PP32_DBG_TASK_PRIO              PP32_DEBUG_REG_ADDR(0, 0x0086)
+#define PP32_DBG_PC_OF_TASK(i)          PP32_DEBUG_REG_ADDR(0, 0x0087 + (i))
+
+/*
+ *  Share Buffer Registers
+ */
+#define SB_MST_SEL                      PPE_REG_ADDR(0x0304)
+
+/*
+ *  EMA Registers
+ */
+#define EMA_CMDCFG                      PPE_REG_ADDR(0x0A00)
+#define EMA_DATACFG                     PPE_REG_ADDR(0x0A01)
+#define EMA_CMDCNT                      PPE_REG_ADDR(0x0A02)
+#define EMA_DATACNT                     PPE_REG_ADDR(0x0A03)
+#define EMA_ISR                         PPE_REG_ADDR(0x0A04)
+#define EMA_IER                         PPE_REG_ADDR(0x0A05)
+#define EMA_CFG                         PPE_REG_ADDR(0x0A06)
+#define EMA_SUBID                       PPE_REG_ADDR(0x0A07)
+
+#define EMA_ALIGNMENT                   4
+
+/*
+ *  Mailbox IGU1 Interrupt
+ */
+#define PPE_MAILBOX_IGU1_INT            INT_NUM_IM2_IRL24
+
+
+
+#endif  //  IFXMIPS_PTM_PPE_DANUBE_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_vr9.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_vr9.h
new file mode 100644
index 0000000..4a8c2f7
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_ppe_vr9.h
@@ -0,0 +1,205 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_ppe_vr9.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (PPE register for VR9)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifndef IFXMIPS_PTM_PPE_VR9_H
+#define IFXMIPS_PTM_PPE_VR9_H
+
+
+
+/*
+ *  FPI Configuration Bus Register and Memory Address Mapping
+ */
+#define IFX_PPE                         (KSEG1 | 0x1E200000)
+#define PP32_DEBUG_REG_ADDR(i, x)       ((volatile unsigned int*)(IFX_PPE + (((x) + 0x000000 + (i) * 0x00010000) << 2)))
+#define CDM_CODE_MEMORY(i, x)           ((volatile unsigned int*)(IFX_PPE + (((x) + 0x001000 + (i) * 0x00010000) << 2)))
+#define CDM_DATA_MEMORY(i, x)           ((volatile unsigned int*)(IFX_PPE + (((x) + 0x004000 + (i) * 0x00010000) << 2)))
+#define SB_RAM0_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x008000) << 2)))
+#define SB_RAM1_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x009000) << 2)))
+#define SB_RAM2_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00A000) << 2)))
+#define SB_RAM3_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00B000) << 2)))
+#define PPE_REG_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00D000) << 2)))
+#define QSB_CONF_REG_ADDR(x)            ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00E000) << 2)))
+#define SB_RAM6_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x018000) << 2)))
+
+/*
+ *  DWORD-Length of Memory Blocks
+ */
+#define PP32_DEBUG_REG_DWLEN            0x0030
+#define CDM_CODE_MEMORYn_DWLEN(n)       ((n) == 0 ? 0x1000 : 0x0800)
+#define CDM_DATA_MEMORY_DWLEN           CDM_CODE_MEMORYn_DWLEN(1)
+#define SB_RAM0_DWLEN                   0x1000
+#define SB_RAM1_DWLEN                   0x1000
+#define SB_RAM2_DWLEN                   0x1000
+#define SB_RAM3_DWLEN                   0x1000
+#define SB_RAM6_DWLEN                   0x8000
+#define QSB_CONF_REG_DWLEN              0x0100
+
+/*
+ *  PP32 to FPI Address Mapping
+ */
+#define SB_BUFFER(__sb_addr)            ((volatile unsigned int *)((((__sb_addr) >= 0x0000) && ((__sb_addr) <= 0x1FFF)) ? PPE_REG_ADDR((__sb_addr)) :           \
+                                                                   (((__sb_addr) >= 0x2000) && ((__sb_addr) <= 0x2FFF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2000) :  \
+                                                                   (((__sb_addr) >= 0x3000) && ((__sb_addr) <= 0x3FFF)) ? SB_RAM1_ADDR((__sb_addr) - 0x3000) :  \
+                                                                   (((__sb_addr) >= 0x4000) && ((__sb_addr) <= 0x4FFF)) ? SB_RAM2_ADDR((__sb_addr) - 0x4000) :  \
+                                                                   (((__sb_addr) >= 0x5000) && ((__sb_addr) <= 0x5FFF)) ? SB_RAM3_ADDR((__sb_addr) - 0x5000) :  \
+                                                                   (((__sb_addr) >= 0x7000) && ((__sb_addr) <= 0x7FFF)) ? PPE_REG_ADDR((__sb_addr) - 0x7000) :  \
+                                                                   (((__sb_addr) >= 0x8000) && ((__sb_addr) <= 0xFFFF)) ? SB_RAM6_ADDR((__sb_addr) - 0x8000) :  \
+                                                                0))
+
+/*
+ *  PP32 Debug Control Register
+ */
+#define NUM_OF_PP32                             2
+
+#define PP32_FREEZE                             PPE_REG_ADDR(0x0000)
+#define PP32_SRST                               PPE_REG_ADDR(0x0020)
+
+#define PP32_DBG_CTRL(n)                        PP32_DEBUG_REG_ADDR(n, 0x0000)
+
+#define DBG_CTRL_RESTART                        0
+#define DBG_CTRL_STOP                           1
+
+#define PP32_CTRL_CMD(n)                        PP32_DEBUG_REG_ADDR(n, 0x0B00)
+  #define PP32_CTRL_CMD_RESTART                 (1 << 0)
+  #define PP32_CTRL_CMD_STOP                    (1 << 1)
+  #define PP32_CTRL_CMD_STEP                    (1 << 2)
+  #define PP32_CTRL_CMD_BREAKOUT                (1 << 3)
+
+#define PP32_CTRL_OPT(n)                        PP32_DEBUG_REG_ADDR(n, 0x0C00)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_STOP_ON     (3 << 0)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_STOP_OFF    (2 << 0)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_ON  (3 << 2)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_OFF (2 << 2)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKIN_ON      (3 << 4)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKIN_OFF     (2 << 4)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_ON   (3 << 6)
+  #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_OFF  (2 << 6)
+  #define PP32_CTRL_OPT_BREAKOUT_ON_STOP(n)     (*PP32_CTRL_OPT(n) & (1 << 0))
+  #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN(n)  (*PP32_CTRL_OPT(n) & (1 << 2))
+  #define PP32_CTRL_OPT_STOP_ON_BREAKIN(n)      (*PP32_CTRL_OPT(n) & (1 << 4))
+  #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT(n)   (*PP32_CTRL_OPT(n) & (1 << 6))
+
+#define PP32_BRK_PC(n, i)                       PP32_DEBUG_REG_ADDR(n, 0x0900 + (i) * 2)
+#define PP32_BRK_PC_MASK(n, i)                  PP32_DEBUG_REG_ADDR(n, 0x0901 + (i) * 2)
+#define PP32_BRK_DATA_ADDR(n, i)                PP32_DEBUG_REG_ADDR(n, 0x0904 + (i) * 2)
+#define PP32_BRK_DATA_ADDR_MASK(n, i)           PP32_DEBUG_REG_ADDR(n, 0x0905 + (i) * 2)
+#define PP32_BRK_DATA_VALUE_RD(n, i)            PP32_DEBUG_REG_ADDR(n, 0x0908 + (i) * 2)
+#define PP32_BRK_DATA_VALUE_RD_MASK(n, i)       PP32_DEBUG_REG_ADDR(n, 0x0909 + (i) * 2)
+#define PP32_BRK_DATA_VALUE_WR(n, i)            PP32_DEBUG_REG_ADDR(n, 0x090C + (i) * 2)
+#define PP32_BRK_DATA_VALUE_WR_MASK(n, i)       PP32_DEBUG_REG_ADDR(n, 0x090D + (i) * 2)
+  #define PP32_BRK_CONTEXT_MASK(i)              (1 << (i))
+  #define PP32_BRK_CONTEXT_MASK_EN              (1 << 4)
+  #define PP32_BRK_COMPARE_GREATER_EQUAL        (1 << 5)    //  valid for break data value rd/wr only
+  #define PP32_BRK_COMPARE_LOWER_EQUAL          (1 << 6)
+  #define PP32_BRK_COMPARE_EN                   (1 << 7)
+
+#define PP32_BRK_TRIG(n)                        PP32_DEBUG_REG_ADDR(n, 0x0F00)
+  #define PP32_BRK_GRPi_PCn_ON(i, n)            ((3 << ((n) * 2)) << ((i) * 16))
+  #define PP32_BRK_GRPi_PCn_OFF(i, n)           ((2 << ((n) * 2)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_ADDRn_ON(i, n)     ((3 << ((n) * 2 + 4)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_ADDRn_OFF(i, n)    ((2 << ((n) * 2 + 4)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_RDn_ON(i, n) ((3 << ((n) * 2 + 8)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_RDn_OFF(i, n)((2 << ((n) * 2 + 8)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_WRn_ON(i, n) ((3 << ((n) * 2 + 12)) << ((i) * 16))
+  #define PP32_BRK_GRPi_DATA_VALUE_WRn_OFF(i, n)((2 << ((n) * 2 + 12)) << ((i) * 16))
+  #define PP32_BRK_GRPi_PCn(k, i, n)            (*PP32_BRK_TRIG(k) & ((1 << ((n))) << ((i) * 8)))
+  #define PP32_BRK_GRPi_DATA_ADDRn(k, i, n)     (*PP32_BRK_TRIG(k) & ((1 << ((n) + 2)) << ((i) * 8)))
+  #define PP32_BRK_GRPi_DATA_VALUE_RDn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 4)) << ((i) * 8)))
+  #define PP32_BRK_GRPi_DATA_VALUE_WRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 6)) << ((i) * 8)))
+
+#define PP32_CPU_STATUS(n)                      PP32_DEBUG_REG_ADDR(n, 0x0D00)
+#define PP32_HALT_STAT(n)                       PP32_CPU_STATUS(n)
+#define PP32_DBG_CUR_PC(n)                      PP32_CPU_STATUS(n)
+  #define PP32_CPU_USER_STOPPED(n)              (*PP32_CPU_STATUS(n) & (1 << 0))
+  #define PP32_CPU_USER_BREAKIN_RCV(n)          (*PP32_CPU_STATUS(n) & (1 << 1))
+  #define PP32_CPU_USER_BREAKPOINT_MET(n)       (*PP32_CPU_STATUS(n) & (1 << 2))
+  #define PP32_CPU_CUR_PC(n)                    (*PP32_CPU_STATUS(n) >> 16)
+
+#define PP32_BREAKPOINT_REASONS(n)              PP32_DEBUG_REG_ADDR(n, 0x0A00)
+  #define PP32_BRK_PC_MET(n, i)                 (*PP32_BREAKPOINT_REASONS(n) & (1 << (i)))
+  #define PP32_BRK_DATA_ADDR_MET(n, i)          (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 2)))
+  #define PP32_BRK_DATA_VALUE_RD_MET(n, i)      (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 4)))
+  #define PP32_BRK_DATA_VALUE_WR_MET(n, i)      (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 6)))
+  #define PP32_BRK_DATA_VALUE_RD_LO_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 8)))
+  #define PP32_BRK_DATA_VALUE_RD_GT_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 9)))
+  #define PP32_BRK_DATA_VALUE_WR_LO_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 12)))
+  #define PP32_BRK_DATA_VALUE_WR_GT_EQ(n, i)    (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 13)))
+  #define PP32_BRK_CUR_CONTEXT(n)               ((*PP32_BREAKPOINT_REASONS(n) >> 16) & 0x03)
+
+#define PP32_GP_REG_BASE(n)                     PP32_DEBUG_REG_ADDR(n, 0x0E00)
+#define PP32_GP_CONTEXTi_REGn(n, i, j)          PP32_DEBUG_REG_ADDR(n, 0x0E00 + (i) * 16 + (j))
+
+/*
+ *  SAR Registers
+ */
+#define SAR_MODE_CFG                    PPE_REG_ADDR(0x080A)
+#define SAR_RX_CMD_CNT                  PPE_REG_ADDR(0x080B)
+#define SAR_TX_CMD_CNT                  PPE_REG_ADDR(0x080C)
+#define SAR_RX_CTX_CFG                  PPE_REG_ADDR(0x080D)
+#define SAR_TX_CTX_CFG                  PPE_REG_ADDR(0x080E)
+#define SAR_TX_CMD_DONE_CNT             PPE_REG_ADDR(0x080F)
+#define SAR_POLY_CFG_SET0               PPE_REG_ADDR(0x0812)
+#define SAR_POLY_CFG_SET1               PPE_REG_ADDR(0x0813)
+#define SAR_POLY_CFG_SET2               PPE_REG_ADDR(0x0814)
+#define SAR_POLY_CFG_SET3               PPE_REG_ADDR(0x0815)
+#define SAR_CRC_SIZE_CFG                PPE_REG_ADDR(0x0816)
+
+/*
+ *  PDMA/EMA Registers
+ */
+#define PDMA_CFG                        PPE_REG_ADDR(0x0A00)
+#define PDMA_RX_CMDCNT                  PPE_REG_ADDR(0x0A01)
+#define PDMA_TX_CMDCNT                  PPE_REG_ADDR(0x0A02)
+#define PDMA_RX_FWDATACNT               PPE_REG_ADDR(0x0A03)
+#define PDMA_TX_FWDATACNT               PPE_REG_ADDR(0x0A04)
+#define PDMA_RX_CTX_CFG                 PPE_REG_ADDR(0x0A05)
+#define PDMA_TX_CTX_CFG                 PPE_REG_ADDR(0x0A06)
+#define PDMA_RX_MAX_LEN_REG             PPE_REG_ADDR(0x0A07)
+#define PDMA_RX_DELAY_CFG               PPE_REG_ADDR(0x0A08)
+#define PDMA_INT_FIFO_RD                PPE_REG_ADDR(0x0A09)
+#define PDMA_ISR                        PPE_REG_ADDR(0x0A0A)
+#define PDMA_IER                        PPE_REG_ADDR(0x0A0B)
+#define PDMA_SUBID                      PPE_REG_ADDR(0x0A0C)
+#define PDMA_BAR0                       PPE_REG_ADDR(0x0A0D)
+#define PDMA_BAR1                       PPE_REG_ADDR(0x0A0E)
+
+#define SAR_PDMA_RX_CMDBUF_CFG          PPE_REG_ADDR(0x0F00)
+#define SAR_PDMA_TX_CMDBUF_CFG          PPE_REG_ADDR(0x0F01)
+#define SAR_PDMA_RX_FW_CMDBUF_CFG       PPE_REG_ADDR(0x0F02)
+#define SAR_PDMA_TX_FW_CMDBUF_CFG       PPE_REG_ADDR(0x0F03)
+#define SAR_PDMA_RX_CMDBUF_STATUS       PPE_REG_ADDR(0x0F04)
+#define SAR_PDMA_TX_CMDBUF_STATUS       PPE_REG_ADDR(0x0F05)
+
+#define PDMA_ALIGNMENT                  32              //  same as Central DMA because of descriptor swap
+#define EMA_ALIGNMENT                   PDMA_ALIGNMENT
+
+/*
+ *  Mailbox IGU1 Interrupt
+ */
+#define PPE_MAILBOX_IGU1_INT            INT_NUM_IM2_IRL24
+
+
+
+#endif  //  IFXMIPS_PTM_PPE_VR9_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_test.c b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_test.c
new file mode 100644
index 0000000..15d8352
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_test.c
@@ -0,0 +1,943 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_vdsl.c
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver common source file (core functions for VR9)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+#ifdef CONFIG_IFX_PTM_TEST_PROC
+
+/*
+ * ####################################
+ *              Head File
+ * ####################################
+ */
+
+/*
+ *  Common Head File
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/ioctl.h>
+#include <linux/etherdevice.h>
+
+/*
+ *  Chip Specific Head File
+ */
+#include <asm/ifx/ifx_types.h>
+#include <asm/ifx/ifx_regs.h>
+#include <asm/ifx/common_routines.h>
+#include "ifxmips_ptm_common.h"
+#include "ifxmips_ptm_ppe_common.h"
+
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+
+
+/*
+ * ####################################
+ *             Declaration
+ * ####################################
+ */
+
+/*
+ *  Proc File Functions
+ */
+static inline void proc_file_create(void);
+static inline void proc_file_delete(void);
+
+/*
+ *  Proc Help Functions
+ */
+static int proc_write_mem(struct file *, const char *, unsigned long, void *);
+static int proc_read_pp32(char *, char **, off_t, int, int *, void *);
+static int proc_write_pp32(struct file *, const char *, unsigned long, void *);
+static int stricmp(const char *, const char *);
+static int strincmp(const char *, const char *, int);
+static int get_token(char **, char **, int *, int *);
+static int get_number(char **, int *, int);
+static inline void ignore_space(char **, int *);
+
+
+
+/*
+ * ####################################
+ *            Local Variable
+ * ####################################
+ */
+
+
+
+/*
+ * ####################################
+ *            Local Function
+ * ####################################
+ */
+
+static inline void proc_file_create(void)
+{
+    struct proc_dir_entry *res;
+
+    res = create_proc_entry("driver/ifx_ptm/mem",
+                            0,
+                            NULL);
+    if ( res != NULL )
+        res->write_proc = proc_write_mem;
+    else
+        printk("%s:%s:%d: failed to create proc mem!", __FILE__, __func__, __LINE__);
+
+    res = create_proc_entry("driver/ifx_ptm/pp32",
+                            0,
+                            NULL);
+    if ( res != NULL ) {
+        res->read_proc = proc_read_pp32;
+        res->write_proc = proc_write_pp32;
+    }
+    else
+        printk("%s:%s:%d: failed to create proc pp32!", __FILE__, __func__, __LINE__);
+}
+
+static inline void proc_file_delete(void)
+{
+    remove_proc_entry("driver/ifx_ptm/pp32", NULL);
+
+    remove_proc_entry("driver/ifx_ptm/mem", NULL);
+}
+
+static inline unsigned long sb_addr_to_fpi_addr_convert(unsigned long sb_addr)
+{
+#define PP32_SB_ADDR_END        0xFFFF
+
+    if ( sb_addr < PP32_SB_ADDR_END) {
+        return (unsigned long ) SB_BUFFER(sb_addr);
+    }
+    else {
+        return sb_addr;
+    }
+}
+
+static int proc_write_mem(struct file *file, const char *buf, unsigned long count, void *data)
+{
+    char *p1, *p2;
+    int len;
+    int colon;
+    unsigned long *p;
+    char local_buf[1024];
+    int i, n, l;
+
+    len = sizeof(local_buf) < count ? sizeof(local_buf) - 1 : count;
+    len = len - copy_from_user(local_buf, buf, len);
+    local_buf[len] = 0;
+
+    p1 = local_buf;
+    colon = 1;
+    while ( get_token(&p1, &p2, &len, &colon) )
+    {
+        if ( stricmp(p1, "w") == 0 || stricmp(p1, "write") == 0 || stricmp(p1, "r") == 0 || stricmp(p1, "read") == 0 )
+            break;
+
+        p1 = p2;
+        colon = 1;
+    }
+
+    if ( *p1 == 'w' )
+    {
+        ignore_space(&p2, &len);
+        p = (unsigned long *)get_number(&p2, &len, 1);
+        p = (unsigned long *)sb_addr_to_fpi_addr_convert( (unsigned long) p);
+
+        if ( (u32)p >= KSEG0 )
+            while ( 1 )
+            {
+                ignore_space(&p2, &len);
+                if ( !len || !((*p2 >= '0' && *p2 <= '9') || (*p2 >= 'a' && *p2 <= 'f') || (*p2 >= 'A' && *p2 <= 'F')) )
+                    break;
+
+                *p++ = (u32)get_number(&p2, &len, 1);
+            }
+    }
+    else if ( *p1 == 'r' )
+    {
+        ignore_space(&p2, &len);
+        p = (unsigned long *)get_number(&p2, &len, 1);
+        p = (unsigned long *)sb_addr_to_fpi_addr_convert( (unsigned long) p);
+
+        if ( (u32)p >= KSEG0 )
+        {
+            ignore_space(&p2, &len);
+            n = (int)get_number(&p2, &len, 0);
+            if ( n )
+            {
+                char str[32] = {0};
+                char *pch = str;
+                int k;
+                u32 data;
+                char c;
+
+                n += (l = ((int)p >> 2) & 0x03);
+                p = (unsigned long *)((u32)p & ~0x0F);
+                for ( i = 0; i < n; i++ )
+                {
+                    if ( (i & 0x03) == 0 )
+                    {
+                        printk("%08X:", (u32)p);
+                        pch = str;
+                    }
+                    if ( i < l )
+                    {
+                        printk("         ");
+                        sprintf(pch, "    ");
+                    }
+                    else
+                    {
+                        data = (u32)*p;
+                        printk(" %08X", data);
+                        for ( k = 0; k < 4; k++ )
+                        {
+                            c = ((char*)&data)[k];
+                            pch[k] = c < ' ' ? '.' : c;
+                        }
+                    }
+                    p++;
+                    pch += 4;
+                    if ( (i & 0x03) == 0x03 )
+                    {
+                        pch[0] = 0;
+                        printk(" ; %s\n", str);
+                    }
+                }
+                if ( (n & 0x03) != 0x00 )
+                {
+                    for ( k = 4 - (n & 0x03); k > 0; k-- )
+                        printk("         ");
+                    pch[0] = 0;
+                    printk(" ; %s\n", str);
+                }
+            }
+        }
+    }
+
+    return count;
+}
+
+#ifdef CONFIG_DANUBE
+
+static int proc_read_pp32(char *page, char **start, off_t off, int count, int *eof, void *data)
+{
+    static const char *halt_stat[] = {
+        "reset",
+        "break in line",
+        "stop",
+        "step",
+        "code",
+        "data0",
+        "data1"
+    };
+    static const char *brk_src_data[] = {
+        "off",
+        "read",
+        "write",
+        "read/write",
+        "write_equal",
+        "N/A",
+        "N/A",
+        "N/A"
+    };
+    static const char *brk_src_code[] = {
+        "off",
+        "on"
+    };
+
+    int len = 0;
+    int cur_task;
+    int i, j;
+    int k;
+    unsigned long bit;
+
+    len += sprintf(page + off + len, "Task No %d, PC %04x\n", *PP32_DBG_TASK_NO & 0x03, *PP32_DBG_CUR_PC & 0xFFFF);
+
+    if ( !(*PP32_HALT_STAT & 0x01) )
+        len += sprintf(page + off + len, "  Halt State: Running\n");
+    else
+    {
+        len += sprintf(page + off + len, "  Halt State: Stopped");
+        k = 0;
+        for ( bit = 2, i = 0; bit <= (1 << 7); bit <<= 1, i++ )
+            if ( (*PP32_HALT_STAT & bit) )
+            {
+                if ( !k )
+                {
+                    len += sprintf(page + off + len, ", ");
+                    k++;
+                }
+                else
+                    len += sprintf(page + off + len, " | ");
+                len += sprintf(page + off + len, halt_stat[i]);
+            }
+
+        len += sprintf(page + off + len, "\n");
+
+        cur_task = *PP32_DBG_TASK_NO & 0x03;
+        len += sprintf(page + off + len, "General Purpose Register (Task %d):\n", cur_task);
+        for ( i = 0; i < 4; i++ )
+        {
+            for ( j = 0; j < 4; j++ )
+                len += sprintf(page + off + len, "   %2d: %08x", i + j * 4, *PP32_DBG_TASK_GPR(cur_task, i + j * 4));
+            len += sprintf(page + off + len, "\n");
+        }
+    }
+
+    len += sprintf(page + off + len, "  Break Src:  data1 - %s, data0 - %s, pc3 - %s, pc2 - %s, pc1 - %s, pc0 - %s\n",
+                                                    brk_src_data[(*PP32_BRK_SRC >> 11) & 0x07], brk_src_data[(*PP32_BRK_SRC >> 8) & 0x07], brk_src_code[(*PP32_BRK_SRC >> 3) & 0x01], brk_src_code[(*PP32_BRK_SRC >> 2) & 0x01], brk_src_code[(*PP32_BRK_SRC >> 1) & 0x01], brk_src_code[*PP32_BRK_SRC & 0x01]);
+
+    for ( i = 0; i < 4; i++ )
+        len += sprintf(page + off + len, "    pc%d:      %04x - %04x\n", i, *PP32_DBG_PC_MIN(i), *PP32_DBG_PC_MAX(i));
+
+    for ( i = 0; i < 2; i++ )
+        len += sprintf(page + off + len, "    data%d:    %04x - %04x (%08x)\n", i, *PP32_DBG_DATA_MIN(i), *PP32_DBG_DATA_MAX(i), *PP32_DBG_DATA_VAL(i));
+
+    *eof = 1;
+
+    return len;
+}
+
+static int proc_write_pp32(struct file *file, const char *buf, unsigned long count, void *data)
+{
+    char str[2048];
+    char *p;
+    int len, rlen;
+
+    int id;
+    u32 addr;
+    u32 cmd;
+
+    len = count < sizeof(str) ? count : sizeof(str) - 1;
+    rlen = len - copy_from_user(str, buf, len);
+    while ( rlen && str[rlen - 1] <= ' ' )
+        rlen--;
+    str[rlen] = 0;
+    for ( p = str; *p && *p <= ' '; p++, rlen-- );
+    if ( !*p )
+    {
+        return 0;
+    }
+
+    if ( stricmp(str, "start") == 0 )
+        *PP32_DBG_CTRL = DBG_CTRL_START_SET(1);
+    else if ( stricmp(str, "stop") == 0 )
+        *PP32_DBG_CTRL = DBG_CTRL_STOP_SET(1);
+    else if ( stricmp(str, "step") == 0 )
+        *PP32_DBG_CTRL = DBG_CTRL_STEP_SET(1);
+    else if ( strincmp(p, "pc", 2) == 0 && p[2] >= '0' && p[2] <= '3' && p[3] == ' ' )
+    {
+        id = (int)(p[2] - '0');
+        p += 4;
+        rlen -= 4;
+        *PP32_BRK_SRC &= ~PP32_BRK_SRC_PC(id);
+        if ( stricmp(p, "off") != 0 )
+        {
+            ignore_space(&p, &rlen);
+            *PP32_DBG_PC_MIN(id) = *PP32_DBG_PC_MAX(id) = get_number(&p, &rlen, 1);
+            ignore_space(&p, &rlen);
+            if ( rlen > 0 )
+            {
+                addr = get_number(&p, &rlen, 1);
+                if ( addr >= *PP32_DBG_PC_MIN(id) )
+                    *PP32_DBG_PC_MAX(id) = addr;
+                else
+                    *PP32_DBG_PC_MIN(id) = addr;
+            }
+            *PP32_BRK_SRC |= PP32_BRK_SRC_PC(id);
+        }
+    }
+    else if ( strincmp(p, "daddr", 5) == 0 && p[5] >= '0' && p[5] <= '1' && p[6] == ' ' )
+    {
+        id = (int)(p[5] - '0');
+        p += 7;
+        rlen -= 7;
+        *PP32_BRK_SRC &= ~PP32_BRK_SRC_DATA(id, 7);
+        if ( stricmp(p, "off") != 0 )
+        {
+            ignore_space(&p, &rlen);
+            *PP32_DBG_DATA_MIN(id) = *PP32_DBG_DATA_MAX(id) = get_number(&p, &rlen, 1);
+            cmd = 1;
+            ignore_space(&p, &rlen);
+            if ( rlen > 0 && ((*p >= '0' && *p <= '9') || (*p >= 'a' && *p <= 'f') || (*p >= 'A' && *p <= 'F')) )
+            {
+                addr = get_number(&p, &rlen, 1);
+                if ( addr >= *PP32_DBG_PC_MIN(id) )
+                    *PP32_DBG_DATA_MAX(id) = addr;
+                else
+                    *PP32_DBG_DATA_MIN(id) = addr;
+                ignore_space(&p, &rlen);
+            }
+            if ( *p == 'w' )
+                cmd = 2;
+            else if ( *p == 'r' && p[1] == 'w' )
+            {
+                cmd = 3;
+                p++;
+                rlen--;
+            }
+            p++;
+            rlen--;
+            if ( rlen > 0 )
+            {
+                ignore_space(&p, &rlen);
+                if ( (*p >= '0' && *p <= '9') || (*p >= 'a' && *p <= 'f') || (*p >= 'A' && *p <= 'F'))
+                {
+                    *PP32_DBG_DATA_VAL(id) = get_number(&p, &rlen, 1);
+                    cmd = 4;
+                }
+            }
+            *PP32_BRK_SRC |= PP32_BRK_SRC_DATA(id, cmd);
+        }
+    }
+    else
+    {
+        printk("echo \"<command>\" > /proc/driver/ifx_ptm/pp32\n");
+        printk("  command:\n");
+        printk("    start - run pp32\n");
+        printk("    stop  - stop pp32\n");
+        printk("    step  - run pp32 with one step only\n");
+        printk("    pc0    - pc0 <addr_min [addr_max]>/off, set break point PC0\n");
+        printk("    pc1    - pc1 <addr_min [addr_max]>/off, set break point PC1\n");
+        printk("    pc2    - pc2 <addr_min [addr_max]>/off, set break point PC2\n");
+        printk("    pc3    - pc3 <addr_min [addr_max]>/off, set break point PC3\n");
+        printk("    daddr0 - daddr0 <addr_min [addr_max] r/w/rw [value]>/off, set break point data address 0\n");
+        printk("    daddr1 - daddr1 <addr_min [addr_max] r/w/rw [value]>/off, set break point data address 1\n");
+        printk("    help  - print this screen\n");
+    }
+
+    return count;
+}
+
+#else
+
+static int proc_read_pp32(char *page, char **start, off_t off, int count, int *eof, void *data)
+{
+    static const char *stron = " on";
+    static const char *stroff = "off";
+
+    int len = 0;
+    int cur_context;
+    int f_stopped;
+    char str[256];
+    char strlength;
+    int i, j;
+
+    int pp32;
+
+    for ( pp32 = 0; pp32 < NUM_OF_PP32; pp32++ )
+    {
+        f_stopped = 0;
+
+        len += sprintf(page + off + len, "===== pp32 core %d =====\n", pp32);
+
+  #ifdef CONFIG_VR9
+        if ( (*PP32_FREEZE & (1 << (pp32 << 4))) != 0 )
+        {
+            sprintf(str, "freezed");
+            f_stopped = 1;
+        }
+  #else
+        if ( 0 )
+        {
+        }
+  #endif
+        else if ( PP32_CPU_USER_STOPPED(pp32) || PP32_CPU_USER_BREAKIN_RCV(pp32) || PP32_CPU_USER_BREAKPOINT_MET(pp32) )
+        {
+            strlength = 0;
+            if ( PP32_CPU_USER_STOPPED(pp32) )
+                strlength += sprintf(str + strlength, "stopped");
+            if ( PP32_CPU_USER_BREAKPOINT_MET(pp32) )
+                strlength += sprintf(str + strlength, strlength ? " | breakpoint" : "breakpoint");
+            if ( PP32_CPU_USER_BREAKIN_RCV(pp32) )
+                strlength += sprintf(str + strlength, strlength ? " | breakin" : "breakin");
+            f_stopped = 1;
+        }
+        else if ( PP32_CPU_CUR_PC(pp32) == PP32_CPU_CUR_PC(pp32) )
+        {
+            unsigned int pc_value[64] = {0};
+
+            f_stopped = 1;
+            for ( i = 0; f_stopped && i < NUM_ENTITY(pc_value); i++ )
+            {
+                pc_value[i] = PP32_CPU_CUR_PC(pp32);
+                for ( j = 0; j < i; j++ )
+                    if ( pc_value[j] != pc_value[i] )
+                    {
+                        f_stopped = 0;
+                        break;
+                    }
+            }
+            if ( f_stopped )
+                sprintf(str, "hang");
+        }
+        if ( !f_stopped )
+            sprintf(str, "running");
+        cur_context = PP32_BRK_CUR_CONTEXT(pp32);
+        len += sprintf(page + off + len, "Context: %d, PC: 0x%04x, %s\n", cur_context, PP32_CPU_CUR_PC(pp32), str);
+
+        if ( PP32_CPU_USER_BREAKPOINT_MET(pp32) )
+        {
+            strlength = 0;
+            if ( PP32_BRK_PC_MET(pp32, 0) )
+                strlength += sprintf(str + strlength, "pc0");
+            if ( PP32_BRK_PC_MET(pp32, 1) )
+                strlength += sprintf(str + strlength, strlength ? " | pc1" : "pc1");
+            if ( PP32_BRK_DATA_ADDR_MET(pp32, 0) )
+                strlength += sprintf(str + strlength, strlength ? " | daddr0" : "daddr0");
+            if ( PP32_BRK_DATA_ADDR_MET(pp32, 1) )
+                strlength += sprintf(str + strlength, strlength ? " | daddr1" : "daddr1");
+            if ( PP32_BRK_DATA_VALUE_RD_MET(pp32, 0) )
+            {
+                strlength += sprintf(str + strlength, strlength ? " | rdval0" : "rdval0");
+                if ( PP32_BRK_DATA_VALUE_RD_LO_EQ(pp32, 0) )
+                {
+                    if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 0) )
+                        strlength += sprintf(str + strlength, " ==");
+                    else
+                        strlength += sprintf(str + strlength, " <=");
+                }
+                else if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 0) )
+                    strlength += sprintf(str + strlength, " >=");
+            }
+            if ( PP32_BRK_DATA_VALUE_RD_MET(pp32, 1) )
+            {
+                strlength += sprintf(str + strlength, strlength ? " | rdval1" : "rdval1");
+                if ( PP32_BRK_DATA_VALUE_RD_LO_EQ(pp32, 1) )
+                {
+                    if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 1) )
+                        strlength += sprintf(str + strlength, " ==");
+                    else
+                        strlength += sprintf(str + strlength, " <=");
+                }
+                else if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 1) )
+                    strlength += sprintf(str + strlength, " >=");
+            }
+            if ( PP32_BRK_DATA_VALUE_WR_MET(pp32, 0) )
+            {
+                strlength += sprintf(str + strlength, strlength ? " | wtval0" : "wtval0");
+                if ( PP32_BRK_DATA_VALUE_WR_LO_EQ(pp32, 0) )
+                {
+                    if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 0) )
+                        strlength += sprintf(str + strlength, " ==");
+                    else
+                        strlength += sprintf(str + strlength, " <=");
+                }
+                else if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 0) )
+                    strlength += sprintf(str + strlength, " >=");
+            }
+            if ( PP32_BRK_DATA_VALUE_WR_MET(pp32, 1) )
+            {
+                strlength += sprintf(str + strlength, strlength ? " | wtval1" : "wtval1");
+                if ( PP32_BRK_DATA_VALUE_WR_LO_EQ(pp32, 1) )
+                {
+                    if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 1) )
+                        strlength += sprintf(str + strlength, " ==");
+                    else
+                        strlength += sprintf(str + strlength, " <=");
+                }
+                else if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 1) )
+                    strlength += sprintf(str + strlength, " >=");
+            }
+            len += sprintf(page + off + len, "break reason: %s\n", str);
+        }
+
+        if ( f_stopped )
+        {
+            len += sprintf(page + off + len, "General Purpose Register (Context %d):\n", cur_context);
+            for ( i = 0; i < 4; i++ )
+            {
+                for ( j = 0; j < 4; j++ )
+                    len += sprintf(page + off + len, "   %2d: %08x", i + j * 4, *PP32_GP_CONTEXTi_REGn(pp32, cur_context, i + j * 4));
+                len += sprintf(page + off + len, "\n");
+            }
+        }
+
+        len += sprintf(page + off + len, "break out on: break in - %s, stop - %s\n",
+                                            PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN(pp32) ? stron : stroff,
+                                            PP32_CTRL_OPT_BREAKOUT_ON_STOP(pp32) ? stron : stroff);
+        len += sprintf(page + off + len, "     stop on: break in - %s, break point - %s\n",
+                                            PP32_CTRL_OPT_STOP_ON_BREAKIN(pp32) ? stron : stroff,
+                                            PP32_CTRL_OPT_STOP_ON_BREAKPOINT(pp32) ? stron : stroff);
+        len += sprintf(page + off + len, "breakpoint:\n");
+        len += sprintf(page + off + len, "     pc0: 0x%08x, %s\n", *PP32_BRK_PC(pp32, 0), PP32_BRK_GRPi_PCn(pp32, 0, 0) ? "group 0" : "off");
+        len += sprintf(page + off + len, "     pc1: 0x%08x, %s\n", *PP32_BRK_PC(pp32, 1), PP32_BRK_GRPi_PCn(pp32, 1, 1) ? "group 1" : "off");
+        len += sprintf(page + off + len, "  daddr0: 0x%08x, %s\n", *PP32_BRK_DATA_ADDR(pp32, 0), PP32_BRK_GRPi_DATA_ADDRn(pp32, 0, 0) ? "group 0" : "off");
+        len += sprintf(page + off + len, "  daddr1: 0x%08x, %s\n", *PP32_BRK_DATA_ADDR(pp32, 1), PP32_BRK_GRPi_DATA_ADDRn(pp32, 1, 1) ? "group 1" : "off");
+        len += sprintf(page + off + len, "  rdval0: 0x%08x\n", *PP32_BRK_DATA_VALUE_RD(pp32, 0));
+        len += sprintf(page + off + len, "  rdval1: 0x%08x\n", *PP32_BRK_DATA_VALUE_RD(pp32, 1));
+        len += sprintf(page + off + len, "  wrval0: 0x%08x\n", *PP32_BRK_DATA_VALUE_WR(pp32, 0));
+        len += sprintf(page + off + len, "  wrval1: 0x%08x\n", *PP32_BRK_DATA_VALUE_WR(pp32, 1));
+    }
+
+    *eof = 1;
+
+    return len;
+}
+
+static int proc_write_pp32(struct file *file, const char *buf, unsigned long count, void *data)
+{
+    char str[2048];
+    char *p;
+    int len, rlen;
+
+    int pp32 = 0;
+    u32 addr;
+
+    len = count < sizeof(str) ? count : sizeof(str) - 1;
+    rlen = len - copy_from_user(str, buf, len);
+    while ( rlen && str[rlen - 1] <= ' ' )
+        rlen--;
+    str[rlen] = 0;
+    for ( p = str; *p && *p <= ' '; p++, rlen-- );
+    if ( !*p )
+        return 0;
+
+    if ( strincmp(p, "pp32 ", 5) == 0 )
+    {
+        p += 5;
+        rlen -= 5;
+
+        while ( rlen > 0 && *p >= '0' && *p <= '9' )
+        {
+            pp32 += *p - '0';
+            p++;
+            rlen--;
+        }
+        while ( rlen > 0 && *p && *p <= ' ' )
+        {
+            p++;
+            rlen--;
+        }
+
+        if ( pp32 >= NUM_OF_PP32 )
+        {
+            printk(KERN_ERR __FILE__ ":%d:%s: incorrect pp32 index - %d\n", __LINE__, __FUNCTION__, pp32);
+            return count;
+        }
+    }
+
+    if ( stricmp(p, "start") == 0 )
+    {
+  #ifdef CONFIG_AMAZON_SE
+        *PP32_CTRL_CMD(pp32) = 0;
+  #endif
+        *PP32_CTRL_CMD(pp32) = PP32_CTRL_CMD_RESTART;
+    }
+    else if ( stricmp(p, "stop") == 0 )
+    {
+  #ifdef CONFIG_AMAZON_SE
+        *PP32_CTRL_CMD(pp32) = 0;
+  #endif
+        *PP32_CTRL_CMD(pp32) = PP32_CTRL_CMD_STOP;
+    }
+    else if ( stricmp(p, "step") == 0 )
+    {
+  #ifdef CONFIG_AMAZON_SE
+        *PP32_CTRL_CMD(pp32) = 0;
+  #endif
+        *PP32_CTRL_CMD(pp32) = PP32_CTRL_CMD_STEP;
+    }
+  #ifdef CONFIG_VR9
+    else if ( stricmp(p, "unfreeze") == 0 )
+        *PP32_FREEZE &= ~(1 << (pp32 << 4));
+    else if ( stricmp(p, "freeze") == 0 )
+        *PP32_FREEZE |= 1 << (pp32 << 4);
+  #else
+    else if ( stricmp(p, "unfreeze") == 0 )
+        *PP32_DBG_CTRL(pp32) = DBG_CTRL_RESTART;
+    else if ( stricmp(p, "freeze") == 0 )
+        *PP32_DBG_CTRL(pp32) = DBG_CTRL_STOP;
+  #endif
+    else if ( strincmp(p, "pc0 ", 4) == 0 )
+    {
+        p += 4;
+        rlen -= 4;
+        if ( stricmp(p, "off") == 0 )
+        {
+            *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_OFF(0, 0);
+            *PP32_BRK_PC_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN;
+            *PP32_BRK_PC(pp32, 0) = 0;
+        }
+        else
+        {
+            addr = get_number(&p, &rlen, 1);
+            *PP32_BRK_PC(pp32, 0) = addr;
+            *PP32_BRK_PC_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3);
+            *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_ON(0, 0);
+        }
+    }
+    else if ( strincmp(p, "pc1 ", 4) == 0 )
+    {
+        p += 4;
+        rlen -= 4;
+        if ( stricmp(p, "off") == 0 )
+        {
+            *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_OFF(1, 1);
+            *PP32_BRK_PC_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN;
+            *PP32_BRK_PC(pp32, 1) = 0;
+        }
+        else
+        {
+            addr = get_number(&p, &rlen, 1);
+            *PP32_BRK_PC(pp32, 1) = addr;
+            *PP32_BRK_PC_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3);
+            *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_ON(1, 1);
+        }
+    }
+    else if ( strincmp(p, "daddr0 ", 7) == 0 )
+    {
+        p += 7;
+        rlen -= 7;
+        if ( stricmp(p, "off") == 0 )
+        {
+            *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_OFF(0, 0);
+            *PP32_BRK_DATA_ADDR_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN;
+            *PP32_BRK_DATA_ADDR(pp32, 0) = 0;
+        }
+        else
+        {
+            addr = get_number(&p, &rlen, 1);
+            *PP32_BRK_DATA_ADDR(pp32, 0) = addr;
+            *PP32_BRK_DATA_ADDR_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3);
+            *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_ON(0, 0);
+        }
+    }
+    else if ( strincmp(p, "daddr1 ", 7) == 0 )
+    {
+        p += 7;
+        rlen -= 7;
+        if ( stricmp(p, "off") == 0 )
+        {
+            *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_OFF(1, 1);
+            *PP32_BRK_DATA_ADDR_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN;
+            *PP32_BRK_DATA_ADDR(pp32, 1) = 0;
+        }
+        else
+        {
+            addr = get_number(&p, &rlen, 1);
+            *PP32_BRK_DATA_ADDR(pp32, 1) = addr;
+            *PP32_BRK_DATA_ADDR_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3);
+            *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_ON(1, 1);
+        }
+    }
+    else
+    {
+
+        printk("echo \"<command>\" > /proc/driver/ifx_ptm/pp32\n");
+        printk("  command:\n");
+        printk("    unfreeze - unfreeze pp32\n");
+        printk("    freeze   - freeze pp32\n");
+        printk("    start    - run pp32\n");
+        printk("    stop     - stop pp32\n");
+        printk("    step     - run pp32 with one step only\n");
+        printk("    pc0      - pc0 <addr>/off, set break point PC0\n");
+        printk("    pc1      - pc1 <addr>/off, set break point PC1\n");
+        printk("    daddr0   - daddr0 <addr>/off, set break point data address 0\n");
+        printk("    daddr1   - daddr1 <addr>/off, set break point data address 1\n");
+        printk("    help     - print this screen\n");
+    }
+
+    if ( *PP32_BRK_TRIG(pp32) )
+        *PP32_CTRL_OPT(pp32) = PP32_CTRL_OPT_STOP_ON_BREAKPOINT_ON;
+    else
+        *PP32_CTRL_OPT(pp32) = PP32_CTRL_OPT_STOP_ON_BREAKPOINT_OFF;
+
+    return count;
+}
+
+#endif
+
+static int stricmp(const char *p1, const char *p2)
+{
+    int c1, c2;
+
+    while ( *p1 && *p2 )
+    {
+        c1 = *p1 >= 'A' && *p1 <= 'Z' ? *p1 + 'a' - 'A' : *p1;
+        c2 = *p2 >= 'A' && *p2 <= 'Z' ? *p2 + 'a' - 'A' : *p2;
+        if ( (c1 -= c2) )
+            return c1;
+        p1++;
+        p2++;
+    }
+
+    return *p1 - *p2;
+}
+
+static int strincmp(const char *p1, const char *p2, int n)
+{
+    int c1 = 0, c2;
+
+    while ( n && *p1 && *p2 )
+    {
+        c1 = *p1 >= 'A' && *p1 <= 'Z' ? *p1 + 'a' - 'A' : *p1;
+        c2 = *p2 >= 'A' && *p2 <= 'Z' ? *p2 + 'a' - 'A' : *p2;
+        if ( (c1 -= c2) )
+            return c1;
+        p1++;
+        p2++;
+        n--;
+    }
+
+    return n ? *p1 - *p2 : c1;
+}
+
+static int get_token(char **p1, char **p2, int *len, int *colon)
+{
+    int tlen = 0;
+
+    while ( *len && !((**p1 >= 'A' && **p1 <= 'Z') || (**p1 >= 'a' && **p1<= 'z')) )
+    {
+        (*p1)++;
+        (*len)--;
+    }
+    if ( !*len )
+        return 0;
+
+    if ( *colon )
+    {
+        *colon = 0;
+        *p2 = *p1;
+        while ( *len && **p2 > ' ' && **p2 != ',' )
+        {
+            if ( **p2 == ':' )
+            {
+                *colon = 1;
+                break;
+            }
+            (*p2)++;
+            (*len)--;
+            tlen++;
+        }
+        **p2 = 0;
+    }
+    else
+    {
+        *p2 = *p1;
+        while ( *len && **p2 > ' ' && **p2 != ',' )
+        {
+            (*p2)++;
+            (*len)--;
+            tlen++;
+        }
+        **p2 = 0;
+    }
+
+    return tlen;
+}
+
+static int get_number(char **p, int *len, int is_hex)
+{
+    int ret = 0;
+    int n = 0;
+
+    if ( (*p)[0] == '0' && (*p)[1] == 'x' )
+    {
+        is_hex = 1;
+        (*p) += 2;
+        (*len) -= 2;
+    }
+
+    if ( is_hex )
+    {
+        while ( *len && ((**p >= '0' && **p <= '9') || (**p >= 'a' && **p <= 'f') || (**p >= 'A' && **p <= 'F')) )
+        {
+            if ( **p >= '0' && **p <= '9' )
+                n = **p - '0';
+            else if ( **p >= 'a' && **p <= 'f' )
+               n = **p - 'a' + 10;
+            else if ( **p >= 'A' && **p <= 'F' )
+                n = **p - 'A' + 10;
+            ret = (ret << 4) | n;
+            (*p)++;
+            (*len)--;
+        }
+    }
+    else
+    {
+        while ( *len && **p >= '0' && **p <= '9' )
+        {
+            n = **p - '0';
+            ret = ret * 10 + n;
+            (*p)++;
+            (*len)--;
+        }
+    }
+
+    return ret;
+}
+
+static inline void ignore_space(char **p, int *len)
+{
+    while ( *len && (**p <= ' ' || **p == ':' || **p == '.' || **p == ',') )
+    {
+        (*p)++;
+        (*len)--;
+    }
+}
+
+
+
+/*
+ * ####################################
+ *           Global Function
+ * ####################################
+ */
+
+
+
+/*
+ * ####################################
+ *           Init/Cleanup API
+ * ####################################
+ */
+
+static int __init ifx_ptm_test_init(void)
+{
+    proc_file_create();
+
+    return 0;
+}
+
+static void __exit ifx_ptm_test_exit(void)
+{
+    proc_file_delete();
+}
+
+module_init(ifx_ptm_test_init);
+module_exit(ifx_ptm_test_exit);
+
+#endif
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.c b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.c
new file mode 100644
index 0000000..1a5ae8a
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.c
@@ -0,0 +1,1080 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_vdsl.c
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver common source file (core functions for VR9)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/ctype.h>
+#include <linux/errno.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/ioctl.h>
+#include <linux/etherdevice.h>
+#include <linux/interrupt.h>
+
+#include "ifxmips_ptm_vdsl.h"
+#include <lantiq_soc.h>
+
+#define MODULE_PARM_ARRAY(a, b)   module_param_array(a, int, NULL, 0)
+#define MODULE_PARM(a, b)         module_param(a, int, 0)
+
+static int wanqos_en = 0;
+static int queue_gamma_map[4] = {0xFE, 0x01, 0x00, 0x00};
+
+MODULE_PARM(wanqos_en, "i");
+MODULE_PARM_DESC(wanqos_en, "WAN QoS support, 1 - enabled, 0 - disabled.");
+
+MODULE_PARM_ARRAY(queue_gamma_map, "4-4i");
+MODULE_PARM_DESC(queue_gamma_map, "TX QoS queues mapping to 4 TX Gamma interfaces.");
+
+extern int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *);
+extern int (*ifx_mei_atm_showtime_exit)(void);
+extern int ifx_mei_atm_showtime_check(int *is_showtime, struct port_cell_info *port_cell, void **xdata_addr);
+
+static int g_showtime = 0;
+static void *g_xdata_addr = NULL;
+
+
+#define ENABLE_TMP_DBG                          0
+
+unsigned long cgu_get_pp32_clock(void)
+{
+	struct clk *c = clk_get_ppe();
+	unsigned long rate = clk_get_rate(c);
+	clk_put(c);
+	return rate;
+}
+
+static void ptm_setup(struct net_device *, int);
+static struct net_device_stats *ptm_get_stats(struct net_device *);
+static int ptm_open(struct net_device *);
+static int ptm_stop(struct net_device *);
+  static unsigned int ptm_poll(int, unsigned int);
+  static int ptm_napi_poll(struct napi_struct *, int);
+static int ptm_hard_start_xmit(struct sk_buff *, struct net_device *);
+static int ptm_ioctl(struct net_device *, struct ifreq *, int);
+static void ptm_tx_timeout(struct net_device *);
+
+static inline struct sk_buff* alloc_skb_rx(void);
+static inline struct sk_buff* alloc_skb_tx(unsigned int);
+static inline struct sk_buff *get_skb_pointer(unsigned int);
+static inline int get_tx_desc(unsigned int, unsigned int *);
+
+/*
+ *  Mailbox handler and signal function
+ */
+static irqreturn_t mailbox_irq_handler(int, void *);
+
+/*
+ *  Tasklet to Handle Swap Descriptors
+ */
+static void do_swap_desc_tasklet(unsigned long);
+
+
+/*
+ *  Init & clean-up functions
+ */
+static inline int init_priv_data(void);
+static inline void clear_priv_data(void);
+static inline int init_tables(void);
+static inline void clear_tables(void);
+
+static int g_wanqos_en = 0;
+
+static int g_queue_gamma_map[4];
+
+static struct ptm_priv_data g_ptm_priv_data;
+
+static struct net_device_ops g_ptm_netdev_ops = {
+    .ndo_get_stats       = ptm_get_stats,
+    .ndo_open            = ptm_open,
+    .ndo_stop            = ptm_stop,
+    .ndo_start_xmit      = ptm_hard_start_xmit,
+    .ndo_validate_addr   = eth_validate_addr,
+    .ndo_set_mac_address = eth_mac_addr,
+    .ndo_change_mtu      = eth_change_mtu,
+    .ndo_do_ioctl        = ptm_ioctl,
+    .ndo_tx_timeout      = ptm_tx_timeout,
+};
+
+static struct net_device *g_net_dev[1] = {0};
+static char *g_net_dev_name[1] = {"ptm0"};
+
+static int g_ptm_prio_queue_map[8];
+
+static DECLARE_TASKLET(g_swap_desc_tasklet, do_swap_desc_tasklet, 0);
+
+
+unsigned int ifx_ptm_dbg_enable = DBG_ENABLE_MASK_ERR;
+
+/*
+ * ####################################
+ *            Local Function
+ * ####################################
+ */
+
+static void ptm_setup(struct net_device *dev, int ndev)
+{
+    dev->netdev_ops      = &g_ptm_netdev_ops;
+    netif_napi_add(dev, &g_ptm_priv_data.itf[ndev].napi, ptm_napi_poll, 16);
+    dev->watchdog_timeo  = ETH_WATCHDOG_TIMEOUT;
+
+    dev->dev_addr[0] = 0x00;
+    dev->dev_addr[1] = 0x20;
+	dev->dev_addr[2] = 0xda;
+	dev->dev_addr[3] = 0x86;
+	dev->dev_addr[4] = 0x23;
+	dev->dev_addr[5] = 0x75 + ndev;
+}
+
+static struct net_device_stats *ptm_get_stats(struct net_device *dev)
+{
+   struct net_device_stats *s;
+  
+    if ( dev != g_net_dev[0] )
+        return NULL;
+s = &g_ptm_priv_data.itf[0].stats;
+
+    return s;
+}
+
+static int ptm_open(struct net_device *dev)
+{
+    ASSERT(dev == g_net_dev[0], "incorrect device");
+
+    napi_enable(&g_ptm_priv_data.itf[0].napi);
+
+    IFX_REG_W32_MASK(0, 1, MBOX_IGU1_IER);
+
+    netif_start_queue(dev);
+
+    return 0;
+}
+
+static int ptm_stop(struct net_device *dev)
+{
+    ASSERT(dev == g_net_dev[0], "incorrect device");
+
+    IFX_REG_W32_MASK(1 | (1 << 17), 0, MBOX_IGU1_IER);
+
+    napi_disable(&g_ptm_priv_data.itf[0].napi);
+
+    netif_stop_queue(dev);
+
+    return 0;
+}
+
+static unsigned int ptm_poll(int ndev, unsigned int work_to_do)
+{
+    unsigned int work_done = 0;
+    volatile struct rx_descriptor *desc;
+    struct rx_descriptor reg_desc;
+    struct sk_buff *skb, *new_skb;
+
+    ASSERT(ndev >= 0 && ndev < ARRAY_SIZE(g_net_dev), "ndev = %d (wrong value)", ndev);
+
+    while ( work_done < work_to_do ) {
+	desc = &WAN_RX_DESC_BASE[g_ptm_priv_data.itf[0].rx_desc_pos];
+        if ( desc->own /* || !desc->c */ )  //  if PP32 hold descriptor or descriptor not completed
+            break;
+        if ( ++g_ptm_priv_data.itf[0].rx_desc_pos == WAN_RX_DESC_NUM )
+            g_ptm_priv_data.itf[0].rx_desc_pos = 0;
+
+        reg_desc = *desc;
+        skb = get_skb_pointer(reg_desc.dataptr);
+        ASSERT(skb != NULL, "invalid pointer skb == NULL");
+
+        new_skb = alloc_skb_rx();
+        if ( new_skb != NULL ) {
+            skb_reserve(skb, reg_desc.byteoff);
+            skb_put(skb, reg_desc.datalen);
+
+            //  parse protocol header
+            skb->dev = g_net_dev[0];
+            skb->protocol = eth_type_trans(skb, skb->dev);
+
+            g_net_dev[0]->last_rx = jiffies;
+
+            netif_receive_skb(skb);
+
+            g_ptm_priv_data.itf[0].stats.rx_packets++;
+            g_ptm_priv_data.itf[0].stats.rx_bytes += reg_desc.datalen;
+
+            reg_desc.dataptr = (unsigned int)new_skb->data & 0x0FFFFFFF;
+            reg_desc.byteoff = RX_HEAD_MAC_ADDR_ALIGNMENT;
+        }
+
+        reg_desc.datalen = RX_MAX_BUFFER_SIZE - RX_HEAD_MAC_ADDR_ALIGNMENT;
+        reg_desc.own     = 1;
+        reg_desc.c       = 0;
+
+        /*  write discriptor to memory  */
+        *((volatile unsigned int *)desc + 1) = *((unsigned int *)&reg_desc + 1);
+        wmb();
+        *(volatile unsigned int *)desc = *(unsigned int *)&reg_desc;
+
+        work_done++;
+    }
+
+    return work_done;
+}
+
+static int ptm_napi_poll(struct napi_struct *napi, int budget)
+{
+    int ndev = 0;
+    unsigned int work_done;
+
+    work_done = ptm_poll(ndev, budget);
+
+    //  interface down
+    if ( !netif_running(napi->dev) ) {
+        napi_complete(napi);
+        return work_done;
+    }
+
+    //  clear interrupt
+    IFX_REG_W32_MASK(0, 1, MBOX_IGU1_ISRC);
+    //  no more traffic
+    if ( WAN_RX_DESC_BASE[g_ptm_priv_data.itf[0].rx_desc_pos].own ) {   //  if PP32 hold descriptor
+        napi_complete(napi);
+        IFX_REG_W32_MASK(0, 1, MBOX_IGU1_IER);
+        return work_done;
+    }
+
+    //  next round
+    return work_done;
+}
+
+static int ptm_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+    unsigned int f_full;
+    int desc_base;
+    volatile struct tx_descriptor *desc;
+    struct tx_descriptor reg_desc = {0};
+    struct sk_buff *skb_to_free;
+    unsigned int byteoff;
+
+    ASSERT(dev == g_net_dev[0], "incorrect device");
+
+    if ( !g_showtime ) {
+        err("not in showtime");
+        goto PTM_HARD_START_XMIT_FAIL;
+    }
+
+    /*  allocate descriptor */
+    desc_base = get_tx_desc(0, &f_full);
+    if ( f_full ) {
+        dev->trans_start = jiffies;
+        netif_stop_queue(dev);
+
+        IFX_REG_W32_MASK(0, 1 << 17, MBOX_IGU1_ISRC);
+        IFX_REG_W32_MASK(0, 1 << 17, MBOX_IGU1_IER);
+    }
+    if ( desc_base < 0 )
+        goto PTM_HARD_START_XMIT_FAIL;
+    desc = &CPU_TO_WAN_TX_DESC_BASE[desc_base];
+
+    byteoff = (unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1);
+    if ( skb_headroom(skb) < sizeof(struct sk_buff *) + byteoff || skb_cloned(skb) ) {
+        struct sk_buff *new_skb;
+
+        ASSERT(skb_headroom(skb) >= sizeof(struct sk_buff *) + byteoff, "skb_headroom(skb) < sizeof(struct sk_buff *) + byteoff");
+        ASSERT(!skb_cloned(skb), "skb is cloned");
+
+        new_skb = alloc_skb_tx(skb->len);
+        if ( new_skb == NULL ) {
+            dbg("no memory");
+            goto ALLOC_SKB_TX_FAIL;
+        }
+        skb_put(new_skb, skb->len);
+        memcpy(new_skb->data, skb->data, skb->len);
+        dev_kfree_skb_any(skb);
+        skb = new_skb;
+        byteoff = (unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1);
+        /*  write back to physical memory   */
+        dma_cache_wback((unsigned long)skb->data, skb->len);
+    }
+
+    *(struct sk_buff **)((unsigned int)skb->data - byteoff - sizeof(struct sk_buff *)) = skb;
+    /*  write back to physical memory   */
+    dma_cache_wback((unsigned long)skb->data - byteoff - sizeof(struct sk_buff *), skb->len + byteoff + sizeof(struct sk_buff *));
+
+    /*  free previous skb   */
+    skb_to_free = get_skb_pointer(desc->dataptr);
+    if ( skb_to_free != NULL )
+        dev_kfree_skb_any(skb_to_free);
+
+    /*  update descriptor   */
+    reg_desc.small   = 0;
+    reg_desc.dataptr = (unsigned int)skb->data & (0x0FFFFFFF ^ (DATA_BUFFER_ALIGNMENT - 1));
+    reg_desc.datalen = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
+    reg_desc.qid     = g_ptm_prio_queue_map[skb->priority > 7 ? 7 : skb->priority];
+    reg_desc.byteoff = byteoff;
+    reg_desc.own     = 1;
+    reg_desc.c       = 1;
+    reg_desc.sop = reg_desc.eop = 1;
+
+    /*  update MIB  */
+    g_ptm_priv_data.itf[0].stats.tx_packets++;
+    g_ptm_priv_data.itf[0].stats.tx_bytes += reg_desc.datalen;
+
+    /*  write discriptor to memory  */
+    *((volatile unsigned int *)desc + 1) = *((unsigned int *)&reg_desc + 1);
+    wmb();
+    *(volatile unsigned int *)desc = *(unsigned int *)&reg_desc;
+
+    dev->trans_start = jiffies;
+
+    return 0;
+
+ALLOC_SKB_TX_FAIL:
+PTM_HARD_START_XMIT_FAIL:
+    dev_kfree_skb_any(skb);
+    g_ptm_priv_data.itf[0].stats.tx_dropped++;
+    return 0;
+}
+
+static int ptm_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+{
+    ASSERT(dev == g_net_dev[0], "incorrect device");
+
+    switch ( cmd )
+    {
+    case IFX_PTM_MIB_CW_GET:
+	((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxNoIdleCodewords   = IFX_REG_R32(DREG_AR_CELL0) + IFX_REG_R32(DREG_AR_CELL1);
+        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxIdleCodewords     = IFX_REG_R32(DREG_AR_IDLE_CNT0) + IFX_REG_R32(DREG_AR_IDLE_CNT1);
+        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxCodingViolation   = IFX_REG_R32(DREG_AR_CVN_CNT0) + IFX_REG_R32(DREG_AR_CVN_CNT1) + IFX_REG_R32(DREG_AR_CVNP_CNT0) + IFX_REG_R32(DREG_AR_CVNP_CNT1);
+        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifTxNoIdleCodewords   = IFX_REG_R32(DREG_AT_CELL0) + IFX_REG_R32(DREG_AT_CELL1);
+        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifTxIdleCodewords     = IFX_REG_R32(DREG_AT_IDLE_CNT0) + IFX_REG_R32(DREG_AT_IDLE_CNT1);
+        break;
+    case IFX_PTM_MIB_FRAME_GET:
+	{
+            PTM_FRAME_MIB_T data = {0};
+            int i;
+
+            data.RxCorrect = IFX_REG_R32(DREG_AR_HEC_CNT0) + IFX_REG_R32(DREG_AR_HEC_CNT1) + IFX_REG_R32(DREG_AR_AIIDLE_CNT0) + IFX_REG_R32(DREG_AR_AIIDLE_CNT1);
+            for ( i = 0; i < 4; i++ )
+                data.RxDropped += WAN_RX_MIB_TABLE(i)->wrx_dropdes_pdu;
+            for ( i = 0; i < 8; i++ )
+                data.TxSend    += WAN_TX_MIB_TABLE(i)->wtx_total_pdu;
+
+            *((PTM_FRAME_MIB_T *)ifr->ifr_data) = data;
+        }
+        break;
+    case IFX_PTM_CFG_GET:
+	//  use bear channel 0 preemption gamma interface settings
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcPresent = 1;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcCheck   = RX_GAMMA_ITF_CFG(0)->rx_eth_fcs_ver_dis == 0 ? 1 : 0;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcCheck    = RX_GAMMA_ITF_CFG(0)->rx_tc_crc_ver_dis == 0 ? 1 : 0;;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen      = RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size == 0 ? 0 : (RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size * 16);
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxEthCrcGen     = TX_GAMMA_ITF_CFG(0)->tx_eth_fcs_gen_dis == 0 ? 1 : 0;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcGen      = TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size == 0 ? 0 : 1;
+        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen      = TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size == 0 ? 0 : (TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size * 16);
+        break;
+    case IFX_PTM_CFG_SET:
+	{
+            int i;
+
+            for ( i = 0; i < 4; i++ ) {
+                RX_GAMMA_ITF_CFG(i)->rx_eth_fcs_ver_dis = ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcCheck ? 0 : 1;
+
+                RX_GAMMA_ITF_CFG(0)->rx_tc_crc_ver_dis = ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcCheck ? 0 : 1;
+
+                switch ( ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen ) {
+                    case 16: RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size = 1; break;
+                    case 32: RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size = 2; break;
+                    default: RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size = 0;
+                }
+
+                TX_GAMMA_ITF_CFG(0)->tx_eth_fcs_gen_dis = ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxEthCrcGen ? 0 : 1;
+
+                if ( ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcGen ) {
+                    switch ( ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen ) {
+                        case 16: TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size = 1; break;
+                        case 32: TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size = 2; break;
+                        default: TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size = 0;
+                    }
+                }
+                else
+                    TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size = 0;
+            }
+        }
+        break;
+    case IFX_PTM_MAP_PKT_PRIO_TO_Q:
+        {
+            struct ppe_prio_q_map cmd;
+
+            if ( copy_from_user(&cmd, ifr->ifr_data, sizeof(cmd)) )
+                return -EFAULT;
+
+            if ( cmd.pkt_prio < 0 || cmd.pkt_prio >= ARRAY_SIZE(g_ptm_prio_queue_map) )
+                return -EINVAL;
+
+            if ( cmd.qid < 0 || cmd.qid >= g_wanqos_en )
+                return -EINVAL;
+
+            g_ptm_prio_queue_map[cmd.pkt_prio] = cmd.qid;
+        }
+        break;
+    default:
+        return -EOPNOTSUPP;
+    }
+
+    return 0;
+}
+
+static void ptm_tx_timeout(struct net_device *dev)
+{
+    ASSERT(dev == g_net_dev[0], "incorrect device");
+
+    /*  disable TX irq, release skb when sending new packet */
+    IFX_REG_W32_MASK(1 << 17, 0, MBOX_IGU1_IER);
+
+    /*  wake up TX queue    */
+    netif_wake_queue(dev);
+
+    return;
+}
+
+static inline struct sk_buff* alloc_skb_rx(void)
+{
+    struct sk_buff *skb;
+
+    /*  allocate memroy including trailer and padding   */
+    skb = dev_alloc_skb(RX_MAX_BUFFER_SIZE + DATA_BUFFER_ALIGNMENT);
+    if ( skb != NULL ) {
+        /*  must be burst length alignment and reserve two more bytes for MAC address alignment  */
+        if ( ((unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1)) != 0 )
+            skb_reserve(skb, ~((unsigned int)skb->data + (DATA_BUFFER_ALIGNMENT - 1)) & (DATA_BUFFER_ALIGNMENT - 1));
+        /*  pub skb in reserved area "skb->data - 4"    */
+        *((struct sk_buff **)skb->data - 1) = skb;
+        wmb();
+        /*  write back and invalidate cache    */
+        dma_cache_wback_inv((unsigned long)skb->data - sizeof(skb), sizeof(skb));
+        /*  invalidate cache    */
+        dma_cache_inv((unsigned long)skb->data, (unsigned int)skb->end - (unsigned int)skb->data);
+    }
+
+    return skb;
+}
+
+static inline struct sk_buff* alloc_skb_tx(unsigned int size)
+{
+    struct sk_buff *skb;
+
+    /*  allocate memory including padding   */
+    size = RX_MAX_BUFFER_SIZE;
+    size = (size + DATA_BUFFER_ALIGNMENT - 1) & ~(DATA_BUFFER_ALIGNMENT - 1);
+    skb = dev_alloc_skb(size + DATA_BUFFER_ALIGNMENT);
+    /*  must be burst length alignment  */
+    if ( skb != NULL )
+        skb_reserve(skb, ~((unsigned int)skb->data + (DATA_BUFFER_ALIGNMENT - 1)) & (DATA_BUFFER_ALIGNMENT - 1));
+    return skb;
+}
+
+static inline struct sk_buff *get_skb_pointer(unsigned int dataptr)
+{
+    unsigned int skb_dataptr;
+    struct sk_buff *skb;
+
+    //  usually, CPE memory is less than 256M bytes
+    //  so NULL means invalid pointer
+    if ( dataptr == 0 ) {
+        dbg("dataptr is 0, it's supposed to be invalid pointer");
+        return NULL;
+    }
+
+    skb_dataptr = (dataptr - 4) | KSEG1;
+    skb = *(struct sk_buff **)skb_dataptr;
+
+    ASSERT((unsigned int)skb >= KSEG0, "invalid skb - skb = %#08x, dataptr = %#08x", (unsigned int)skb, dataptr);
+    ASSERT((((unsigned int)skb->data & (0x0FFFFFFF ^ (DATA_BUFFER_ALIGNMENT - 1))) | KSEG1) == (dataptr | KSEG1), "invalid skb - skb = %#08x, skb->data = %#08x, dataptr = %#08x", (unsigned int)skb, (unsigned int)skb->data, dataptr);
+
+    return skb;
+}
+
+static inline int get_tx_desc(unsigned int itf, unsigned int *f_full)
+{
+    int desc_base = -1;
+    struct ptm_itf *p_itf = &g_ptm_priv_data.itf[0];
+
+    //  assume TX is serial operation
+    //  no protection provided
+
+    *f_full = 1;
+
+    if ( CPU_TO_WAN_TX_DESC_BASE[p_itf->tx_desc_pos].own == 0 ) {
+        desc_base = p_itf->tx_desc_pos;
+        if ( ++(p_itf->tx_desc_pos) == CPU_TO_WAN_TX_DESC_NUM )
+            p_itf->tx_desc_pos = 0;
+        if ( CPU_TO_WAN_TX_DESC_BASE[p_itf->tx_desc_pos].own == 0 )
+            *f_full = 0;
+    }
+
+    return desc_base;
+}
+
+static irqreturn_t mailbox_irq_handler(int irq, void *dev_id)
+{
+    unsigned int isr;
+    int i;
+
+    isr = IFX_REG_R32(MBOX_IGU1_ISR);
+    IFX_REG_W32(isr, MBOX_IGU1_ISRC);
+    isr &= IFX_REG_R32(MBOX_IGU1_IER);
+
+            if (isr & BIT(0)) {
+                IFX_REG_W32_MASK(1, 0, MBOX_IGU1_IER);
+                napi_schedule(&g_ptm_priv_data.itf[0].napi);
+#if defined(ENABLE_TMP_DBG) && ENABLE_TMP_DBG
+                {
+                    volatile struct rx_descriptor *desc = &WAN_RX_DESC_BASE[g_ptm_priv_data.itf[0].rx_desc_pos];
+
+                    if ( desc->own ) {  //  PP32 hold
+                        err("invalid interrupt");
+                    }
+                }
+#endif
+            }
+	   if (isr & BIT(16)) {
+                IFX_REG_W32_MASK(1 << 16, 0, MBOX_IGU1_IER);
+                tasklet_hi_schedule(&g_swap_desc_tasklet);
+            }
+	    if (isr & BIT(17)) {
+                IFX_REG_W32_MASK(1 << 17, 0, MBOX_IGU1_IER);
+                netif_wake_queue(g_net_dev[0]);
+        	}
+
+    return IRQ_HANDLED;
+}
+
+static void do_swap_desc_tasklet(unsigned long arg)
+{
+    int budget = 32;
+    volatile struct tx_descriptor *desc;
+    struct sk_buff *skb;
+    unsigned int byteoff;
+
+    while ( budget-- > 0 ) {
+	if ( WAN_SWAP_DESC_BASE[g_ptm_priv_data.itf[0].tx_swap_desc_pos].own )  //  if PP32 hold descriptor
+            break;
+
+        desc = &WAN_SWAP_DESC_BASE[g_ptm_priv_data.itf[0].tx_swap_desc_pos];
+        if ( ++g_ptm_priv_data.itf[0].tx_swap_desc_pos == WAN_SWAP_DESC_NUM )
+            g_ptm_priv_data.itf[0].tx_swap_desc_pos = 0;
+
+        skb = get_skb_pointer(desc->dataptr);
+        if ( skb != NULL )
+            dev_kfree_skb_any(skb);
+
+        skb = alloc_skb_tx(RX_MAX_BUFFER_SIZE);
+        if ( skb == NULL )
+            panic("can't allocate swap buffer for PPE firmware use\n");
+        byteoff = (unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1);
+        *(struct sk_buff **)((unsigned int)skb->data - byteoff - sizeof(struct sk_buff *)) = skb;
+
+        desc->dataptr = (unsigned int)skb->data & 0x0FFFFFFF;
+        desc->own = 1;
+    }
+
+    //  clear interrupt
+    IFX_REG_W32_MASK(0, 16, MBOX_IGU1_ISRC);
+    //  no more skb to be replaced
+    if ( WAN_SWAP_DESC_BASE[g_ptm_priv_data.itf[0].tx_swap_desc_pos].own ) {    //  if PP32 hold descriptor
+        IFX_REG_W32_MASK(0, 1 << 16, MBOX_IGU1_IER);
+        return;
+    }
+
+    tasklet_hi_schedule(&g_swap_desc_tasklet);
+    return;
+}
+
+
+static inline int ifx_ptm_version(char *buf)
+{
+    int len = 0;
+    unsigned int major, minor;
+
+    ifx_ptm_get_fw_ver(&major, &minor);
+
+    len += sprintf(buf + len, "PTM %d.%d.%d", IFX_PTM_VER_MAJOR, IFX_PTM_VER_MID, IFX_PTM_VER_MINOR);
+    len += sprintf(buf + len, "    PTM (E1) firmware version %d.%d\n", major, minor);
+
+    return len;
+}
+
+static inline int init_priv_data(void)
+{
+    int i, j;
+
+    g_wanqos_en = wanqos_en ? wanqos_en : 8;
+    if ( g_wanqos_en > 8 )
+        g_wanqos_en = 8;
+
+    for ( i = 0; i < ARRAY_SIZE(g_queue_gamma_map); i++ )
+    {
+        g_queue_gamma_map[i] = queue_gamma_map[i] & ((1 << g_wanqos_en) - 1);
+        for ( j = 0; j < i; j++ )
+            g_queue_gamma_map[i] &= ~g_queue_gamma_map[j];
+    }
+
+    memset(&g_ptm_priv_data, 0, sizeof(g_ptm_priv_data));
+
+    {
+        int max_packet_priority = ARRAY_SIZE(g_ptm_prio_queue_map);
+        int tx_num_q;
+        int q_step, q_accum, p_step;
+
+        tx_num_q = __ETH_WAN_TX_QUEUE_NUM;
+        q_step = tx_num_q - 1;
+        p_step = max_packet_priority - 1;
+        for ( j = 0, q_accum = 0; j < max_packet_priority; j++, q_accum += q_step )
+            g_ptm_prio_queue_map[j] = q_step - (q_accum + (p_step >> 1)) / p_step;
+    }
+
+    return 0;
+}
+
+static inline void clear_priv_data(void)
+{
+}
+
+static inline int init_tables(void)
+{
+    struct sk_buff *skb_pool[WAN_RX_DESC_NUM] = {0};
+    struct cfg_std_data_len cfg_std_data_len = {0};
+    struct tx_qos_cfg tx_qos_cfg = {0};
+    struct psave_cfg psave_cfg = {0};
+    struct eg_bwctrl_cfg eg_bwctrl_cfg = {0};
+    struct test_mode test_mode = {0};
+    struct rx_bc_cfg rx_bc_cfg = {0};
+    struct tx_bc_cfg tx_bc_cfg = {0};
+    struct gpio_mode gpio_mode = {0};
+    struct gpio_wm_cfg gpio_wm_cfg = {0};
+    struct rx_gamma_itf_cfg rx_gamma_itf_cfg = {0};
+    struct tx_gamma_itf_cfg tx_gamma_itf_cfg = {0};
+    struct wtx_qos_q_desc_cfg wtx_qos_q_desc_cfg = {0};
+    struct rx_descriptor rx_desc = {0};
+    struct tx_descriptor tx_desc = {0};
+    int i;
+
+    for ( i = 0; i < WAN_RX_DESC_NUM; i++ ) {
+        skb_pool[i] = alloc_skb_rx();
+        if ( skb_pool[i] == NULL )
+            goto ALLOC_SKB_RX_FAIL;
+    }
+
+    cfg_std_data_len.byte_off = RX_HEAD_MAC_ADDR_ALIGNMENT; //  this field replaces byte_off in rx descriptor of VDSL ingress
+    cfg_std_data_len.data_len = 1600;
+    *CFG_STD_DATA_LEN = cfg_std_data_len;
+
+    tx_qos_cfg.time_tick    = cgu_get_pp32_clock() / 62500; //  16 * (cgu_get_pp32_clock() / 1000000)
+    tx_qos_cfg.overhd_bytes = 0;
+    tx_qos_cfg.eth1_eg_qnum = __ETH_WAN_TX_QUEUE_NUM;
+    tx_qos_cfg.eth1_burst_chk = 1;
+    tx_qos_cfg.eth1_qss     = 0;
+    tx_qos_cfg.shape_en     = 0;    //  disable
+    tx_qos_cfg.wfq_en       = 0;    //  strict priority
+    *TX_QOS_CFG = tx_qos_cfg;
+
+    psave_cfg.start_state   = 0;
+    psave_cfg.sleep_en      = 1;    //  enable sleep mode
+    *PSAVE_CFG = psave_cfg;
+
+    eg_bwctrl_cfg.fdesc_wm  = 16;
+    eg_bwctrl_cfg.class_len = 128;
+    *EG_BWCTRL_CFG = eg_bwctrl_cfg;
+
+    //*GPIO_ADDR = (unsigned int)IFX_GPIO_P0_OUT;
+    *GPIO_ADDR = (unsigned int)0x00000000;  //  disabled by default
+
+    gpio_mode.gpio_bit_bc1 = 2;
+    gpio_mode.gpio_bit_bc0 = 1;
+    gpio_mode.gpio_bc1_en  = 0;
+    gpio_mode.gpio_bc0_en  = 0;
+    *GPIO_MODE = gpio_mode;
+
+    gpio_wm_cfg.stop_wm_bc1  = 2;
+    gpio_wm_cfg.start_wm_bc1 = 4;
+    gpio_wm_cfg.stop_wm_bc0  = 2;
+    gpio_wm_cfg.start_wm_bc0 = 4;
+    *GPIO_WM_CFG = gpio_wm_cfg;
+
+    test_mode.mib_clear_mode    = 0;
+    test_mode.test_mode         = 0;
+    *TEST_MODE = test_mode;
+
+    rx_bc_cfg.local_state   = 0;
+    rx_bc_cfg.remote_state  = 0;
+    rx_bc_cfg.to_false_th   = 7;
+    rx_bc_cfg.to_looking_th = 3;
+    *RX_BC_CFG(0) = rx_bc_cfg;
+    *RX_BC_CFG(1) = rx_bc_cfg;
+
+    tx_bc_cfg.fill_wm   = 2;
+    tx_bc_cfg.uflw_wm   = 2;
+    *TX_BC_CFG(0) = tx_bc_cfg;
+    *TX_BC_CFG(1) = tx_bc_cfg;
+
+    rx_gamma_itf_cfg.receive_state      = 0;
+    rx_gamma_itf_cfg.rx_min_len         = 60;
+    rx_gamma_itf_cfg.rx_pad_en          = 1;
+    rx_gamma_itf_cfg.rx_eth_fcs_ver_dis = 0;
+    rx_gamma_itf_cfg.rx_rm_eth_fcs      = 1;
+    rx_gamma_itf_cfg.rx_tc_crc_ver_dis  = 0;
+    rx_gamma_itf_cfg.rx_tc_crc_size     = 1;
+    rx_gamma_itf_cfg.rx_eth_fcs_result  = 0xC704DD7B;
+    rx_gamma_itf_cfg.rx_tc_crc_result   = 0x1D0F1D0F;
+    rx_gamma_itf_cfg.rx_crc_cfg         = 0x2500;
+    rx_gamma_itf_cfg.rx_eth_fcs_init_value  = 0xFFFFFFFF;
+    rx_gamma_itf_cfg.rx_tc_crc_init_value   = 0x0000FFFF;
+    rx_gamma_itf_cfg.rx_max_len_sel     = 0;
+    rx_gamma_itf_cfg.rx_edit_num2       = 0;
+    rx_gamma_itf_cfg.rx_edit_pos2       = 0;
+    rx_gamma_itf_cfg.rx_edit_type2      = 0;
+    rx_gamma_itf_cfg.rx_edit_en2        = 0;
+    rx_gamma_itf_cfg.rx_edit_num1       = 0;
+    rx_gamma_itf_cfg.rx_edit_pos1       = 0;
+    rx_gamma_itf_cfg.rx_edit_type1      = 0;
+    rx_gamma_itf_cfg.rx_edit_en1        = 0;
+    rx_gamma_itf_cfg.rx_inserted_bytes_1l   = 0;
+    rx_gamma_itf_cfg.rx_inserted_bytes_1h   = 0;
+    rx_gamma_itf_cfg.rx_inserted_bytes_2l   = 0;
+    rx_gamma_itf_cfg.rx_inserted_bytes_2h   = 0;
+    rx_gamma_itf_cfg.rx_len_adj         = -6;
+    for ( i = 0; i < 4; i++ )
+        *RX_GAMMA_ITF_CFG(i) = rx_gamma_itf_cfg;
+
+    tx_gamma_itf_cfg.tx_len_adj         = 6;
+    tx_gamma_itf_cfg.tx_crc_off_adj     = 6;
+    tx_gamma_itf_cfg.tx_min_len         = 0;
+    tx_gamma_itf_cfg.tx_eth_fcs_gen_dis = 0;
+    tx_gamma_itf_cfg.tx_tc_crc_size     = 1;
+    tx_gamma_itf_cfg.tx_crc_cfg         = 0x2F00;
+    tx_gamma_itf_cfg.tx_eth_fcs_init_value  = 0xFFFFFFFF;
+    tx_gamma_itf_cfg.tx_tc_crc_init_value   = 0x0000FFFF;
+    for ( i = 0; i < ARRAY_SIZE(g_queue_gamma_map); i++ ) {
+        tx_gamma_itf_cfg.queue_mapping = g_queue_gamma_map[i];
+        *TX_GAMMA_ITF_CFG(i) = tx_gamma_itf_cfg;
+    }
+
+    for ( i = 0; i < __ETH_WAN_TX_QUEUE_NUM; i++ ) {
+        wtx_qos_q_desc_cfg.length = WAN_TX_DESC_NUM;
+        wtx_qos_q_desc_cfg.addr   = __ETH_WAN_TX_DESC_BASE(i);
+        *WTX_QOS_Q_DESC_CFG(i) = wtx_qos_q_desc_cfg;
+    }
+
+    //  default TX queue QoS config is all ZERO
+
+    //  TX Ctrl K Table
+    IFX_REG_W32(0x90111293, TX_CTRL_K_TABLE(0));
+    IFX_REG_W32(0x14959617, TX_CTRL_K_TABLE(1));
+    IFX_REG_W32(0x18999A1B, TX_CTRL_K_TABLE(2));
+    IFX_REG_W32(0x9C1D1E9F, TX_CTRL_K_TABLE(3));
+    IFX_REG_W32(0xA02122A3, TX_CTRL_K_TABLE(4));
+    IFX_REG_W32(0x24A5A627, TX_CTRL_K_TABLE(5));
+    IFX_REG_W32(0x28A9AA2B, TX_CTRL_K_TABLE(6));
+    IFX_REG_W32(0xAC2D2EAF, TX_CTRL_K_TABLE(7));
+    IFX_REG_W32(0x30B1B233, TX_CTRL_K_TABLE(8));
+    IFX_REG_W32(0xB43536B7, TX_CTRL_K_TABLE(9));
+    IFX_REG_W32(0xB8393ABB, TX_CTRL_K_TABLE(10));
+    IFX_REG_W32(0x3CBDBE3F, TX_CTRL_K_TABLE(11));
+    IFX_REG_W32(0xC04142C3, TX_CTRL_K_TABLE(12));
+    IFX_REG_W32(0x44C5C647, TX_CTRL_K_TABLE(13));
+    IFX_REG_W32(0x48C9CA4B, TX_CTRL_K_TABLE(14));
+    IFX_REG_W32(0xCC4D4ECF, TX_CTRL_K_TABLE(15));
+
+    //  init RX descriptor
+    rx_desc.own     = 1;
+    rx_desc.c       = 0;
+    rx_desc.sop     = 1;
+    rx_desc.eop     = 1;
+    rx_desc.byteoff = RX_HEAD_MAC_ADDR_ALIGNMENT;
+    rx_desc.datalen = RX_MAX_BUFFER_SIZE - RX_HEAD_MAC_ADDR_ALIGNMENT;
+    for ( i = 0; i < WAN_RX_DESC_NUM; i++ ) {
+        rx_desc.dataptr = (unsigned int)skb_pool[i]->data & 0x0FFFFFFF;
+        WAN_RX_DESC_BASE[i] = rx_desc;
+    }
+
+    //  init TX descriptor
+    tx_desc.own     = 0;
+    tx_desc.c       = 0;
+    tx_desc.sop     = 1;
+    tx_desc.eop     = 1;
+    tx_desc.byteoff = 0;
+    tx_desc.qid     = 0;
+    tx_desc.datalen = 0;
+    tx_desc.small   = 0;
+    tx_desc.dataptr = 0;
+    for ( i = 0; i < CPU_TO_WAN_TX_DESC_NUM; i++ )
+        CPU_TO_WAN_TX_DESC_BASE[i] = tx_desc;
+    for ( i = 0; i < WAN_TX_DESC_NUM_TOTAL; i++ )
+        WAN_TX_DESC_BASE(0)[i] = tx_desc;
+
+    //  init Swap descriptor
+    for ( i = 0; i < WAN_SWAP_DESC_NUM; i++ )
+        WAN_SWAP_DESC_BASE[i] = tx_desc;
+
+    //  init fastpath TX descriptor
+    tx_desc.own     = 1;
+    for ( i = 0; i < FASTPATH_TO_WAN_TX_DESC_NUM; i++ )
+        FASTPATH_TO_WAN_TX_DESC_BASE[i] = tx_desc;
+
+    return 0;
+
+ALLOC_SKB_RX_FAIL:
+    while ( i-- > 0 )
+        dev_kfree_skb_any(skb_pool[i]);
+    return -1;
+}
+
+static inline void clear_tables(void)
+{
+    struct sk_buff *skb;
+    int i, j;
+
+    for ( i = 0; i < WAN_RX_DESC_NUM; i++ ) {
+        skb = get_skb_pointer(WAN_RX_DESC_BASE[i].dataptr);
+        if ( skb != NULL )
+            dev_kfree_skb_any(skb);
+    }
+
+    for ( i = 0; i < CPU_TO_WAN_TX_DESC_NUM; i++ ) {
+        skb = get_skb_pointer(CPU_TO_WAN_TX_DESC_BASE[i].dataptr);
+        if ( skb != NULL )
+            dev_kfree_skb_any(skb);
+    }
+
+    for ( j = 0; j < 8; j++ )
+        for ( i = 0; i < WAN_TX_DESC_NUM; i++ ) {
+            skb = get_skb_pointer(WAN_TX_DESC_BASE(j)[i].dataptr);
+            if ( skb != NULL )
+                dev_kfree_skb_any(skb);
+        }
+
+    for ( i = 0; i < WAN_SWAP_DESC_NUM; i++ ) {
+        skb = get_skb_pointer(WAN_SWAP_DESC_BASE[i].dataptr);
+        if ( skb != NULL )
+            dev_kfree_skb_any(skb);
+    }
+
+    for ( i = 0; i < FASTPATH_TO_WAN_TX_DESC_NUM; i++ ) {
+        skb = get_skb_pointer(FASTPATH_TO_WAN_TX_DESC_BASE[i].dataptr);
+        if ( skb != NULL )
+            dev_kfree_skb_any(skb);
+    }
+}
+
+static int ptm_showtime_enter(struct port_cell_info *port_cell, void *xdata_addr)
+{
+	ASSERT(port_cell != NULL, "port_cell is NULL");
+	ASSERT(xdata_addr != NULL, "xdata_addr is NULL");
+
+	//  TODO: ReTX set xdata_addr
+	g_xdata_addr = xdata_addr;
+
+	g_showtime = 1;
+
+	IFX_REG_W32(0x0F, UTP_CFG);
+
+	//#ifdef CONFIG_VR9
+	//    IFX_REG_W32_MASK(1 << 17, 0, FFSM_CFG0);
+	//#endif
+
+	printk("enter showtime\n");
+
+	return 0;
+}
+
+static int ptm_showtime_exit(void)
+{
+	if ( !g_showtime )
+		return -1;
+
+	//#ifdef CONFIG_VR9
+	//    IFX_REG_W32_MASK(0, 1 << 17, FFSM_CFG0);
+	//#endif
+
+	IFX_REG_W32(0x00, UTP_CFG);
+
+	g_showtime = 0;
+
+	//  TODO: ReTX clean state
+	g_xdata_addr = NULL;
+
+	printk("leave showtime\n");
+
+	return 0;
+}
+
+
+
+static int __devinit ifx_ptm_init(void)
+{
+    int ret;
+    int i;
+    char ver_str[128];
+    struct port_cell_info port_cell = {0};
+
+    ret = init_priv_data();
+    if ( ret != 0 ) {
+        err("INIT_PRIV_DATA_FAIL");
+        goto INIT_PRIV_DATA_FAIL;
+    }
+
+    ifx_ptm_init_chip();
+    ret = init_tables();
+    if ( ret != 0 ) {
+        err("INIT_TABLES_FAIL");
+        goto INIT_TABLES_FAIL;
+    }
+
+    for ( i = 0; i < ARRAY_SIZE(g_net_dev); i++ ) {
+        g_net_dev[i] = alloc_netdev(0, g_net_dev_name[i], ether_setup);
+        if ( g_net_dev[i] == NULL )
+            goto ALLOC_NETDEV_FAIL;
+        ptm_setup(g_net_dev[i], i);
+    }
+
+    for ( i = 0; i < ARRAY_SIZE(g_net_dev); i++ ) {
+        ret = register_netdev(g_net_dev[i]);
+        if ( ret != 0 )
+            goto REGISTER_NETDEV_FAIL;
+    }
+
+    /*  register interrupt handler  */
+    ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, IRQF_DISABLED, "ptm_mailbox_isr", &g_ptm_priv_data);
+    if ( ret ) {
+        if ( ret == -EBUSY ) {
+            err("IRQ may be occupied by other driver, please reconfig to disable it.");
+        }
+        else {
+            err("request_irq fail");
+        }
+        goto REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL;
+    }
+    disable_irq(PPE_MAILBOX_IGU1_INT);
+
+    ret = ifx_pp32_start(0);
+    if ( ret ) {
+        err("ifx_pp32_start fail!");
+        goto PP32_START_FAIL;
+    }
+    IFX_REG_W32(1 << 16, MBOX_IGU1_IER);    //  enable SWAP interrupt
+    IFX_REG_W32(~0, MBOX_IGU1_ISRC);
+
+    enable_irq(PPE_MAILBOX_IGU1_INT);
+
+    ifx_mei_atm_showtime_check(&g_showtime, &port_cell, &g_xdata_addr);
+    
+    ifx_mei_atm_showtime_enter = ptm_showtime_enter;
+    ifx_mei_atm_showtime_exit  = ptm_showtime_exit;
+
+    ifx_ptm_version(ver_str);
+    printk(KERN_INFO "%s", ver_str);
+
+    printk("ifxmips_ptm: PTM init succeed\n");
+
+    return 0;
+
+PP32_START_FAIL:
+    free_irq(PPE_MAILBOX_IGU1_INT, &g_ptm_priv_data);
+REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL:
+    i = ARRAY_SIZE(g_net_dev);
+REGISTER_NETDEV_FAIL:
+    while ( i-- )
+        unregister_netdev(g_net_dev[i]);
+    i = ARRAY_SIZE(g_net_dev);
+ALLOC_NETDEV_FAIL:
+    while ( i-- ) {
+        free_netdev(g_net_dev[i]);
+        g_net_dev[i] = NULL;
+    }
+INIT_TABLES_FAIL:
+INIT_PRIV_DATA_FAIL:
+    clear_priv_data();
+    printk("ifxmips_ptm: PTM init failed\n");
+    return ret;
+}
+
+static void __exit ifx_ptm_exit(void)
+{
+    int i;
+	ifx_mei_atm_showtime_enter = NULL;
+	ifx_mei_atm_showtime_exit  = NULL;
+
+
+    ifx_pp32_stop(0);
+
+    free_irq(PPE_MAILBOX_IGU1_INT, &g_ptm_priv_data);
+
+    for ( i = 0; i < ARRAY_SIZE(g_net_dev); i++ )
+        unregister_netdev(g_net_dev[i]);
+
+    for ( i = 0; i < ARRAY_SIZE(g_net_dev); i++ ) {
+        free_netdev(g_net_dev[i]);
+        g_net_dev[i] = NULL;
+    }
+
+    clear_tables();
+
+    ifx_ptm_uninit_chip();
+
+    clear_priv_data();
+}
+
+#ifndef MODULE
+static int __init wanqos_en_setup(char *line)
+{
+    wanqos_en = simple_strtoul(line, NULL, 0);
+
+    if ( wanqos_en < 1 || wanqos_en > 8 )
+        wanqos_en = 0;
+
+    return 0;
+}
+
+static int __init queue_gamma_map_setup(char *line)
+{
+    char *p;
+    int i;
+
+    for ( i = 0, p = line; i < ARRAY_SIZE(queue_gamma_map) && isxdigit(*p); i++ )
+    {
+        queue_gamma_map[i] = simple_strtoul(p, &p, 0);
+        if ( *p == ',' || *p == ';' || *p == ':' )
+            p++;
+    }
+
+    return 0;
+}
+#endif
+module_init(ifx_ptm_init);
+module_exit(ifx_ptm_exit);
+#ifndef MODULE
+  __setup("wanqos_en=", wanqos_en_setup);
+  __setup("queue_gamma_map=", queue_gamma_map_setup);
+#endif
+
+MODULE_LICENSE("GPL");
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.h b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.h
new file mode 100644
index 0000000..b06232d
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.h
@@ -0,0 +1,126 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_vdsl.h
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver header file (core functions for VR9)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+#ifndef IFXMIPS_PTM_VDSL_H
+#define IFXMIPS_PTM_VDSL_H
+
+#include <linux/version.h>
+#include <linux/netdevice.h>
+#include <lantiq_ptm.h>
+#include "ifxmips_ptm_common.h"
+#include "ifxmips_ptm_ppe_common.h"
+#include "ifxmips_ptm_fw_regs_vdsl.h"
+
+#define INT_NUM_IM2_IRL24	(INT_NUM_IM2_IRL0 + 24)
+
+#define IFX_REG_W32(_v, _r)               __raw_writel((_v), (volatile unsigned int *)(_r))
+#define IFX_REG_R32(_r)                    __raw_readl((volatile unsigned int *)(_r))
+#define IFX_REG_W32_MASK(_clr, _set, _r)   IFX_REG_W32((IFX_REG_R32((_r)) & ~(_clr)) | (_set), (_r))
+#define SET_BITS(x, msb, lsb, value)    (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
+
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+/*
+ *  Constant Definition
+ */
+#define ETH_WATCHDOG_TIMEOUT            (10 * HZ)
+
+/*
+ *  DMA RX/TX Channel Parameters
+ */
+#define MAX_ITF_NUMBER                  1
+#define MAX_RX_DMA_CHANNEL_NUMBER       1
+#define MAX_TX_DMA_CHANNEL_NUMBER       1
+#define DATA_BUFFER_ALIGNMENT           EMA_ALIGNMENT
+#define DESC_ALIGNMENT                  8
+
+/*
+ *  Ethernet Frame Definitions
+ */
+#define ETH_MAC_HEADER_LENGTH           14
+#define ETH_CRC_LENGTH                  4
+#define ETH_MIN_FRAME_LENGTH            64
+#define ETH_MAX_FRAME_LENGTH            (1518 + 4 * 2)
+
+/*
+ *  RX Frame Definitions
+ */
+#define RX_MAX_BUFFER_SIZE              (1600 + RX_HEAD_MAC_ADDR_ALIGNMENT)
+#define RX_HEAD_MAC_ADDR_ALIGNMENT      2
+#define RX_TAIL_CRC_LENGTH              0   //  PTM firmware does not have ethernet frame CRC
+                                            //  The len in descriptor doesn't include ETH_CRC
+                                            //  because ETH_CRC may not present in some configuration
+
+
+
+/*
+ * ####################################
+ *              Data Type
+ * ####################################
+ */
+
+struct ptm_itf {
+    unsigned int                    rx_desc_pos;
+
+    unsigned int                    tx_desc_pos;
+
+    unsigned int                    tx_swap_desc_pos;
+
+    struct net_device_stats         stats;
+
+    struct napi_struct              napi;
+};
+
+struct ptm_priv_data {
+    struct ptm_itf                  itf[MAX_ITF_NUMBER];
+};
+
+
+
+/*
+ * ####################################
+ *             Declaration
+ * ####################################
+ */
+
+extern unsigned int ifx_ptm_dbg_enable;
+
+extern void ifx_ptm_get_fw_ver(unsigned int *major, unsigned int *minor);
+
+extern void ifx_ptm_init_chip(void);
+extern void ifx_ptm_uninit_chip(void);
+
+extern int ifx_pp32_start(int pp32);
+extern void ifx_pp32_stop(int pp32);
+
+extern void ifx_reset_ppe(void);
+
+
+
+#endif  //  IFXMIPS_PTM_VDSL_H
diff --git a/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_vr9.c b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_vr9.c
new file mode 100644
index 0000000..0a02569
--- /dev/null
+++ b/package/platform/lantiq/ltq-ptm/src/ifxmips_ptm_vr9.c
@@ -0,0 +1,295 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_ptm_vr9.c
+** PROJECT      : UEIP
+** MODULES      : PTM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : PTM driver common source file (core functions)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+/*
+ * ####################################
+ *              Head File
+ * ####################################
+ */
+
+/*
+ *  Common Head File
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/ioctl.h>
+#include <asm/delay.h>
+
+/*
+ *  Chip Specific Head File
+ */
+#include "ifxmips_ptm_vdsl.h"
+#include "ifxmips_ptm_fw_vr9.h"
+
+#include <lantiq_soc.h>
+
+static inline void init_pmu(void);
+static inline void uninit_pmu(void);
+static inline void reset_ppe(void);
+static inline void init_pdma(void);
+static inline void init_mailbox(void);
+static inline void init_atm_tc(void);
+static inline void clear_share_buffer(void);
+
+#define IFX_PMU_MODULE_PPE_SLL01  BIT(19)
+#define IFX_PMU_MODULE_PPE_TC     BIT(21)
+#define IFX_PMU_MODULE_PPE_EMA    BIT(22)
+#define IFX_PMU_MODULE_PPE_QSB    BIT(18)
+#define IFX_PMU_MODULE_AHBS       BIT(13)
+#define IFX_PMU_MODULE_DSL_DFE    BIT(9)
+
+
+static inline void init_pmu(void)
+{
+	ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 |
+		IFX_PMU_MODULE_PPE_TC |
+		IFX_PMU_MODULE_PPE_EMA |
+		IFX_PMU_MODULE_AHBS |
+		IFX_PMU_MODULE_DSL_DFE);
+
+}
+
+static inline void uninit_pmu(void)
+{
+}
+
+static inline void reset_ppe(void)
+{
+/*#ifdef MODULE
+    //  reset PPE
+    ifx_rcu_rst(IFX_RCU_DOMAIN_DSLDFE, IFX_RCU_MODULE_PTM);
+    udelay(1000);
+    ifx_rcu_rst(IFX_RCU_DOMAIN_DSLTC, IFX_RCU_MODULE_PTM);
+    udelay(1000);
+    ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_PTM);
+    udelay(1000);
+    *PP32_SRST &= ~0x000303CF;
+    udelay(1000);
+    *PP32_SRST |= 0x000303CF;
+    udelay(1000);
+#endif*/
+}
+
+static inline void init_pdma(void)
+{
+    IFX_REG_W32(0x00000001, PDMA_CFG);
+    IFX_REG_W32(0x00082C00, PDMA_RX_CTX_CFG);
+    IFX_REG_W32(0x00081B00, PDMA_TX_CTX_CFG);
+    IFX_REG_W32(0x02040604, PDMA_RX_MAX_LEN_REG);
+    IFX_REG_W32(0x000F003F, PDMA_RX_DELAY_CFG);
+
+    IFX_REG_W32(0x00000011, SAR_MODE_CFG);
+    IFX_REG_W32(0x00082A00, SAR_RX_CTX_CFG);
+    IFX_REG_W32(0x00082E00, SAR_TX_CTX_CFG);
+    IFX_REG_W32(0x00001021, SAR_POLY_CFG_SET0);
+    IFX_REG_W32(0x1EDC6F41, SAR_POLY_CFG_SET1);
+    IFX_REG_W32(0x04C11DB7, SAR_POLY_CFG_SET2);
+    IFX_REG_W32(0x00000F3E, SAR_CRC_SIZE_CFG);
+
+    IFX_REG_W32(0x01001900, SAR_PDMA_RX_CMDBUF_CFG);
+    IFX_REG_W32(0x01001A00, SAR_PDMA_TX_CMDBUF_CFG);
+}
+
+static inline void init_mailbox(void)
+{
+    IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
+    IFX_REG_W32(0x00000000, MBOX_IGU1_IER);
+    IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC);
+    IFX_REG_W32(0x00000000, MBOX_IGU3_IER);
+}
+
+static inline void init_atm_tc(void)
+{
+    IFX_REG_W32(0x00010040, SFSM_CFG0);
+    IFX_REG_W32(0x00010040, SFSM_CFG1);
+    IFX_REG_W32(0x00020000, SFSM_PGCNT0);
+    IFX_REG_W32(0x00020000, SFSM_PGCNT1);
+    IFX_REG_W32(0x00000000, DREG_AT_IDLE0);
+    IFX_REG_W32(0x00000000, DREG_AT_IDLE1);
+    IFX_REG_W32(0x00000000, DREG_AR_IDLE0);
+    IFX_REG_W32(0x00000000, DREG_AR_IDLE1);
+    IFX_REG_W32(0x0000080C, DREG_B0_LADR);
+    IFX_REG_W32(0x0000080C, DREG_B1_LADR);
+
+    IFX_REG_W32(0x000001F0, DREG_AR_CFG0);
+    IFX_REG_W32(0x000001F0, DREG_AR_CFG1);
+    IFX_REG_W32(0x000001E0, DREG_AT_CFG0);
+    IFX_REG_W32(0x000001E0, DREG_AT_CFG1);
+
+    /*  clear sync state    */
+    //IFX_REG_W32(0, SFSM_STATE0);
+    //IFX_REG_W32(0, SFSM_STATE1);
+
+    IFX_REG_W32_MASK(0, 1 << 14, SFSM_CFG0);    //  enable SFSM storing
+    IFX_REG_W32_MASK(0, 1 << 14, SFSM_CFG1);
+
+    IFX_REG_W32_MASK(0, 1 << 15, SFSM_CFG0);    //  HW keep the IDLE cells in RTHA buffer
+    IFX_REG_W32_MASK(0, 1 << 15, SFSM_CFG1);
+
+    IFX_REG_W32(0xF0D10000, FFSM_IDLE_HEAD_BC0);
+    IFX_REG_W32(0xF0D10000, FFSM_IDLE_HEAD_BC1);
+    IFX_REG_W32(0x00030028, FFSM_CFG0);         //  Force_idle
+    IFX_REG_W32(0x00030028, FFSM_CFG1);
+}
+
+static inline void clear_share_buffer(void)
+{
+    volatile u32 *p;
+    unsigned int i;
+
+    p = SB_RAM0_ADDR(0);
+    for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ )
+        IFX_REG_W32(0, p++);
+
+    p = SB_RAM6_ADDR(0);
+    for ( i = 0; i < SB_RAM6_DWLEN; i++ )
+        IFX_REG_W32(0, p++);
+}
+
+/*
+ *  Description:
+ *    Download PPE firmware binary code.
+ *  Input:
+ *    pp32      --- int, which pp32 core
+ *    src       --- u32 *, binary code buffer
+ *    dword_len --- unsigned int, binary code length in DWORD (32-bit)
+ *  Output:
+ *    int       --- 0:    Success
+ *                  else:           Error Code
+ */
+static inline int pp32_download_code(int pp32, u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
+{
+    unsigned int clr, set;
+    volatile u32 *dest;
+
+    if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
+        || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
+        return -1;
+
+    clr = pp32 ? 0xF0 : 0x0F;
+    if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )
+        set = pp32 ? (3 << 6): (2 << 2);
+    else
+        set = 0x00;
+    IFX_REG_W32_MASK(clr, set, CDM_CFG);
+
+    /*  copy code   */
+    dest = CDM_CODE_MEMORY(pp32, 0);
+    while ( code_dword_len-- > 0 )
+        IFX_REG_W32(*code_src++, dest++);
+
+    /*  copy data   */
+    dest = CDM_DATA_MEMORY(pp32, 0);
+    while ( data_dword_len-- > 0 )
+        IFX_REG_W32(*data_src++, dest++);
+
+    return 0;
+}
+
+
+
+/*
+ * ####################################
+ *           Global Function
+ * ####################################
+ */
+
+extern void ifx_ptm_get_fw_ver(unsigned int *major, unsigned int *minor)
+{
+    ASSERT(major != NULL, "pointer is NULL");
+    ASSERT(minor != NULL, "pointer is NULL");
+
+    *major = FW_VER_ID->major;
+    *minor = FW_VER_ID->minor;
+}
+
+void ifx_ptm_init_chip(void)
+{
+    init_pmu();
+
+    reset_ppe();
+
+    init_pdma();
+
+    init_mailbox();
+
+    init_atm_tc();
+
+    clear_share_buffer();
+}
+
+void ifx_ptm_uninit_chip(void)
+{
+    uninit_pmu();
+}
+
+/*
+ *  Description:
+ *    Initialize and start up PP32.
+ *  Input:
+ *    none
+ *  Output:
+ *    int  --- 0: Success
+ *             else:        Error Code
+ */
+int ifx_pp32_start(int pp32)
+{
+    unsigned int mask = 1 << (pp32 << 4);
+    int ret;
+
+    /*  download firmware   */
+    ret = pp32_download_code(pp32, firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data));
+    if ( ret != 0 )
+        return ret;
+
+    /*  run PP32    */
+    IFX_REG_W32_MASK(mask, 0, PP32_FREEZE);
+
+    /*  idle for a while to let PP32 init itself    */
+    udelay(10);
+
+    return 0;
+}
+
+/*
+ *  Description:
+ *    Halt PP32.
+ *  Input:
+ *    none
+ *  Output:
+ *    none
+ */
+void ifx_pp32_stop(int pp32)
+{
+    unsigned int mask = 1 << (pp32 << 4);
+
+    /*  halt PP32   */
+    IFX_REG_W32_MASK(0, mask, PP32_FREEZE);
+}