uboot-kirkwood: update to 2012.10

SVN-Revision: 34303

10 files changed, 5 insertions, 1964 deletions

diff --git a/package/boot/uboot-kirkwood/Makefile b/package/boot/uboot-kirkwood/Makefile
index 48bcf99..5824a4f 100644
--- a/package/boot/uboot-kirkwood/Makefile
+++ b/package/boot/uboot-kirkwood/Makefile
@@ -9,13 +9,13 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=u-boot
-PKG_VERSION:=2012.04.01
+PKG_VERSION:=2012.10
 PKG_RELEASE:=1
 
 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION)
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
 PKG_SOURCE_URL:=ftp://ftp.denx.de/pub/u-boot
-PKG_MD5SUM:=192bb231082d9159fb6e16de3039b6b2
+PKG_MD5SUM:=8655f63b1e5c4647295ac9ce44660be3
 PKG_TARGETS:=bin
 
 include $(INCLUDE_DIR)/package.mk
@@ -67,11 +67,6 @@ UBOOT_CONFIG:=$(if $(CONFIG),$(CONFIG),$(BUILD_VARIANT))
 UBOOT_IMAGE:=$(if $(IMAGE),$(IMAGE),openwrt-$(BOARD)-$(BUILD_VARIANT)-u-boot.bin)
 endif
 
-define Build/Prepare
-	$(call Build/Prepare/Default)
-	$(CP) ./files/* $(PKG_BUILD_DIR)
-endef
-
 define Build/Configure
 	$(MAKE) -C $(PKG_BUILD_DIR) \
 		$(UBOOT_CONFIG)_config
@@ -84,11 +79,11 @@ define Build/Compile
 endef
 
 define Package/uboot/install/default
-	$(INSTALL_DIR) $(BIN_DIR)
+	$(INSTALL_DIR) $(BIN_DIR)/uboot-$(BOARD)-$(1)
 	$(CP) $(PKG_BUILD_DIR)/u-boot.bin \
-		$(BIN_DIR)/openwrt-$(BOARD)-$(1)-u-boot.bin
+		$(BIN_DIR)/uboot-$(BOARD)-$(1)/openwrt-$(BOARD)-$(1)-u-boot.bin
 	$(CP) $(PKG_BUILD_DIR)/u-boot.kwb \
-		$(BIN_DIR)/openwrt-$(BOARD)-$(1)-u-boot.kwb
+		$(BIN_DIR)/uboot-$(BOARD)-$(1)/openwrt-$(BOARD)-$(1)-u-boot.kwb
 	$(INSTALL_DIR) $(BIN_DIR)/u-boot-kwboot/
 	$(CP) $(PKG_BUILD_DIR)/tools/kwboot \
 		$(BIN_DIR)/u-boot-kwboot/
diff --git a/package/boot/uboot-kirkwood/files/board/iomega/iconnect/Makefile b/package/boot/uboot-kirkwood/files/board/iomega/iconnect/Makefile
deleted file mode 100644
index f77fcfb..0000000
--- a/package/boot/uboot-kirkwood/files/board/iomega/iconnect/Makefile
+++ /dev/null
@@ -1,43 +0,0 @@
-#
-# (C) Copyright 2009
-# Marvell Semiconductor <www.marvell.com>
-# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	:= iconnect.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/package/boot/uboot-kirkwood/files/board/iomega/iconnect/iconnect.c b/package/boot/uboot-kirkwood/files/board/iomega/iconnect/iconnect.c
deleted file mode 100644
index 34ddadf..0000000
--- a/package/boot/uboot-kirkwood/files/board/iomega/iconnect/iconnect.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * Copyright (C) 2009-2012
- * Wojciech Dubowik <wojciech.dubowik@neratec.com>
- * Luka Perkov <uboot@lukaperkov.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <common.h>
-#include <miiphy.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
-#include <asm/arch/mpp.h>
-#include "iconnect.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
-	/*
-	 * default gpio configuration
-	 * There are maximum 64 gpios controlled through 2 sets of registers
-	 * the below configuration configures mainly initial LED status
-	 */
-	kw_config_gpio(ICONNECT_OE_VAL_LOW,
-			ICONNECT_OE_VAL_HIGH,
-			ICONNECT_OE_LOW, ICONNECT_OE_HIGH);
-
-	/* Multi-Purpose Pins Functionality configuration */
-	u32 kwmpp_config[] = {
-		MPP0_NF_IO2,
-		MPP1_NF_IO3,
-		MPP2_NF_IO4,
-		MPP3_NF_IO5,
-		MPP4_NF_IO6,
-		MPP5_NF_IO7,
-		MPP6_SYSRST_OUTn,
-		MPP7_GPO,
-		MPP8_TW_SDA,
-		MPP9_TW_SCK,
-		MPP10_UART0_TXD,
-		MPP11_UART0_RXD,
-		MPP12_GPO,
-		MPP13_SD_CMD,
-		MPP14_SD_D0,
-		MPP15_SD_D1,
-		MPP16_SD_D2,
-		MPP17_SD_D3,
-		MPP18_NF_IO0,
-		MPP19_NF_IO1,
-		MPP20_GE1_0,
-		MPP21_GE1_1,
-		MPP22_GE1_2,
-		MPP23_GE1_3,
-		MPP24_GE1_4,
-		MPP25_GE1_5,
-		MPP26_GE1_6,
-		MPP27_GE1_7,
-		MPP28_GPIO,
-		MPP29_GPIO,
-		MPP30_GE1_10,
-		MPP31_GE1_11,
-		MPP32_GE1_12,
-		MPP33_GE1_13,
-		MPP34_GE1_14,
-		MPP35_GPIO,
-		MPP36_AUDIO_SPDIFI,
-		MPP37_AUDIO_SPDIFO,
-		MPP38_GPIO,
-		MPP39_TDM_SPI_CS0,
-		MPP40_TDM_SPI_SCK,
-		MPP41_GPIO,
-		MPP42_GPIO,
-		MPP43_GPIO,
-		MPP44_GPIO,
-		MPP45_GPIO,
-		MPP46_GPIO,
-		MPP47_GPIO,
-		MPP48_GPIO,
-		MPP49_GPIO,
-		0
-	};
-	kirkwood_mpp_conf(kwmpp_config);
-	return 0;
-}
-
-int board_init(void)
-{
-	/* Boot parameters address */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
-
-	return 0;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-/* Configure and initialize PHY */
-void reset_phy(void)
-{
-	u16 reg;
-	u16 devadr;
-	char *name = "egiga0";
-
-	if (miiphy_set_current_dev(name))
-		return;
-
-	/* command to read PHY dev address */
-	if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
-		printf("Err..(%s) could not read PHY dev address\n", __func__);
-		return;
-	}
-
-	/*
-	 * Enable RGMII delay on Tx and Rx for CPU port
-	 * Ref: sec 4.7.2 of chip datasheet
-	 */
-	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
-	miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
-	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
-	miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
-	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
-
-	/* reset the phy */
-	miiphy_reset(name, devadr);
-
-	debug("88E1116 Initialized on %s\n", name);
-}
-#endif /* CONFIG_RESET_PHY_R */
diff --git a/package/boot/uboot-kirkwood/files/board/iomega/iconnect/iconnect.h b/package/boot/uboot-kirkwood/files/board/iomega/iconnect/iconnect.h
deleted file mode 100644
index 2fb3e5e..0000000
--- a/package/boot/uboot-kirkwood/files/board/iomega/iconnect/iconnect.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (C) 2009-2012
- * Wojciech Dubowik <wojciech.dubowik@neratec.com>
- * Luka Perkov <uboot@lukaperkov.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef __ICONNECT_H
-#define __ICONNECT_H
-
-#define ICONNECT_OE_LOW			(~(1 << 7))
-#define ICONNECT_OE_HIGH		(~(1 << 10))
-#define ICONNECT_OE_VAL_LOW		(0)
-#define ICONNECT_OE_VAL_HIGH		(1 << 10)
-
-/* PHY related */
-#define MV88E1116_LED_FCTRL_REG		10
-#define MV88E1116_CPRSP_CR3_REG		21
-#define MV88E1116_MAC_CTRL_REG		21
-#define MV88E1116_PGADR_REG		22
-#define MV88E1116_RGMII_TXTM_CTRL	(1 << 4)
-#define MV88E1116_RGMII_RXTM_CTRL	(1 << 5)
-
-#endif /* __ICONNECT_H */
diff --git a/package/boot/uboot-kirkwood/files/board/iomega/iconnect/kwbimage.cfg b/package/boot/uboot-kirkwood/files/board/iomega/iconnect/kwbimage.cfg
deleted file mode 100644
index dee546a..0000000
--- a/package/boot/uboot-kirkwood/files/board/iomega/iconnect/kwbimage.cfg
+++ /dev/null
@@ -1,165 +0,0 @@
-#
-# (C) Copyright 2009-2012
-# Wojciech Dubowik <wojciech.dubowik@neratec.com>
-# Luka Perkov <uboot@lukaperkov.net>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-# Refer docs/README.kwimage for more details about how-to configure
-# and create kirkwood boot image
-#
-
-# Boot Media configurations
-BOOT_FROM	nand
-NAND_ECC_MODE	default
-NAND_PAGE_SIZE	0x0800
-
-# SOC registers configuration using bootrom header extension
-# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
-
-# Configure RGMII-0 interface pad voltage to 1.8V
-DATA 0xffd100e0 0x1b1b1b9b
-
-#Dram initalization for SINGLE x16 CL=5 @ 400MHz
-DATA 0xffd01400 0x43000c30	# DDR Configuration register
-# bit13-0:  0xc30, (3120 DDR2 clks refresh rate)
-# bit23-14: 0x0,
-# bit24:    0x1,   enable exit self refresh mode on DDR access
-# bit25:    0x1,   required
-# bit29-26: 0x0,
-# bit31-30: 0x1,
-
-DATA 0xffd01404 0x37543000	# DDR Controller Control Low
-# bit4:     0x0, addr/cmd in smame cycle
-# bit5:     0x0, clk is driven during self refresh, we don't care for APX
-# bit6:     0x0, use recommended falling edge of clk for addr/cmd
-# bit14:    0x0, input buffer always powered up
-# bit18:    0x1, cpu lock transaction enabled
-# bit23-20: 0x5, recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
-# bit27-24: 0x7, CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
-# bit30-28: 0x3, required
-# bit31:    0x0, no additional STARTBURST delay
-
-DATA 0xffd01408 0x22125451	# DDR Timing (Low) (active cycles value +1)
-# bit3-0:   TRAS lsbs
-# bit7-4:   TRCD
-# bit11-8:  TRP
-# bit15-12: TWR
-# bit19-16: TWTR
-# bit20:    TRAS msb
-# bit23-21: 0x0
-# bit27-24: TRRD
-# bit31-28: TRTP
-
-DATA 0xffd0140c 0x00000a33	# DDR Timing (High)
-# bit6-0:   TRFC
-# bit8-7:   TR2R
-# bit10-9:  TR2W
-# bit12-11: TW2W
-# bit31-13: 0x0, required
-
-DATA 0xffd01410 0x000000cc	# DDR Address Control
-# bit1-0:   00,  Cs0width (x8)
-# bit3-2:   11,  Cs0size (1Gb)
-# bit5-4:   00,  Cs1width (x8)
-# bit7-6:   11,  Cs1size (1Gb)
-# bit9-8:   00,  Cs2width (nonexistent)
-# bit11-10: 00,  Cs2size (nonexistent)
-# bit13-12: 00,  Cs3width (nonexistent)
-# bit15-14: 00,  Cs3size (nonexistent)
-# bit16:    0,   Cs0AddrSel
-# bit17:    0,   Cs1AddrSel
-# bit18:    0,   Cs2AddrSel
-# bit19:    0,   Cs3AddrSel
-# bit31-20: 0x0, required
-
-DATA 0xffd01414 0x00000000	# DDR Open Pages Control
-# bit0:    0,   OpenPage enabled
-# bit31-1: 0x0, required
-
-DATA 0xffd01418 0x00000000	# DDR Operation
-# bit3-0:   0x0, DDR cmd
-# bit31-4:  0x0, required
-
-DATA 0xffd0141c 0x00000c52	# DDR Mode
-# bit2-0:   0x2, BurstLen=2 required
-# bit3:     0x0, BurstType=0 required
-# bit6-4:   0x4, CL=5
-# bit7:     0x0, TestMode=0 normal
-# bit8:     0x0, DLL reset=0 normal
-# bit11-9:  0x6, auto-precharge write recovery ????????????
-# bit12:    0x0, PD must be zero
-# bit31-13: 0x0, required
-
-DATA 0xffd01420 0x00000040	# DDR Extended Mode
-# bit0:     0,   DDR DLL enabled
-# bit1:     0,   DDR drive strenght normal
-# bit2:     0,   DDR ODT control lsd (disabled)
-# bit5-3:   0x0, required
-# bit6:     1,   DDR ODT control msb, (disabled)
-# bit9-7:   0x0, required
-# bit10:    0,   differential DQS enabled
-# bit11:    0,   required
-# bit12:    0,   DDR output buffer enabled
-# bit31-13: 0x0, required
-
-DATA 0xffd01424 0x0000f17f	# DDR Controller Control High
-# bit2-0:   0x7, required
-# bit3:     0x1, MBUS Burst Chop disabled
-# bit6-4:   0x7, required
-# bit7:     0x0,
-# bit8:     0x1, add writepath sample stage, must be 1 for DDR freq >= 300MHz
-# bit9:     0x0, no half clock cycle addition to dataout
-# bit10:    0x0, 1/4 clock cycle skew enabled for addr/ctl signals
-# bit11:    0x0, 1/4 clock cycle skew disabled for write mesh
-# bit15-12: 0xf, required
-# bit31-16: 0x0, required
-
-DATA 0xffd01428 0x00085520	# DDR2 ODT Read Timing (default values)
-DATA 0xffd0147c 0x00008552	# DDR2 ODT Write Timing (default values)
-
-DATA 0xffd01500 0x00000000	# CS[0]n Base address to 0x0
-DATA 0xffd01504 0x0ffffff1	# CS[0]n Size
-# bit0:     0x1,     Window enabled
-# bit1:     0x0,     Write Protect disabled
-# bit3-2:   0x0,     CS0 hit selected
-# bit23-4:  0xfffff, required
-# bit31-24: 0x0f,    Size (i.e. 256MB)
-
-DATA 0xffd01508 0x00000000	# CS[1]n Base address to 256Mb
-DATA 0xffd0150c 0x00000000	# CS[1]n Size 256Mb Window enabled for CS1
-
-DATA 0xffd01514 0x00000000	# CS[2]n Size, window disabled
-DATA 0xffd0151c 0x00000000	# CS[3]n Size, window disabled
-
-DATA 0xffd01494 0x00030000	# DDR ODT Control (Low)
-# bit3-0:     ODT0Rd, MODT[0] asserted during read from DRAM CS1
-# bit7-4:     ODT0Rd, MODT[0] asserted during read from DRAM CS0
-# bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
-# bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
-
-DATA 0xffd01498 0x00000000	# DDR ODT Control (High)
-# bit1-0:  0x0, ODT0 controlled by ODT Control (low) register above
-# bit3-2:  0x1, ODT1 active NEVER!
-# bit31-4: 0x0, required
-
-DATA 0xffd0149c 0x0000e803	# CPU ODT Control
-DATA 0xffd01480 0x00000001	# DDR Initialization Control
-# bit0: 0x1, enable DDR init upon this register write
-
-# End of Header extension
-DATA 0x0 0x0
diff --git a/package/boot/uboot-kirkwood/files/include/configs/iconnect.h b/package/boot/uboot-kirkwood/files/include/configs/iconnect.h
deleted file mode 100644
index 59432f1..0000000
--- a/package/boot/uboot-kirkwood/files/include/configs/iconnect.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * (C) Copyright 2009-2012
- * Wojciech Dubowik <wojciech.dubowik@neratec.com>
- * Luka Perkov <uboot@lukaperkov.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef _CONFIG_ICONNECT_H
-#define _CONFIG_ICONNECT_H
-
-/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING	" Iomega iConnect Wireless"
-
-/*
- * High level configuration options
- */
-#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
-#define CONFIG_KIRKWOOD			/* SOC Family Name */
-#define CONFIG_KW88F6281		/* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
-#define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
-
-/*
- * Machine type
- */
-#define CONFIG_MACH_TYPE	MACH_TYPE_ICONNECT
-
-
-/*
- * Commands configuration
- */
-#define CONFIG_SYS_NO_FLASH		/* declare no flash (NOR/SPI) */
-#define CONFIG_SYS_MVFS
-#include <config_cmd_default.h>
-#define CONFIG_CMD_ENV
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_USB
-
-/*
- * mv-common.h should be defined after CMD configs since it used them
- * to enable certain macros
- */
-#include "mv-common.h"
-
-#undef CONFIG_SYS_PROMPT
-#define CONFIG_SYS_PROMPT	"iconnect => "
-
-/*
- * Environment variables configuration
- */
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_SECT_SIZE	0x20000
-#else
-#define CONFIG_ENV_IS_NOWHERE
-#endif
-#define CONFIG_ENV_SIZE			0x20000
-#define CONFIG_ENV_OFFSET		0xc0000
-
-/*
- * Default environment variables
- */
-#define CONFIG_BOOTCOMMAND	"${x_bootcmd_kernel}; "		\
-	"setenv bootargs ${x_bootargs} ${x_bootargs_root}; "	\
-	"${x_bootcmd_usb}; bootm 0x6400000;"
-
-#define CONFIG_MTDPARTS		"orion_nand:1M(u-boot),"	\
-	"3M@1M(kernel),32M@4M(rootfs),475M@36M(data)\0"
-
-#define CONFIG_EXTRA_ENV_SETTINGS	"x_bootargs=console"	\
-	"=ttyS0,115200 mtdparts="CONFIG_MTDPARTS		\
-	"x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \
-	"x_bootcmd_usb=usb start\0" \
-	"x_bootargs_root=root=/dev/mtdblock2 rw rootfstype=jffs2\0"
-
-/*
- * Ethernet driver configuration
- */
-#ifdef CONFIG_CMD_NET
-#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
-#define CONFIG_PHY_BASE_ADR	11
-#endif /* CONFIG_CMD_NET */
-
-/*
- * SATA driver configuration
- */
-#ifdef CONFIG_CMD_IDE
-#define CONFIG_SYS_ATA_IDE0_OFFSET	MV_SATA_PORT0_OFFSET
-#define CONFIG_SYS_ATA_IDE1_OFFSET	MV_SATA_PORT1_OFFSET
-#endif /* CONFIG_CMD_IDE */
-
-/*
- * File system
- */
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_UBI
-#define CONFIG_CMD_UBIFS
-#define CONFIG_RBTREE
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_CMD_MTDPARTS
-
-#endif /* _CONFIG_ICONNECT_H */
diff --git a/package/boot/uboot-kirkwood/patches/0001-ib62x0.patch b/package/boot/uboot-kirkwood/patches/0001-ib62x0.patch
deleted file mode 100644
index 0a7dc47..0000000
--- a/package/boot/uboot-kirkwood/patches/0001-ib62x0.patch
+++ /dev/null
@@ -1,542 +0,0 @@
-http://lists.denx.de/pipermail/u-boot/2012-April/122597.html
-http://patchwork.ozlabs.org/patch/153293/
----
-
-diff --git a/MAINTAINERS b/MAINTAINERS
-index 708ded7..9d2aba7 100644
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -777,6 +777,10 @@ Linus Walleij <linus.walleij@linaro.org>
- 	integratorap	various
- 	integratorcp	various
- 
-+Luka Perkov <uboot@lukaperkov.net>
-+
-+	ib62x0		ARM926EJS
-+
- Dave Peverley <dpeverley@mpc-data.co.uk>
- 
- 	omap730p2	ARM926EJS
-diff --git a/board/raidsonic/ib62x0/Makefile b/board/raidsonic/ib62x0/Makefile
-new file mode 100644
-index 0000000..d450f8d
---- /dev/null
-+++ b/board/raidsonic/ib62x0/Makefile
-@@ -0,0 +1,43 @@
-+#
-+# (C) Copyright 2009
-+# Marvell Semiconductor <www.marvell.com>
-+# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program. If not, see <http://www.gnu.org/licenses/>.
-+#
-+
-+include $(TOPDIR)/config.mk
-+
-+LIB	= $(obj)lib$(BOARD).o
-+
-+COBJS	:= ib62x0.o
-+
-+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-+OBJS	:= $(addprefix $(obj),$(COBJS))
-+SOBJS	:= $(addprefix $(obj),$(SOBJS))
-+
-+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
-+
-+#########################################################################
-+
-+# defines $(obj).depend target
-+include $(SRCTREE)/rules.mk
-+
-+sinclude $(obj).depend
-+
-+#########################################################################
-diff --git a/board/raidsonic/ib62x0/ib62x0.c b/board/raidsonic/ib62x0/ib62x0.c
-new file mode 100644
-index 0000000..65f2c2e
---- /dev/null
-+++ b/board/raidsonic/ib62x0/ib62x0.c
-@@ -0,0 +1,79 @@
-+/*
-+ * Copyright (C) 2011-2012
-+ * Gerald Kerma <dreagle@doukki.net>
-+ * Luka Perkov <uboot@lukaperkov.net>
-+ * Simon Baatz <gmbnomis@gmail.com>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include <common.h>
-+#include <miiphy.h>
-+#include <asm/arch/cpu.h>
-+#include <asm/arch/kirkwood.h>
-+#include <asm/arch/mpp.h>
-+#include "ib62x0.h"
-+
-+DECLARE_GLOBAL_DATA_PTR;
-+
-+int board_early_init_f(void)
-+{
-+	/*
-+	 * default gpio configuration
-+	 * There are maximum 64 gpios controlled through 2 sets of registers
-+	 * the below configuration configures mainly initial LED status
-+	 */
-+	kw_config_gpio(IB62x0_OE_VAL_LOW,
-+			IB62x0_OE_VAL_HIGH,
-+			IB62x0_OE_LOW, IB62x0_OE_HIGH);
-+
-+	/* Multi-Purpose Pins Functionality configuration */
-+	u32 kwmpp_config[] = {
-+		MPP0_NF_IO2,
-+		MPP1_NF_IO3,
-+		MPP2_NF_IO4,
-+		MPP3_NF_IO5,
-+		MPP4_NF_IO6,
-+		MPP5_NF_IO7,
-+		MPP6_SYSRST_OUTn,
-+		MPP8_TW_SDA,
-+		MPP9_TW_SCK,
-+		MPP10_UART0_TXD,
-+		MPP11_UART0_RXD,
-+		MPP18_NF_IO0,
-+		MPP19_NF_IO1,
-+		MPP20_SATA1_ACTn,
-+		MPP21_SATA0_ACTn,
-+		MPP22_GPIO,     /* Power LED red */
-+		MPP24_GPIO,     /* Power off device */
-+		MPP25_GPIO,     /* Power LED green */
-+		MPP27_GPIO,     /* USB transfer LED */
-+		MPP28_GPIO,     /* Reset button */
-+		MPP29_GPIO,     /* USB Copy button */
-+		0
-+	};
-+	kirkwood_mpp_conf(kwmpp_config);
-+	return 0;
-+}
-+
-+int board_init(void)
-+{
-+	/* adress of boot parameters */
-+	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
-+
-+	return 0;
-+}
-diff --git a/board/raidsonic/ib62x0/ib62x0.h b/board/raidsonic/ib62x0/ib62x0.h
-new file mode 100644
-index 0000000..0c30690
---- /dev/null
-+++ b/board/raidsonic/ib62x0/ib62x0.h
-@@ -0,0 +1,40 @@
-+/*
-+ * Copyright (C) 2011-2012
-+ * Gerald Kerma <dreagle@doukki.net>
-+ * Simon Baatz <gmbnomis@gmail.com>
-+ * Luka Perkov <uboot@lukaperkov.net>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef __IB62x0_H
-+#define __IB62x0_H
-+
-+#define IB62x0_OE_LOW		(~(1 << 22 | 1 << 24 | 1 << 25 | 1 << 27))
-+#define IB62x0_OE_HIGH		(~(0))
-+#define IB62x0_OE_VAL_LOW	0
-+#define IB62x0_OE_VAL_HIGH	0
-+
-+/* PHY related */
-+#define MV88E1116_LED_FCTRL_REG		10
-+#define MV88E1116_CPRSP_CR3_REG		21
-+#define MV88E1116_MAC_CTRL_REG		21
-+#define MV88E1116_PGADR_REG		22
-+#define MV88E1116_RGMII_TXTM_CTRL	(1 << 4)
-+#define MV88E1116_RGMII_RXTM_CTRL	(1 << 5)
-+
-+#endif /* __IB62x0_H */
-diff --git a/board/raidsonic/ib62x0/kwbimage.cfg b/board/raidsonic/ib62x0/kwbimage.cfg
-new file mode 100644
-index 0000000..bd594eb
---- /dev/null
-+++ b/board/raidsonic/ib62x0/kwbimage.cfg
-@@ -0,0 +1,169 @@
-+#
-+# Copyright (C) 2011-2012
-+# Gerald Kerma <dreagle@doukki.net>
-+# Simon Baatz <gmbnomis@gmail.com>
-+# Luka Perkov <uboot@lukaperkov.net>
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program. If not, see <http://www.gnu.org/licenses/>.
-+#
-+# Refer docs/README.kwimage for more details about how-to configure
-+# and create kirkwood boot image
-+#
-+
-+# Boot Media configurations
-+BOOT_FROM	nand	# change from nand to uart if building UART image
-+NAND_ECC_MODE	default
-+NAND_PAGE_SIZE	0x0800
-+
-+# SOC registers configuration using bootrom header extension
-+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
-+
-+# Configure RGMII-0 interface pad voltage to 1.8V
-+DATA 0xffd100e0 0x1b1b1b9b
-+
-+#Dram initalization for SINGLE x16 CL=5 @ 400MHz
-+DATA 0xffd01400 0x43000c30	# DDR Configuration register
-+# bit13-0:  0xc30, (3120 DDR2 clks refresh rate)
-+# bit23-14: 0x0,
-+# bit24:    0x1,     enable exit self refresh mode on DDR access
-+# bit25:    0x1,     required
-+# bit29-26: 0x0,
-+# bit31-30: 0x1,
-+
-+DATA 0xffd01404 0x37543000	# DDR Controller Control Low
-+# bit4:     0x0, addr/cmd in smame cycle
-+# bit5:     0x0, clk is driven during self refresh, we don't care for APX
-+# bit6:     0x0, use recommended falling edge of clk for addr/cmd
-+# bit14:    0x0, input buffer always powered up
-+# bit18:    0x1, cpu lock transaction enabled
-+# bit23-20: 0x5, recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
-+# bit27-24: 0x7, CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
-+# bit30-28: 0x3, required
-+# bit31:    0x0, no additional STARTBURST delay
-+
-+DATA 0xffd01408 0x22125451	# DDR Timing (Low) (active cycles value +1)
-+# bit3-0:   TRAS lsbs
-+# bit7-4:   TRCD
-+# bit11-8:  TRP
-+# bit15-12: TWR
-+# bit19-16: TWTR
-+# bit20:    TRAS msb
-+# bit23-21: 0x0
-+# bit27-24: TRRD
-+# bit31-28: TRTP
-+
-+DATA 0xffd0140c 0x00000a33	# DDR Timing (High)
-+# bit6-0:   TRFC
-+# bit8-7:   TR2R
-+# bit10-9:  TR2W
-+# bit12-11: TW2W
-+# bit31-13: 0x0, required
-+
-+DATA 0xffd01410 0x0000000c	# DDR Address Control
-+# bit1-0:   00,  Cs0width (x8)
-+# bit3-2:   11,  Cs0size (1Gb)
-+# bit5-4:   00,  Cs1width (x8)
-+# bit7-6:   11,  Cs1size (1Gb)
-+# bit9-8:   00,  Cs2width (nonexistent
-+# bit11-10: 00,  Cs2size  (nonexistent
-+# bit13-12: 00,  Cs3width (nonexistent
-+# bit15-14: 00,  Cs3size  (nonexistent
-+# bit16:    0,   Cs0AddrSel
-+# bit17:    0,   Cs1AddrSel
-+# bit18:    0,   Cs2AddrSel
-+# bit19:    0,   Cs3AddrSel
-+# bit31-20: 0x0, required
-+
-+DATA 0xffd01414 0x00000000	# DDR Open Pages Control
-+# bit0:    0,   OpenPage enabled
-+# bit31-1: 0x0, required
-+
-+DATA 0xffd01418 0x00000000	# DDR Operation
-+# bit3-0:   0x0, DDR cmd
-+# bit31-4:  0x0, required
-+
-+DATA 0xffd0141c 0x00000c52	# DDR Mode
-+# bit2-0:   0x2, BurstLen=2 required
-+# bit3:     0x0, BurstType=0 required
-+# bit6-4:   0x4, CL=5
-+# bit7:     0x0, TestMode=0 normal
-+# bit8:     0x0, DLL reset=0 normal
-+# bit11-9:  0x6, auto-precharge write recovery ????????????
-+# bit12:    0x0, PD must be zero
-+# bit31-13: 0x0, required
-+
-+DATA 0xffd01420 0x00000040	# DDR Extended Mode
-+# bit0:     0,   DDR DLL enabled
-+# bit1:     0,   DDR drive strenght normal
-+# bit2:     1,   DDR ODT control lsd (disabled)
-+# bit5-3:   0x0, required
-+# bit6:     0,   DDR ODT control msb, (disabled)
-+# bit9-7:   0x0, required
-+# bit10:    0,   differential DQS enabled
-+# bit11:    0,   required
-+# bit12:    0,   DDR output buffer enabled
-+# bit31-13: 0x0, required
-+
-+DATA 0xffd01424 0x0000f17f	# DDR Controller Control High
-+# bit2-0:   0x7, required
-+# bit3:     0x1, MBUS Burst Chop disabled
-+# bit6-4:   0x7, required
-+# bit7:     0x0,
-+# bit8:     0x1, add writepath sample stage, must be 1 for DDR freq >= 300MHz
-+# bit9:     0x0, no half clock cycle addition to dataout
-+# bit10:    0x0, 1/4 clock cycle skew enabled for addr/ctl signals
-+# bit11:    0x0, 1/4 clock cycle skew disabled for write mesh
-+# bit15-12: 0xf, required
-+# bit31-16: 0,   required
-+
-+DATA 0xffd01428 0x00085520	# DDR2 ODT Read Timing (default values)
-+DATA 0xffd0147c 0x00008552	# DDR2 ODT Write Timing (default values)
-+
-+DATA 0xffd01500 0x00000000	# CS[0]n Base address to 0x0
-+DATA 0xffd01504 0x0ffffff1	# CS[0]n Size
-+# bit0:     0x1,     Window enabled
-+# bit1:     0x0,     Write Protect disabled
-+# bit3-2:   0x0,     CS0 hit selected
-+# bit23-4:  0xfffff, required
-+# bit31-24: 0x0f,    Size (i.e. 256MB)
-+
-+DATA 0xffd01508 0x10000000	# CS[1]n Base address to 256Mb
-+DATA 0xffd0150c 0x00000000	# CS[1]n Size, window disabled
-+
-+DATA 0xffd01514 0x00000000	# CS[2]n Size, window disabled
-+DATA 0xffd0151c 0x00000000	# CS[3]n Size, window disabled
-+
-+DATA 0xffd01494 0x00030000	# DDR ODT Control (Low)
-+# bit3-0:     ODT0Rd, MODT[0] asserted during read from DRAM CS1
-+# bit7-4:     ODT0Rd, MODT[0] asserted during read from DRAM CS0
-+# bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
-+# bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
-+
-+DATA 0xffd01498 0x00000000	# DDR ODT Control (High)
-+# bit1-0:  0x0, ODT0 controlled by ODT Control (low) register above
-+# bit3-2:  0x1, ODT1 active NEVER!
-+# bit31-4: 0x0, required
-+
-+DATA 0xffd0149c 0x0000e803	# CPU ODT Control
-+DATA 0xffd01480 0x00000001	# DDR Initialization Control
-+# bit0: 0x1, enable DDR init upon this register write
-+
-+DATA 0xFFD20134 0x66666666      # L2 RAM Timing 0 Register
-+DATA 0xFFD20138 0x66666666      # L2 RAM Timing 1 Register
-+
-+# End of Header extension
-+DATA 0x0 0x0
-diff --git a/boards.cfg b/boards.cfg
-index 3cf75c3..23f84e8 100644
---- a/boards.cfg
-+++ b/boards.cfg
-@@ -153,6 +153,7 @@ openrd_client                arm         arm926ejs   openrd              Marvell
- openrd_ultimate              arm         arm926ejs   openrd              Marvell        kirkwood        openrd:BOARD_IS_OPENRD_ULTIMATE
- rd6281a                      arm         arm926ejs   -                   Marvell        kirkwood
- sheevaplug                   arm         arm926ejs   -                   Marvell        kirkwood
-+ib62x0                       arm         arm926ejs   ib62x0              raidsonic      kirkwood
- dockstar                     arm         arm926ejs   -                   Seagate        kirkwood
- jadecpu                      arm         arm926ejs   jadecpu             syteco         mb86r0x
- mx25pdk                      arm         arm926ejs   mx25pdk             freescale      mx25		mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg
-diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h
-new file mode 100644
-index 0000000..85856f2
---- /dev/null
-+++ b/include/configs/ib62x0.h
-@@ -0,0 +1,150 @@
-+/*
-+ * Copyright (C) 2011-2012
-+ * Gerald Kerma <dreagle@doukki.net>
-+ * Luka Perkov <uboot@lukaperkov.net>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _CONFIG_IB62x0_H
-+#define _CONFIG_IB62x0_H
-+
-+/*
-+ * Version number information
-+ */
-+#define CONFIG_IDENT_STRING	" RaidSonic ICY BOX IB-NAS62x0"
-+
-+/*
-+ * High level configuration options
-+ */
-+#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
-+#define CONFIG_KIRKWOOD			/* SOC Family Name */
-+#define CONFIG_KW88F6281		/* SOC Name */
-+#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
-+
-+/*
-+ * Machine type
-+ */
-+#define CONFIG_MACH_TYPE	MACH_TYPE_NAS6210
-+
-+/*
-+ * Compression configuration
-+ */
-+#define CONFIG_BZIP2
-+#define CONFIG_LZMA
-+#define CONFIG_LZO
-+
-+/*
-+ * Commands configuration
-+ */
-+#define CONFIG_SYS_NO_FLASH		/* declare no flash (NOR/SPI) */
-+#define CONFIG_SYS_MVFS
-+#include <config_cmd_default.h>
-+#define CONFIG_CMD_ENV
-+#define CONFIG_CMD_IDE
-+#define CONFIG_CMD_MII
-+#define CONFIG_CMD_NAND
-+#define CONFIG_CMD_PING
-+#define CONFIG_CMD_USB
-+
-+/*
-+ * mv-common.h should be defined after CMD configs since it used them
-+ * to enable certain macros
-+ */
-+#include "mv-common.h"
-+
-+#undef CONFIG_SYS_PROMPT
-+#define CONFIG_SYS_PROMPT	"ib62x0 => "
-+
-+/*
-+ * Environment variables configuration
-+ */
-+#ifdef CONFIG_CMD_NAND
-+#define CONFIG_ENV_IS_IN_NAND
-+#define CONFIG_ENV_SECT_SIZE	0x20000
-+#else
-+#define CONFIG_ENV_IS_NOWHERE
-+#endif
-+#define CONFIG_ENV_SIZE		0x20000
-+#define CONFIG_ENV_OFFSET	0x80000
-+
-+/*
-+ * Default environment variables
-+ */
-+#define CONFIG_BOOTCOMMAND \
-+	"setenv bootargs ${console} ${mtdparts} ${bootargs_root}; "	\
-+	"ubi part rootfs; "						\
-+	"ubifsmount rootfs; "						\
-+	"ubifsload 0x800000 ${kernel}; "				\
-+	"bootm 0x800000"
-+
-+#define CONFIG_MTDPARTS				\
-+	"mtdparts=orion_nand:"			\
-+	"0x80000@0x0(uboot),"			\
-+	"0x20000@0x80000(uboot_env),"		\
-+	"-@0xa0000(rootfs)\0"
-+
-+#define CONFIG_EXTRA_ENV_SETTINGS					\
-+	"console=console=ttyS0,115200\0"				\
-+	"mtdids=nand0=orion_nand\0"					\
-+	"mtdparts="CONFIG_MTDPARTS					\
-+	"kernel=/boot/uImage\0"						\
-+	"bootargs_root=noinitrd ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0"
-+
-+/*
-+ * Ethernet driver configuration
-+ */
-+#ifdef CONFIG_CMD_NET
-+#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
-+#define CONFIG_PHY_BASE_ADR	0
-+#undef CONFIG_RESET_PHY_R
-+#endif /* CONFIG_CMD_NET */
-+
-+/*
-+ * SATA driver configuration
-+ */
-+#ifdef CONFIG_CMD_IDE
-+#define __io
-+#define CONFIG_IDE_PREINIT
-+#define CONFIG_DOS_PARTITION
-+#define CONFIG_MVSATA_IDE_USE_PORT0
-+#define CONFIG_MVSATA_IDE_USE_PORT1
-+#define CONFIG_SYS_ATA_IDE0_OFFSET	MV_SATA_PORT0_OFFSET
-+#define CONFIG_SYS_ATA_IDE1_OFFSET	MV_SATA_PORT1_OFFSET
-+#endif /* CONFIG_CMD_IDE */
-+
-+/*
-+ * RTC driver configuration
-+ */
-+#ifdef CONFIG_CMD_DATE
-+#define CONFIG_RTC_MV
-+#endif /* CONFIG_CMD_DATE */
-+
-+/*
-+ * File system
-+ */
-+#define CONFIG_CMD_EXT2
-+#define CONFIG_CMD_FAT
-+#define CONFIG_CMD_JFFS2
-+#define CONFIG_CMD_UBI
-+#define CONFIG_CMD_UBIFS
-+#define CONFIG_RBTREE
-+#define CONFIG_MTD_DEVICE
-+#define CONFIG_MTD_PARTITIONS
-+#define CONFIG_CMD_MTDPARTS
-+
-+#endif /* _CONFIG_IB62x0_H */
diff --git a/package/boot/uboot-kirkwood/patches/0002-kwboot.patch b/package/boot/uboot-kirkwood/patches/0002-kwboot.patch
deleted file mode 100644
index 091d6a1..0000000
--- a/package/boot/uboot-kirkwood/patches/0002-kwboot.patch
+++ /dev/null
@@ -1,873 +0,0 @@
-http://lists.denx.de/pipermail/u-boot/2012-May/125296.html
-http://patchwork.ozlabs.org/patch/161566/
----
-
-diff --git a/doc/kwboot.1 b/doc/kwboot.1
-new file mode 100644
-index 0000000..ed08398
---- /dev/null
-+++ b/doc/kwboot.1
-@@ -0,0 +1,84 @@
-+.TH KWBOOT 1 "2012-05-19"
-+
-+.SH NAME
-+kwboot \- Boot Marvell Kirkwood SoCs over a serial link.
-+.SH SYNOPSIS
-+.B kwboot
-+.RB [ "-b \fIimage\fP" ]
-+.RB [ "-p" ]
-+.RB [ "-t" ]
-+.RB [ "-B \fIbaudrate\fP" ]
-+.RB \fITTY\fP
-+.SH "DESCRIPTION"
-+
-+The \fBmkimage\fP program boots boards based on Marvell's Kirkwood
-+platform over their integrated UART. Boot image files will typically
-+contain a second stage boot loader, such as U-Boot. The image file
-+must conform to Marvell's BootROM firmware image format
-+(\fIkwbimage\fP), created using a tool such as \fBmkimage\fP.
-+
-+Following power-up or a system reset, system BootROM code polls the
-+UART for a brief period of time, sensing a handshake message which
-+initiates an image upload. This program sends this boot message until
-+it receives a positive acknowledgement. The image is transfered using
-+Xmodem.
-+
-+Additionally, this program implements a minimal terminal mode, which
-+can be used either standalone, or entered immediately following boot
-+image transfer completion. This is often useful to catch early boot
-+messages, or to manually interrupt a default boot procedure performed
-+by the second-stage loader.
-+
-+.SH "OPTIONS"
-+
-+.TP
-+.BI "\-b \fIimage\fP"
-+Handshake; then upload file \fIimage\fP over \fITTY\fP.
-+
-+Note that for the encapsulated boot code to be executed, \fIimage\fP
-+must be of type "UART boot" (0x69). Boot images of different types,
-+such as backup images of vendor firmware downloaded from flash memory
-+(type 0x8B), will not work (or not as expected). See \fB-p\fP for a
-+workaround.
-+
-+This mode writes handshake status and upload progress indication to
-+stdout.
-+
-+.TP
-+.BI "\-p"
-+In combination with \fB-b\fP, patches the header in \fIimage\fP prior
-+to upload, to "UART boot" type.
-+
-+This option attempts on-the-fly conversion of some none-UART image
-+types, such as images which were originally formatted to be stored in
-+flash memory.
-+
-+Conversion is performed in memory. The contents of \fIimage\fP will
-+not be altered.
-+
-+.TP
-+.BI "\-t"
-+Run a terminal program, connecting standard input and output to
-+.RB \fITTY\fP.
-+
-+If used in combination with \fB-b\fP, terminal mode is entered
-+immediately following a successful image upload.
-+
-+If standard I/O streams connect to a console, this mode will terminate
-+after receiving 'ctrl-\\' followed by 'c' from console input.
-+
-+.TP
-+.BI "\-B \fIbaudrate\fP"
-+Adjust the baud rate on \fITTY\fP. Default rate is 115200.
-+
-+.SH "SEE ALSO"
-+.PP
-+\fBmkimage\fP(1)
-+
-+.SH "AUTHORS"
-+
-+Daniel Stodden <daniel.stodden@gmail.com>
-+.br
-+Luka Perkov <uboot@lukaperkov.net>
-+.br
-+David Purdy <david.c.purdy@gmail.com>
-diff --git a/tools/Makefile b/tools/Makefile
-index 8993fdd..8097d95 100644
---- a/tools/Makefile
-+++ b/tools/Makefile
-@@ -72,6 +72,7 @@ BIN_FILES-$(CONFIG_SMDK5250) += mksmdk5250spl$(SFX)
- BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX)
- BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
- BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
-+BIN_FILES-$(CONFIG_KIRKWOOD) += kwboot$(SFX)
- 
- # Source files which exist outside the tools directory
- EXT_OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += common/env_embedded.o
-@@ -101,6 +102,7 @@ OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o
- NOPED_OBJ_FILES-y += os_support.o
- OBJ_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1.o
- NOPED_OBJ_FILES-y += ublimage.o
-+OBJ_FILES-$(CONFIG_KIRKWOOD) += kwboot.o
- 
- # Don't build by default
- #ifeq ($(ARCH),ppc)
-@@ -234,6 +236,10 @@ $(obj)ncb$(SFX):	$(obj)ncb.o
- $(obj)ubsha1$(SFX):	$(obj)os_support.o $(obj)sha1.o $(obj)ubsha1.o
- 	$(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
- 
-+$(obj)kwboot$(SFX): $(obj)kwboot.o
-+	$(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
-+	$(HOSTSTRIP) $@
-+
- # Some of the tool objects need to be accessed from outside the tools directory
- $(obj)%.o: $(SRCTREE)/common/%.c
- 	$(HOSTCC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $<
-diff --git a/tools/kwboot.c b/tools/kwboot.c
-new file mode 100644
-index 0000000..e773f01
---- /dev/null
-+++ b/tools/kwboot.c
-@@ -0,0 +1,742 @@
-+/*
-+ * Boot a Marvell Kirkwood SoC, with Xmodem over UART0.
-+ *
-+ * (c) 2012 Daniel Stodden <daniel.stodden@gmail.com>
-+ *
-+ * References: marvell.com, "88F6180, 88F6190, 88F6192, and 88F6281
-+ *   Integrated Controller: Functional Specifications" December 2,
-+ *   2008. Chapter 24.2 "BootROM Firmware".
-+ */
-+
-+#include <stdlib.h>
-+#include <stdio.h>
-+#include <string.h>
-+#include <stdarg.h>
-+#include <libgen.h>
-+#include <fcntl.h>
-+#include <errno.h>
-+#include <unistd.h>
-+#include <stdint.h>
-+#include <termios.h>
-+#include <sys/mman.h>
-+#include <sys/stat.h>
-+
-+#include "kwbimage.h"
-+
-+#ifdef __GNUC__
-+#define PACKED __attribute((packed))
-+#else
-+#define PACKED
-+#endif
-+
-+/*
-+ * Marvell BootROM UART Sensing
-+ */
-+
-+static unsigned char kwboot_msg_boot[] = {
-+	0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
-+};
-+
-+#define KWBOOT_MSG_REQ_DELAY	10 /* ms */
-+#define KWBOOT_MSG_RSP_TIMEO	50 /* ms */
-+
-+/*
-+ * Xmodem Transfers
-+ */
-+
-+#define SOH	1	/* sender start of block header */
-+#define EOT	4	/* sender end of block transfer */
-+#define ACK	6	/* target block ack */
-+#define NAK	21	/* target block negative ack */
-+#define CAN	24	/* target/sender transfer cancellation */
-+
-+struct kwboot_block {
-+	uint8_t soh;
-+	uint8_t pnum;
-+	uint8_t _pnum;
-+	uint8_t data[128];
-+	uint8_t csum;
-+} PACKED;
-+
-+#define KWBOOT_BLK_RSP_TIMEO 1000 /* ms */
-+
-+static int kwboot_verbose;
-+
-+static void
-+kwboot_printv(const char *fmt, ...)
-+{
-+	va_list ap;
-+
-+	if (kwboot_verbose) {
-+		va_start(ap, fmt);
-+		vprintf(fmt, ap);
-+		va_end(ap);
-+		fflush(stdout);
-+	}
-+}
-+
-+static void
-+__spinner(void)
-+{
-+	const char seq[] = { '-', '\\', '|', '/' };
-+	const int div = 8;
-+	static int state, bs;
-+
-+	if (state % div == 0) {
-+		fputc(bs, stdout);
-+		fputc(seq[state / div % sizeof(seq)], stdout);
-+		fflush(stdout);
-+	}
-+
-+	bs = '\b';
-+	state++;
-+}
-+
-+static void
-+kwboot_spinner(void)
-+{
-+	if (kwboot_verbose)
-+		__spinner();
-+}
-+
-+static void
-+__progress(int pct, char c)
-+{
-+	const int width = 70;
-+	static const char *nl = "";
-+	static int pos;
-+
-+	if (pos % width == 0)
-+		printf("%s%3d %% [", nl, pct);
-+
-+	fputc(c, stdout);
-+
-+	nl = "]\n";
-+	pos++;
-+
-+	if (pct == 100) {
-+		while (pos++ < width)
-+			fputc(' ', stdout);
-+		fputs(nl, stdout);
-+	}
-+
-+	fflush(stdout);
-+
-+}
-+
-+static void
-+kwboot_progress(int _pct, char c)
-+{
-+	static int pct;
-+
-+	if (_pct != -1)
-+		pct = _pct;
-+
-+	if (kwboot_verbose)
-+		__progress(pct, c);
-+}
-+
-+static int
-+kwboot_tty_recv(int fd, void *buf, size_t len, int timeo)
-+{
-+	int rc, nfds;
-+	fd_set rfds;
-+	struct timeval tv;
-+	ssize_t n;
-+
-+	rc = -1;
-+
-+	FD_ZERO(&rfds);
-+	FD_SET(fd, &rfds);
-+
-+	tv.tv_sec = 0;
-+	tv.tv_usec = timeo * 1000;
-+	if (tv.tv_usec > 1000000) {
-+		tv.tv_sec += tv.tv_usec / 1000000;
-+		tv.tv_usec %= 1000000;
-+	}
-+
-+	do {
-+		nfds = select(fd + 1, &rfds, NULL, NULL, &tv);
-+		if (nfds < 0)
-+			goto out;
-+		if (!nfds) {
-+			errno = ETIMEDOUT;
-+			goto out;
-+		}
-+
-+		n = read(fd, buf, len);
-+		if (n < 0)
-+			goto out;
-+
-+		buf = (char *)buf + n;
-+		len -= n;
-+	} while (len > 0);
-+
-+	rc = 0;
-+out:
-+	return rc;
-+}
-+
-+static int
-+kwboot_tty_send(int fd, const void *buf, size_t len)
-+{
-+	int rc;
-+	ssize_t n;
-+
-+	rc = -1;
-+
-+	do {
-+		n = write(fd, buf, len);
-+		if (n < 0)
-+			goto out;
-+
-+		buf = (char *)buf + n;
-+		len -= n;
-+	} while (len > 0);
-+
-+	rc = tcdrain(fd);
-+out:
-+	return rc;
-+}
-+
-+static int
-+kwboot_tty_send_char(int fd, unsigned char c)
-+{
-+	return kwboot_tty_send(fd, &c, 1);
-+}
-+
-+static speed_t
-+kwboot_tty_speed(int baudrate)
-+{
-+	switch (baudrate) {
-+	case 115200:
-+		return B115200;
-+	case 57600:
-+		return B57600;
-+	case 38400:
-+		return B38400;
-+	case 19200:
-+		return B19200;
-+	case 9600:
-+		return B9600;
-+	}
-+
-+	return -1;
-+}
-+
-+static int
-+kwboot_open_tty(const char *path, speed_t speed)
-+{
-+	int rc, fd;
-+	struct termios tio;
-+
-+	rc = -1;
-+
-+	fd = open(path, O_RDWR|O_NOCTTY|O_NDELAY);
-+	if (fd < 0)
-+		goto out;
-+
-+	memset(&tio, 0, sizeof(tio));
-+
-+	tio.c_iflag = 0;
-+	tio.c_cflag = CREAD|CLOCAL|CS8;
-+
-+	tio.c_cc[VMIN] = 1;
-+	tio.c_cc[VTIME] = 10;
-+
-+	cfsetospeed(&tio, speed);
-+	cfsetispeed(&tio, speed);
-+
-+	rc = tcsetattr(fd, TCSANOW, &tio);
-+	if (rc)
-+		goto out;
-+
-+	rc = fd;
-+out:
-+	if (rc < 0) {
-+		if (fd >= 0)
-+			close(fd);
-+	}
-+
-+	return rc;
-+}
-+
-+static int
-+kwboot_bootmsg(int tty, void *msg)
-+{
-+	int rc;
-+	char c;
-+
-+	kwboot_printv("Sending boot message. Please reboot the target...");
-+
-+	do {
-+		rc = tcflush(tty, TCIOFLUSH);
-+		if (rc)
-+			break;
-+
-+		rc = kwboot_tty_send(tty, msg, 8);
-+		if (rc) {
-+			usleep(KWBOOT_MSG_REQ_DELAY * 1000);
-+			continue;
-+		}
-+
-+		rc = kwboot_tty_recv(tty, &c, 1, KWBOOT_MSG_RSP_TIMEO);
-+
-+		kwboot_spinner();
-+
-+	} while (rc || c != NAK);
-+
-+	kwboot_printv("\n");
-+
-+	return rc;
-+}
-+
-+static int
-+kwboot_xm_makeblock(struct kwboot_block *block, const void *data,
-+		    size_t size, int pnum)
-+{
-+	const size_t blksz = sizeof(block->data);
-+	size_t n;
-+	int i;
-+
-+	block->pnum = pnum;
-+	block->_pnum = ~block->pnum;
-+
-+	n = size < blksz ? size : blksz;
-+	memcpy(&block->data[0], data, n);
-+	memset(&block->data[n], 0, blksz - n);
-+
-+	block->csum = 0;
-+	for (i = 0; i < n; i++)
-+		block->csum += block->data[i];
-+
-+	return n;
-+}
-+
-+static int
-+kwboot_xm_sendblock(int fd, struct kwboot_block *block)
-+{
-+	int rc, retries;
-+	char c;
-+
-+	retries = 16;
-+	do {
-+		rc = kwboot_tty_send(fd, block, sizeof(*block));
-+		if (rc)
-+			break;
-+
-+		rc = kwboot_tty_recv(fd, &c, 1, KWBOOT_BLK_RSP_TIMEO);
-+		if (rc)
-+			break;
-+
-+		if (c != ACK)
-+			kwboot_progress(-1, '+');
-+
-+	} while (c == NAK && retries-- > 0);
-+
-+	rc = -1;
-+
-+	switch (c) {
-+	case ACK:
-+		rc = 0;
-+		break;
-+	case NAK:
-+		errno = EBADMSG;
-+		break;
-+	case CAN:
-+		errno = ECANCELED;
-+		break;
-+	default:
-+		errno = EPROTO;
-+		break;
-+	}
-+
-+	return rc;
-+}
-+
-+static int
-+kwboot_xmodem(int tty, const void *_data, size_t size)
-+{
-+	const uint8_t *data = _data;
-+	int rc, pnum, N, err;
-+
-+	pnum = 1;
-+	N = 0;
-+
-+	kwboot_printv("Sending boot image...\n");
-+
-+	do {
-+		struct kwboot_block block;
-+		int n;
-+
-+		n = kwboot_xm_makeblock(&block,
-+					data + N, size - N,
-+					pnum++);
-+		if (n < 0)
-+			goto can;
-+
-+		if (!n)
-+			break;
-+
-+		rc = kwboot_xm_sendblock(tty, &block);
-+		if (rc)
-+			goto out;
-+
-+		N += n;
-+		kwboot_progress(N * 100 / size, '.');
-+	} while (1);
-+
-+	rc = kwboot_tty_send_char(tty, EOT);
-+
-+out:
-+	return rc;
-+
-+can:
-+	err = errno;
-+	kwboot_tty_send_char(tty, CAN);
-+	errno = err;
-+	goto out;
-+}
-+
-+static int
-+kwboot_term_pipe(int in, int out, char *quit, int *s)
-+{
-+	ssize_t nin, nout;
-+	char _buf[128], *buf = _buf;
-+
-+	nin = read(in, buf, sizeof(buf));
-+	if (nin < 0)
-+		return -1;
-+
-+	if (quit) {
-+		int i;
-+
-+		for (i = 0; i < nin; i++) {
-+			if (*buf == quit[*s]) {
-+				(*s)++;
-+				if (!quit[*s])
-+					return 0;
-+				buf++;
-+				nin--;
-+			} else
-+				while (*s > 0) {
-+					nout = write(out, quit, *s);
-+					if (nout <= 0)
-+						return -1;
-+					(*s) -= nout;
-+				}
-+		}
-+	}
-+
-+	while (nin > 0) {
-+		nout = write(out, buf, nin);
-+		if (nout <= 0)
-+			return -1;
-+		nin -= nout;
-+	}
-+
-+	return 0;
-+}
-+
-+static int
-+kwboot_terminal(int tty)
-+{
-+	int rc, in, s;
-+	char *quit = "\34c";
-+	struct termios otio, tio;
-+
-+	rc = -1;
-+
-+	in = STDIN_FILENO;
-+	if (isatty(in)) {
-+		rc = tcgetattr(in, &otio);
-+		if (!rc) {
-+			tio = otio;
-+			cfmakeraw(&tio);
-+			rc = tcsetattr(in, TCSANOW, &tio);
-+		}
-+		if (rc) {
-+			perror("tcsetattr");
-+			goto out;
-+		}
-+
-+		kwboot_printv("[Type Ctrl-%c + %c to quit]\r\n",
-+			      quit[0]|0100, quit[1]);
-+	} else
-+		in = -1;
-+
-+	rc = 0;
-+	s = 0;
-+
-+	do {
-+		fd_set rfds;
-+		int nfds = 0;
-+
-+		FD_SET(tty, &rfds);
-+		nfds = nfds < tty ? tty : nfds;
-+
-+		if (in >= 0) {
-+			FD_SET(in, &rfds);
-+			nfds = nfds < in ? in : nfds;
-+		}
-+
-+		nfds = select(nfds + 1, &rfds, NULL, NULL, NULL);
-+		if (nfds < 0)
-+			break;
-+
-+		if (FD_ISSET(tty, &rfds)) {
-+			rc = kwboot_term_pipe(tty, STDOUT_FILENO, NULL, NULL);
-+			if (rc)
-+				break;
-+		}
-+
-+		if (FD_ISSET(in, &rfds)) {
-+			rc = kwboot_term_pipe(in, tty, quit, &s);
-+			if (rc)
-+				break;
-+		}
-+	} while (quit[s] != 0);
-+
-+	tcsetattr(in, TCSANOW, &otio);
-+out:
-+	return rc;
-+}
-+
-+static void *
-+kwboot_mmap_image(const char *path, size_t *size, int prot)
-+{
-+	int rc, fd, flags;
-+	struct stat st;
-+	void *img;
-+
-+	rc = -1;
-+	fd = -1;
-+	img = NULL;
-+
-+	fd = open(path, O_RDONLY);
-+	if (fd < 0)
-+		goto out;
-+
-+	rc = fstat(fd, &st);
-+	if (rc)
-+		goto out;
-+
-+	flags = (prot & PROT_WRITE) ? MAP_PRIVATE : MAP_SHARED;
-+
-+	img = mmap(NULL, st.st_size, prot, flags, fd, 0);
-+	if (img == MAP_FAILED) {
-+		img = NULL;
-+		goto out;
-+	}
-+
-+	rc = 0;
-+	*size = st.st_size;
-+out:
-+	if (rc && img) {
-+		munmap(img, st.st_size);
-+		img = NULL;
-+	}
-+	if (fd >= 0)
-+		close(fd);
-+
-+	return img;
-+}
-+
-+static uint8_t
-+kwboot_img_csum8(void *_data, size_t size)
-+{
-+	uint8_t *data = _data, csum;
-+
-+	for (csum = 0; size-- > 0; data++)
-+		csum += *data;
-+
-+	return csum;
-+}
-+
-+static int
-+kwboot_img_patch_hdr(void *img, size_t size)
-+{
-+	int rc;
-+	bhr_t *hdr;
-+	uint8_t csum;
-+	const size_t hdrsz = sizeof(*hdr);
-+
-+	rc = -1;
-+	hdr = img;
-+
-+	if (size < hdrsz) {
-+		errno = EINVAL;
-+		goto out;
-+	}
-+
-+	csum = kwboot_img_csum8(hdr, hdrsz) - hdr->checkSum;
-+	if (csum != hdr->checkSum) {
-+		errno = EINVAL;
-+		goto out;
-+	}
-+
-+	if (hdr->blockid == IBR_HDR_UART_ID) {
-+		rc = 0;
-+		goto out;
-+	}
-+
-+	hdr->blockid = IBR_HDR_UART_ID;
-+
-+	hdr->nandeccmode = IBR_HDR_ECC_DISABLED;
-+	hdr->nandpagesize = 0;
-+
-+	hdr->srcaddr = hdr->ext
-+		? sizeof(struct kwb_header)
-+		: sizeof(*hdr);
-+
-+	hdr->checkSum = kwboot_img_csum8(hdr, hdrsz) - csum;
-+
-+	rc = 0;
-+out:
-+	return rc;
-+}
-+
-+static void
-+kwboot_usage(FILE *stream, char *progname)
-+{
-+	fprintf(stream,
-+		"Usage: %s -b <image> [ -p ] [ -t ] "
-+		"[-B <baud> ] <TTY>\n", progname);
-+	fprintf(stream, "\n");
-+	fprintf(stream, "  -b <image>: boot <image>\n");
-+	fprintf(stream, "  -p: patch <image> to type 0x69 (uart boot)\n");
-+	fprintf(stream, "\n");
-+	fprintf(stream, "  -t: mini terminal\n");
-+	fprintf(stream, "\n");
-+	fprintf(stream, "  -B <baud>: set baud rate\n");
-+	fprintf(stream, "\n");
-+}
-+
-+int
-+main(int argc, char **argv)
-+{
-+	const char *ttypath, *imgpath;
-+	int rv, rc, tty, term, prot, patch;
-+	void *bootmsg;
-+	void *img;
-+	size_t size;
-+	speed_t speed;
-+
-+	rv = 1;
-+	tty = -1;
-+	bootmsg = NULL;
-+	imgpath = NULL;
-+	img = NULL;
-+	term = 0;
-+	patch = 0;
-+	size = 0;
-+	speed = B115200;
-+
-+	kwboot_verbose = isatty(STDOUT_FILENO);
-+
-+	do {
-+		int c = getopt(argc, argv, "hb:ptB:");
-+		if (c < 0)
-+			break;
-+
-+		switch (c) {
-+		case 'b':
-+			bootmsg = kwboot_msg_boot;
-+			imgpath = optarg;
-+			break;
-+
-+		case 'p':
-+			patch = 1;
-+			break;
-+
-+		case 't':
-+			term = 1;
-+			break;
-+
-+		case 'B':
-+			speed = kwboot_tty_speed(atoi(optarg));
-+			if (speed == -1)
-+				goto usage;
-+			break;
-+
-+		case 'h':
-+			rv = 0;
-+		default:
-+			goto usage;
-+		}
-+	} while (1);
-+
-+	if (!bootmsg && !term)
-+		goto usage;
-+
-+	if (patch && !imgpath)
-+		goto usage;
-+
-+	if (argc - optind < 1)
-+		goto usage;
-+
-+	ttypath = argv[optind++];
-+
-+	tty = kwboot_open_tty(ttypath, speed);
-+	if (tty < 0) {
-+		perror(ttypath);
-+		goto out;
-+	}
-+
-+	if (imgpath) {
-+		prot = PROT_READ | (patch ? PROT_WRITE : 0);
-+
-+		img = kwboot_mmap_image(imgpath, &size, prot);
-+		if (!img) {
-+			perror(imgpath);
-+			goto out;
-+		}
-+	}
-+
-+	if (patch) {
-+		rc = kwboot_img_patch_hdr(img, size);
-+		if (rc) {
-+			fprintf(stderr, "%s: Invalid image.\n", imgpath);
-+			goto out;
-+		}
-+	}
-+
-+	if (bootmsg) {
-+		rc = kwboot_bootmsg(tty, bootmsg);
-+		if (rc) {
-+			perror("bootmsg");
-+			goto out;
-+		}
-+	}
-+
-+	if (img) {
-+		rc = kwboot_xmodem(tty, img, size);
-+		if (rc) {
-+			perror("xmodem");
-+			goto out;
-+		}
-+	}
-+
-+	if (term) {
-+		rc = kwboot_terminal(tty);
-+		if (rc && !(errno == EINTR)) {
-+			perror("terminal");
-+			goto out;
-+		}
-+	}
-+
-+	rv = 0;
-+out:
-+	if (tty >= 0)
-+		close(tty);
-+
-+	if (img)
-+		munmap(img, size);
-+
-+	return rv;
-+
-+usage:
-+	kwboot_usage(rv ? stderr : stdout, basename(argv[0]));
-+	goto out;
-+}
diff --git a/package/boot/uboot-kirkwood/patches/0003-ide_bus.patch b/package/boot/uboot-kirkwood/patches/0003-ide_bus.patch
deleted file mode 100644
index c94d63d..0000000
--- a/package/boot/uboot-kirkwood/patches/0003-ide_bus.patch
+++ /dev/null
@@ -1,17 +0,0 @@
-http://lists.denx.de/pipermail/u-boot/2012-April/122594.html
-http://patchwork.ozlabs.org/patch/159129/
----
-
-diff --git a/include/ide.h b/include/ide.h
-index 8ecc9dd..385e909 100644
---- a/include/ide.h
-+++ b/include/ide.h
-@@ -24,7 +24,7 @@
- #ifndef	_IDE_H
- #define _IDE_H
- 
--#define	IDE_BUS(dev)	(dev >> 1)
-+#define IDE_BUS(dev)	(dev / (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS))
- 
- #define	ATA_CURR_BASE(dev)	(CONFIG_SYS_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
- 
diff --git a/package/boot/uboot-kirkwood/patches/100-iconnect.patch b/package/boot/uboot-kirkwood/patches/100-iconnect.patch
deleted file mode 100644
index d2f35ad..0000000
--- a/package/boot/uboot-kirkwood/patches/100-iconnect.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- a/boards.cfg
-+++ b/boards.cfg
-@@ -137,6 +137,7 @@ hawkboard_uart               arm
- enbw_cmc                     arm         arm926ejs   enbw_cmc            enbw           davinci
- calimain                     arm         arm926ejs   calimain            omicron        davinci
- dns325                       arm         arm926ejs   -                   d-link         kirkwood
-+iconnect                     arm         arm926ejs   -                   iomega         kirkwood
- km_kirkwood                  arm         arm926ejs   km_arm              keymile        kirkwood	km_kirkwood:KM_DISABLE_PCI
- km_kirkwood_pci              arm         arm926ejs   km_arm              keymile        kirkwood	km_kirkwood:KM_RECONFIG_XLX
- mgcoge3un                    arm         arm926ejs   km_arm              keymile        kirkwood