diff options
| author | Florian Fainelli <florian@openwrt.org> | 2012-12-06 22:39:47 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2012-12-06 22:39:47 +0000 |
| commit | 79c2ce01b718eb9f104a45e2339c5211b95e37a4 (patch) | |
| tree | a1d3230dd3c82064c49b6f33ccaa1d2d9241eb8f /target/linux/adm8668 | |
| parent | afc2b07be18f32327351c73d1e58f8e27fdc29bd (diff) | |
| download | mtk-20170518-79c2ce01b718eb9f104a45e2339c5211b95e37a4.zip mtk-20170518-79c2ce01b718eb9f104a45e2339c5211b95e37a4.tar.gz mtk-20170518-79c2ce01b718eb9f104a45e2339c5211b95e37a4.tar.bz2 | |
get rid of the UART defines
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 34549
Diffstat (limited to 'target/linux/adm8668')
| -rw-r--r-- | target/linux/adm8668/files/arch/mips/adm8668/early_printk.c | 6 | ||||
| -rw-r--r-- | target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h | 27 |
2 files changed, 3 insertions, 30 deletions
diff --git a/target/linux/adm8668/files/arch/mips/adm8668/early_printk.c b/target/linux/adm8668/files/arch/mips/adm8668/early_printk.c index 2a3e871..03dd72a 100644 --- a/target/linux/adm8668/files/arch/mips/adm8668/early_printk.c +++ b/target/linux/adm8668/files/arch/mips/adm8668/early_printk.c @@ -1,5 +1,5 @@ #include <linux/io.h> -#include <linux/serial_core.h> +#include <linux/amba/serial.h> #include <adm8668.h> #define UART_READ(r) \ @@ -10,7 +10,7 @@ void prom_putchar(char c) { - UART_WRITE(c, UART_DR_REG); - while ((UART_READ(UART_FR_REG) & UART_TX_FIFO_FULL) != 0) + UART_WRITE(c, UART01x_DR); + while ((UART_READ(UART01x_FR) & UART01x_FR_TXFF) != 0) ; } diff --git a/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h b/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h index 2cf65d8..1f7ab72 100644 --- a/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h +++ b/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h @@ -31,33 +31,6 @@ /** onboard uart **/ #define ADM8668_UARTCLK_FREQ 62500000 -/* registers */ -#define UART_DR_REG 0x00 -#define UART_RSR_REG 0x04 -#define UART_CR_REG 0x14 -#define UART_FR_REG 0x18 -#define UART_IIR_REG 0x1C - -/* rsr reg */ -#define UART_FRAMING_ERR 0x01 -#define UART_PARITY_ERR 0x02 -#define UART_BREAK_ERR 0x04 -#define UART_OVERRUN_ERR 0x08 -#define UART_RX_STATUS_MASK 0x0F - -/* cr reg */ -#define UART_RX_INT_EN 0x10 -#define UART_TX_INT_EN 0x20 -#define UART_RX_TIMEOUT_INT_EN 0x40 - -/* fr reg */ -#define UART_RX_FIFO_EMPTY 0x10 -#define UART_TX_FIFO_FULL 0x20 - -/* iir reg */ -#define UART_RX_INT 0x02 -#define UART_TX_INT 0x04 -#define UART_RX_TIMEOUT_INT 0x08 /* interrupt controller */ #define IRQ_STATUS_REG 0x00 /* Read */ |