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| author | Florian Fainelli <florian@openwrt.org> | 2012-12-06 22:40:26 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2012-12-06 22:40:26 +0000 |
| commit | b1f1381c27bdc7566db17a763093d594f95042f7 (patch) | |
| tree | 6ce0f1027079d3f3a61b22b83685dd5556e1448b /target/linux/adm8668 | |
| parent | 60663b12b28ae7d9e2cc85b62caef5d48b0b0a5d (diff) | |
| download | mtk-20170518-b1f1381c27bdc7566db17a763093d594f95042f7.zip mtk-20170518-b1f1381c27bdc7566db17a763093d594f95042f7.tar.gz mtk-20170518-b1f1381c27bdc7566db17a763093d594f95042f7.tar.bz2 | |
move clock frequencies into clock driver
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 34556
Diffstat (limited to 'target/linux/adm8668')
| -rw-r--r-- | target/linux/adm8668/files/arch/mips/adm8668/clock.c | 4 | ||||
| -rw-r--r-- | target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h | 5 |
2 files changed, 2 insertions, 7 deletions
diff --git a/target/linux/adm8668/files/arch/mips/adm8668/clock.c b/target/linux/adm8668/files/arch/mips/adm8668/clock.c index 6c839a2..1e010fc 100644 --- a/target/linux/adm8668/files/arch/mips/adm8668/clock.c +++ b/target/linux/adm8668/files/arch/mips/adm8668/clock.c @@ -19,7 +19,7 @@ struct clk { }; static struct clk uart_clk = { - .rate = ADM8668_UARTCLK_FREQ, + .rate = 62500000, }; static struct clk sys_clk; @@ -70,7 +70,7 @@ void __init adm8668_init_clocks(void) * CR3 bit 14~11, 0000 -> 175MHz, 0001 -> 180MHz, etc... */ adj = (ADM8668_CONFIG_REG(ADM8668_CR3) >> 11) & 0xf; - sys_clk.rate = SYS_CLOCK + adj * 5000000; + sys_clk.rate = 175000000 + (adj * 5000000); pr_info("ADM8668 CPU clock: %lu MHz\n", sys_clk.rate / 1000000); } diff --git a/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h b/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h index f0608d1..f7b2c5e 100644 --- a/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h +++ b/target/linux/adm8668/files/arch/mips/include/asm/mach-adm8668/adm8668.h @@ -9,8 +9,6 @@ #ifndef __ADM8668_H__ #define __ADM8668_H__ -#define SYS_CLOCK 175000000 - /*======================= Physical Memory Map ============================*/ #define ADM8668_SDRAM_BASE 0 #define ADM8668_SMEM1_BASE 0x10000000 @@ -29,9 +27,6 @@ #define ADM8668_PCICFG_BASE 0x12200000 #define ADM8668_PCIDAT_BASE 0x12400000 -/** onboard uart **/ -#define ADM8668_UARTCLK_FREQ 62500000 - /* interrupt levels */ #define INT_LVL_SWI 1 #define INT_LVL_COMMS_RX 2 |