summaryrefslogtreecommitdiff
path: root/target/linux/ar7/files
diff options
context:
space:
mode:
authorFlorian Fainelli <florian@openwrt.org>2009-05-27 16:22:01 +0000
committerFlorian Fainelli <florian@openwrt.org>2009-05-27 16:22:01 +0000
commitfc72d90103b2a4fcb9c38ecafb187e3b5a5f6313 (patch)
treecc162cf982ea60174c32ded3a9cfa071dc057301 /target/linux/ar7/files
parent33f6145c51a85d948dbbdf8adcd287ad01ecf3ca (diff)
downloadmtk-20170518-fc72d90103b2a4fcb9c38ecafb187e3b5a5f6313.zip
mtk-20170518-fc72d90103b2a4fcb9c38ecafb187e3b5a5f6313.tar.gz
mtk-20170518-fc72d90103b2a4fcb9c38ecafb187e3b5a5f6313.tar.bz2
revert part of r16112, the setup.c part needs more testing
SVN-Revision: 16113
Diffstat (limited to 'target/linux/ar7/files')
-rw-r--r--target/linux/ar7/files/arch/mips/ar7/setup.c38
1 files changed, 1 insertions, 37 deletions
diff --git a/target/linux/ar7/files/arch/mips/ar7/setup.c b/target/linux/ar7/files/arch/mips/ar7/setup.c
index f54aedc..3448fd2 100644
--- a/target/linux/ar7/files/arch/mips/ar7/setup.c
+++ b/target/linux/ar7/files/arch/mips/ar7/setup.c
@@ -19,9 +19,6 @@
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/pm.h>
-#include <linux/console.h>
-#include <linux/serial.h>
-#include <linux/serial_8250.h>
#include <asm/reboot.h>
#include <asm/time.h>
@@ -72,40 +69,7 @@ const char *get_system_type(void)
static int __init ar7_init_console(void)
{
- int res;
-
- static struct uart_port uart_port[2];
-
- memset(uart_port, 0, sizeof(struct uart_port) * 2);
-
- uart_port[0].type = PORT_AR7;
- uart_port[0].line = 0;
- uart_port[0].irq = AR7_IRQ_UART0;
- uart_port[0].uartclk = ar7_bus_freq() / 2;
- uart_port[0].iotype = UPIO_MEM;
- uart_port[0].mapbase = AR7_REGS_UART0;
- uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
- uart_port[0].regshift = 2;
- res = early_serial_setup(&uart_port[0]);
- if (res)
- return res;
-
- /* Only TNETD73xx have a second serial port */
- if (ar7_has_second_uart()) {
- uart_port[1].type = PORT_AR7;
- uart_port[1].line = 1;
- uart_port[1].irq = AR7_IRQ_UART1;
- uart_port[1].uartclk = ar7_bus_freq() / 2;
- uart_port[1].iotype = UPIO_MEM;
- uart_port[1].mapbase = UR8_REGS_UART1;
- uart_port[1].membase = ioremap(uart_port[1].mapbase, 256);
- uart_port[1].regshift = 2;
- res = early_serial_setup(&uart_port[1]);
- if (res)
- return res;
- }
-
- return add_preferred_console("ttyS", 0, NULL);
+ return 0;
}
/*