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authorFelix Fietkau <nbd@openwrt.org>2012-05-27 21:02:41 +0000
committerFelix Fietkau <nbd@openwrt.org>2012-05-27 21:02:41 +0000
commit8039a1bbb2056019458b5179108e399d0fcb0622 (patch)
tree820b0a72ed89ad6af336003517da144194f614bb /target/linux/ar71xx/files/drivers
parentf638414fdc8acf3d4742e933b0e9303bbf6a0065 (diff)
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ar71xx: fix MII clock settings for various chips, improves ethernet stability on AR934x
SVN-Revision: 31925
Diffstat (limited to 'target/linux/ar71xx/files/drivers')
-rw-r--r--target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h8
-rw-r--r--target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c10
2 files changed, 16 insertions, 2 deletions
diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
index ec764c5..8817416 100644
--- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
+++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
@@ -322,6 +322,14 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
#define MII_CFG_CLK_DIV_14 5
#define MII_CFG_CLK_DIV_20 6
#define MII_CFG_CLK_DIV_28 7
+#define MII_CFG_CLK_DIV_34 8
+#define MII_CFG_CLK_DIV_42 9
+#define MII_CFG_CLK_DIV_50 10
+#define MII_CFG_CLK_DIV_58 11
+#define MII_CFG_CLK_DIV_66 12
+#define MII_CFG_CLK_DIV_74 13
+#define MII_CFG_CLK_DIV_82 14
+#define MII_CFG_CLK_DIV_98 15
#define MII_CFG_RESET BIT(31)
#define MII_CMD_WRITE 0x0
diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c
index 552c7bf..a863214 100644
--- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c
+++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c
@@ -103,6 +103,12 @@ static int ag71xx_mdio_reset(struct mii_bus *bus)
if (am->pdata->is_ar7240)
t = MII_CFG_CLK_DIV_6;
+ else if (am->pdata->is_ar9330)
+ t = MII_CFG_CLK_DIV_98;
+ else if (am->pdata->builtin_switch && !am->pdata->is_ar934x)
+ t = MII_CFG_CLK_DIV_10;
+ else if (!am->pdata->builtin_switch && am->pdata->is_ar934x)
+ t = MII_CFG_CLK_DIV_58;
else
t = MII_CFG_CLK_DIV_28;
@@ -119,7 +125,7 @@ static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg)
{
struct ag71xx_mdio *am = bus->priv;
- if (am->pdata->is_ar7240)
+ if (am->pdata->builtin_switch)
return ar7240sw_phy_read(bus, addr, reg);
else
return ag71xx_mdio_mii_read(am, addr, reg);
@@ -129,7 +135,7 @@ static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
{
struct ag71xx_mdio *am = bus->priv;
- if (am->pdata->is_ar7240)
+ if (am->pdata->builtin_switch)
ar7240sw_phy_write(bus, addr, reg, val);
else
ag71xx_mdio_mii_write(am, addr, reg, val);