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authorGabor Juhos <juhosg@openwrt.org>2015-04-07 20:03:24 +0000
committerGabor Juhos <juhosg@openwrt.org>2015-04-07 20:03:24 +0000
commitf0cbd004ee3992c6c8cbee0466fa5a53bbf50e80 (patch)
tree6cae0cce2f14fc725abf09842109f7f0f184a7c6 /target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
parent298a46c0b302b070994c340e3d321ebccfeb4c2a (diff)
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ar71xx: select RLE_DECOMPRESS directly by the RouterBOOT helper code
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 45296
Diffstat (limited to 'target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch')
-rw-r--r--target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
index 9b69869..1f6a4d2 100644
--- a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
+++ b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
@@ -22,7 +22,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
-@@ -1178,6 +1178,10 @@ config SOC_AR934X
+@@ -1174,6 +1174,10 @@ config SOC_AR934X
select PCI_AR724X if PCI
def_bool n
@@ -33,7 +33,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
config SOC_QCA955X
select HW_HAS_PCI
select PCI_AR724X if PCI
-@@ -1220,7 +1224,7 @@ config ATH79_DEV_USB
+@@ -1216,7 +1220,7 @@ config ATH79_DEV_USB
def_bool n
config ATH79_DEV_WMAC