diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2013-02-21 17:47:15 +0000 |
---|---|---|
committer | Gabor Juhos <juhosg@openwrt.org> | 2013-02-21 17:47:15 +0000 |
commit | cf2324fd6b6752ce511b612fc192ab9f0b6a32cb (patch) | |
tree | 4f94e8ab5c7b998cb84115489594f670957f3d4b /target/linux/ar71xx/patches-3.8/202-spi-ath79-remove-superfluous-chip-select-code.patch | |
parent | 9cc3a60b5a6988759532b63a6fb513484b8ec9f9 (diff) | |
download | mtk-20170518-cf2324fd6b6752ce511b612fc192ab9f0b6a32cb.zip mtk-20170518-cf2324fd6b6752ce511b612fc192ab9f0b6a32cb.tar.gz mtk-20170518-cf2324fd6b6752ce511b612fc192ab9f0b6a32cb.tar.bz2 |
ar71xx: add support for 3.8
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35728
Diffstat (limited to 'target/linux/ar71xx/patches-3.8/202-spi-ath79-remove-superfluous-chip-select-code.patch')
-rw-r--r-- | target/linux/ar71xx/patches-3.8/202-spi-ath79-remove-superfluous-chip-select-code.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.8/202-spi-ath79-remove-superfluous-chip-select-code.patch b/target/linux/ar71xx/patches-3.8/202-spi-ath79-remove-superfluous-chip-select-code.patch new file mode 100644 index 0000000..eec3293 --- /dev/null +++ b/target/linux/ar71xx/patches-3.8/202-spi-ath79-remove-superfluous-chip-select-code.patch @@ -0,0 +1,30 @@ +From 06752f9b169493cd1323f8337c147ad2dd31025c Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <juhosg@openwrt.org> +Date: Mon, 9 Jan 2012 15:03:28 +0100 +Subject: [PATCH 30/34] spi/ath79: remove superfluous chip select code + +The spi_bitbang driver calls the chipselect function +of the driver from spi_bitbang_setup in order to +deselect the given SPI chip, so we don't have to +initialize the CS line here. + +Signed-off-by: Gabor Juhos <juhosg@openwrt.org> +--- + drivers/spi/spi-ath79.c | 6 ------ + 1 files changed, 0 insertions(+), 6 deletions(-) + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -128,12 +128,6 @@ static int ath79_spi_setup_cs(struct spi + gpio_free(cdata->gpio); + return status; + } +- } else { +- if (spi->mode & SPI_CS_HIGH) +- sp->ioc_base |= AR71XX_SPI_IOC_CS0; +- else +- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; +- ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); + } + + return 0; |