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| author | Felix Fietkau <nbd@openwrt.org> | 2015-03-13 02:59:43 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2015-03-13 02:59:43 +0000 |
| commit | 2c463148d11279a017a6872ea758e2304585e4c3 (patch) | |
| tree | fe76a335f3a71fd22af967a97c1540493f43ddbe /target/linux/atheros/patches-3.18 | |
| parent | f458d11655228237e890b87f62f9a1cc61b6ab61 (diff) | |
| download | mtk-20170518-2c463148d11279a017a6872ea758e2304585e4c3.zip mtk-20170518-2c463148d11279a017a6872ea758e2304585e4c3.tar.gz mtk-20170518-2c463148d11279a017a6872ea758e2304585e4c3.tar.bz2 | |
atheros: v3.18: relocate PCI host DMA base definition
Put AR2315_PCI_HOST_SDRAM_BASEADDR macro to DMA header, since this is
arbitrary value and not some hw specific constant. Also this relocation
decouples dma from HW specific header.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 44716
Diffstat (limited to 'target/linux/atheros/patches-3.18')
| -rw-r--r-- | target/linux/atheros/patches-3.18/100-board.patch | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/target/linux/atheros/patches-3.18/100-board.patch b/target/linux/atheros/patches-3.18/100-board.patch index 2099514..1e9245e 100644 --- a/target/linux/atheros/patches-3.18/100-board.patch +++ b/target/linux/atheros/patches-3.18/100-board.patch @@ -497,7 +497,7 @@ +#endif /* __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H */ --- /dev/null +++ b/arch/mips/include/asm/mach-ath25/dma-coherence.h -@@ -0,0 +1,76 @@ +@@ -0,0 +1,82 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive @@ -511,7 +511,13 @@ +#define __ASM_MACH_ATH25_DMA_COHERENCE_H + +#include <linux/device.h> -+#include <ar2315_regs.h> ++ ++/* ++ * We need some arbitrary non-zero value to be programmed to the BAR1 register ++ * of PCI host controller to enable DMA. The same value should be used as the ++ * offset to calculate the physical address of DMA buffer for PCI devices. ++ */ ++#define AR2315_PCI_HOST_SDRAM_BASEADDR 0x20000000 + +static inline dma_addr_t ath25_dev_offset(struct device *dev) +{ @@ -623,7 +629,7 @@ +#endif /* __ASM_MACH_ATH25_WAR_H */ --- /dev/null +++ b/arch/mips/include/asm/mach-ath25/ar2315_regs.h -@@ -0,0 +1,608 @@ +@@ -0,0 +1,601 @@ +/* + * Register definitions for AR2315+ + * @@ -1217,13 +1223,6 @@ +#define AR2315_IRCFG_SEQ_END_WIN_THRESH 0x001f0000 +#define AR2315_IRCFG_NUM_BACKOFF_WORDS 0x01e00000 + -+/* -+ * We need some arbitrary non-zero value to be programmed to the BAR1 register -+ * of PCI host controller to enable DMA. The same value should be used as the -+ * offset to calculate the physical address of DMA buffer for PCI devices. -+ */ -+#define AR2315_PCI_HOST_SDRAM_BASEADDR 0x20000000 -+ +/* ??? access BAR */ +#define AR2315_PCI_HOST_MBAR0 0x10000000 +/* RAM access BAR */ |