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authorGabor Juhos <juhosg@openwrt.org>2008-04-20 09:10:50 +0000
committerGabor Juhos <juhosg@openwrt.org>2008-04-20 09:10:50 +0000
commit1f666fa4597abc453c0923de99b27a473730ca0c (patch)
tree6a011218e6520a49c45efcf1c48e076a9eaa1d30 /target/linux/atheros
parentc55299adb4ec95cb7321d8977490d6bdb19326e0 (diff)
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remove the clz function, use fls instead
SVN-Revision: 10878
Diffstat (limited to 'target/linux/atheros')
-rw-r--r--target/linux/atheros/files/arch/mips/atheros/ar5315/irq.c3
-rw-r--r--target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h23
2 files changed, 2 insertions, 24 deletions
diff --git a/target/linux/atheros/files/arch/mips/atheros/ar5315/irq.c b/target/linux/atheros/files/arch/mips/atheros/ar5315/irq.c
index ed784ba..69cb362 100644
--- a/target/linux/atheros/files/arch/mips/atheros/ar5315/irq.c
+++ b/target/linux/atheros/files/arch/mips/atheros/ar5315/irq.c
@@ -20,6 +20,7 @@
#include <linux/kernel.h>
#include <linux/reboot.h>
#include <linux/interrupt.h>
+#include <linux/bitops.h>
#include <asm/bootinfo.h>
#include <asm/irq_cpu.h>
#include <asm/io.h>
@@ -39,7 +40,7 @@ static inline void ar5315_gpio_irq(void)
if (!pend)
return;
- do_IRQ(AR531X_GPIO_IRQ_BASE + 31 - clz(pend));
+ do_IRQ(AR531X_GPIO_IRQ_BASE + fls(pend) - 1);
}
diff --git a/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h b/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h
index dccf541..ba52a2b 100644
--- a/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h
+++ b/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h
@@ -12,29 +12,6 @@ extern void (*board_time_init)(void);
#endif
/*
- * C access to CLZ instruction
- * (count leading zeroes).
- */
-static inline int clz(unsigned long val)
-{
- int ret;
-
- __asm__ volatile (
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- ".set\tmips32\n\t"
- "clz\t%0,%1\n\t"
- ".set\tmips0\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (ret)
- : "r" (val)
- );
-
- return ret;
-}
-
-/*
* Atheros CPUs before the AR2315 are using MIPS 4Kc core, later designs are
* using MIPS 4KEc R2 core. This makes it easy to determine the board at runtime.
*/