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authorÁlvaro Fernández Rojas <noltari@gmail.com>2017-02-06 17:12:09 +0100
committerÁlvaro Fernández Rojas <noltari@gmail.com>2017-02-06 22:24:42 +0100
commitdab5a4406799633a319381b0127e1fda82b15c02 (patch)
tree7d100dfd99914c1195ccada0f62387d4fced8563 /target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch
parent6b01f0f196c0c1ff43c362e9aef4433eacbbb8c6 (diff)
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brcm2708: update linux 4.4 patches to latest version
n As usual these patches were extracted and rebased from the raspberry pi repo: https://github.com/raspberrypi/linux/tree/rpi-4.4.y Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch')
-rw-r--r--target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch81
1 files changed, 81 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch b/target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch
new file mode 100644
index 0000000..7dd62a7
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch
@@ -0,0 +1,81 @@
+From 03e5edc82cd5df9f0fc6704d59a6f9aee3ef3552 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Mon, 16 Jan 2017 14:53:12 +0000
+Subject: [PATCH] BCM270X_DT: Add spi0-cs overlay
+
+The spi0-cs overlay allows the software chip selectts to be modified
+using the cs0_pin and cs1_pin parameters.
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 9 +++++++-
+ arch/arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 ++++++++++++++++++++++++++
+ 3 files changed, 38 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -93,6 +93,7 @@ dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi-rtc.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += spi0-cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi0-hw-cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -1131,7 +1131,7 @@ Params: <None>
+
+
+ Name: spi-gpio35-39
+-Info: move SPI function block to GPIO 35 to 39
++Info: Move SPI function block to GPIO 35 to 39
+ Load: dtoverlay=spi-gpio35-39
+ Params: <None>
+
+@@ -1142,6 +1142,13 @@ Load: dtoverlay=spi-rtc,<param>=<val>
+ Params: pcf2123 Select the PCF2123 device
+
+
++Name: spi0-cs
++Info: Allows the (software) CS pins for SPI0 to be changed
++Load: dtoverlay=spi0-cs,<param>=<val>
++Params: cs0_pin GPIO pin for CS0 (default 8)
++ cs1_pin GPIO pin for CS1 (default 7)
++
++
+ Name: spi0-hw-cs
+ Info: Re-enables hardware CS/CE (chip selects) for SPI0
+ Load: dtoverlay=spi0-hw-cs
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
+@@ -0,0 +1,29 @@
++/dts-v1/;
++/plugin/;
++
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&spi0_cs_pins>;
++ frag0: __overlay__ {
++ brcm,pins = <8 7>;
++ };
++ };
++
++ fragment@1 {
++ target = <&spi0>;
++ frag1: __overlay__ {
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ cs0_pin = <&frag0>,"brcm,pins:0",
++ <&frag1>,"cs-gpios:4";
++ cs1_pin = <&frag0>,"brcm,pins:4",
++ <&frag1>,"cs-gpios:16";
++ };
++};