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author | Hauke Mehrtens <hauke@hauke-m.de> | 2009-03-01 20:19:55 +0000 |
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committer | Hauke Mehrtens <hauke@hauke-m.de> | 2009-03-01 20:19:55 +0000 |
commit | 4c548fbacad57bdbf903c0060d1b28e329cf0690 (patch) | |
tree | 7c635acbbd1d8e206d19d73aa6190a7b4a7139e0 /target/linux/brcm47xx/patches-2.6.28/220-bcm5354.patch | |
parent | 1b922ab410fd1e1a0c2320ba097a79d09dfe9788 (diff) | |
download | mtk-20170518-4c548fbacad57bdbf903c0060d1b28e329cf0690.zip mtk-20170518-4c548fbacad57bdbf903c0060d1b28e329cf0690.tar.gz mtk-20170518-4c548fbacad57bdbf903c0060d1b28e329cf0690.tar.bz2 |
refresh patches and configuration
SVN-Revision: 14722
Diffstat (limited to 'target/linux/brcm47xx/patches-2.6.28/220-bcm5354.patch')
-rw-r--r-- | target/linux/brcm47xx/patches-2.6.28/220-bcm5354.patch | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/target/linux/brcm47xx/patches-2.6.28/220-bcm5354.patch b/target/linux/brcm47xx/patches-2.6.28/220-bcm5354.patch index 723e638..a6a5e95 100644 --- a/target/linux/brcm47xx/patches-2.6.28/220-bcm5354.patch +++ b/target/linux/brcm47xx/patches-2.6.28/220-bcm5354.patch @@ -1,7 +1,6 @@ -diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c --- a/drivers/ssb/driver_chipcommon.c +++ b/drivers/ssb/driver_chipcommon.c -@@ -270,6 +270,8 @@ void ssb_chipco_resume(struct ssb_chipcommon *cc) +@@ -270,6 +270,8 @@ void ssb_chipco_resume(struct ssb_chipco void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc, u32 *plltype, u32 *n, u32 *m) { @@ -10,7 +9,7 @@ diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N); *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); switch (*plltype) { -@@ -293,6 +295,8 @@ void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc, +@@ -293,6 +295,8 @@ void ssb_chipco_get_clockcpu(struct ssb_ void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc, u32 *plltype, u32 *n, u32 *m) { @@ -19,10 +18,9 @@ diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N); *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); switch (*plltype) { -diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c --- a/drivers/ssb/driver_mipscore.c +++ b/drivers/ssb/driver_mipscore.c -@@ -161,6 +161,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *mcore) +@@ -161,6 +161,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) { rate = 200000000; @@ -31,7 +29,6 @@ diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c } else { rate = ssb_calc_clock_rate(pll_type, n, m); } -diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c --- a/drivers/ssb/main.c +++ b/drivers/ssb/main.c @@ -1011,6 +1011,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus) |