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authorFlorian Fainelli <florian@openwrt.org>2008-02-13 17:31:17 +0000
committerFlorian Fainelli <florian@openwrt.org>2008-02-13 17:31:17 +0000
commitebf4eb11e9a15e1d76a373c453dfd8f2752a4bd6 (patch)
tree08f73c8455580480092fc17eff25fadfeebdba3a /target/linux/brcm63xx/files/include
parentc592ef61b366aa791913ce6956b362afba08e7fe (diff)
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Upgrade brcm63xx to 2.6.24
SVN-Revision: 10455
Diffstat (limited to 'target/linux/brcm63xx/files/include')
-rw-r--r--target/linux/brcm63xx/files/include/asm-mips/mach-bcm963xx/war.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm963xx/war.h b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm963xx/war.h
new file mode 100644
index 0000000..0f09a31
--- /dev/null
+++ b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm963xx/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_BCM963XX_WAR_H
+#define __ASM_MIPS_MACH_BCM963XX_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#define R4600_V1_HIT_CACHEOP_WAR 0
+#define R4600_V2_HIT_CACHEOP_WAR 0
+#define R5432_CP0_INTERRUPT_WAR 0
+#define BCM1250_M3_WAR 0
+#define SIBYTE_1956_WAR 0
+#define MIPS4K_ICACHE_REFILL_WAR 0
+#define MIPS_CACHE_SYNC_WAR 0
+#define TX49XX_ICACHE_INDEX_INV_WAR 0
+#define RM9000_CDEX_SMP_WAR 0
+#define ICACHE_REFILLS_WORKAROUND_WAR 0
+#define R10000_LLSC_WAR 0
+#define MIPS34K_MISSED_ITLB_WAR 0
+
+#endif /* __ASM_MIPS_MACH_BCM963XX_WAR_H */