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author | Jonas Gorski <jogo@openwrt.org> | 2014-08-01 21:56:31 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2014-08-01 21:56:31 +0000 |
commit | 701e2a38fef4fce862eaeb21fc97874a6387a569 (patch) | |
tree | ff25cf2649946ea51b35d435138362c84e8129e7 /target/linux/brcm63xx/image/lzma-loader/src/cp0regdef.h | |
parent | 21845cb45da7b6da12fe977b38bfa68d4f72d9c1 (diff) | |
download | mtk-20170518-701e2a38fef4fce862eaeb21fc97874a6387a569.zip mtk-20170518-701e2a38fef4fce862eaeb21fc97874a6387a569.tar.gz mtk-20170518-701e2a38fef4fce862eaeb21fc97874a6387a569.tar.bz2 |
brcm63xx: add working lzma-loader and use it for initramfs
Add a working lzma loader and use it for generating initramfs kernels
to allow easily netbooting elf kernels on devices with a 4 MiB CFE
size limit.
Based on ar71xx's lzma-loader.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 41940
Diffstat (limited to 'target/linux/brcm63xx/image/lzma-loader/src/cp0regdef.h')
-rw-r--r-- | target/linux/brcm63xx/image/lzma-loader/src/cp0regdef.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/cp0regdef.h b/target/linux/brcm63xx/image/lzma-loader/src/cp0regdef.h new file mode 100644 index 0000000..0d824f4 --- /dev/null +++ b/target/linux/brcm63xx/image/lzma-loader/src/cp0regdef.h @@ -0,0 +1,54 @@ +/* + * Copyright (C) 1994, 1995, 1996, 1997, 2000, 2001 by Ralf Baechle + * + * Copyright (C) 2001, Monta Vista Software + * Author: jsun@mvista.com or jsun@junsun.net + */ +#ifndef _cp0regdef_h_ +#define _cp0regdef_h_ + +#define CP0_INDEX $0 +#define CP0_RANDOM $1 +#define CP0_ENTRYLO0 $2 +#define CP0_ENTRYLO1 $3 +#define CP0_CONTEXT $4 +#define CP0_PAGEMASK $5 +#define CP0_WIRED $6 +#define CP0_BADVADDR $8 +#define CP0_COUNT $9 +#define CP0_ENTRYHI $10 +#define CP0_COMPARE $11 +#define CP0_STATUS $12 +#define CP0_CAUSE $13 +#define CP0_EPC $14 +#define CP0_PRID $15 +#define CP0_CONFIG $16 +#define CP0_LLADDR $17 +#define CP0_WATCHLO $18 +#define CP0_WATCHHI $19 +#define CP0_XCONTEXT $20 +#define CP0_FRAMEMASK $21 +#define CP0_DIAGNOSTIC $22 +#define CP0_PERFORMANCE $25 +#define CP0_ECC $26 +#define CP0_CACHEERR $27 +#define CP0_TAGLO $28 +#define CP0_TAGHI $29 +#define CP0_ERROREPC $30 + +#define read_32bit_c0_register(reg,sel) \ +({ int __res; \ + if (sel == 0) \ + __asm__ __volatile__( \ + "mfc0\t%0, " #reg "\n\t" \ + : "=r" (__res)); \ + else \ + __asm__ __volatile__( \ + ".set\tmips32\n\t" \ + "mfc0\t%0, " #reg ", " #sel "\n\t" \ + ".set mips0\n\t" \ + : "=r" (__res)); \ + __res; \ +}) + +#endif |