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authorJonas Gorski <jogo@openwrt.org>2014-01-13 12:13:05 +0000
committerJonas Gorski <jogo@openwrt.org>2014-01-13 12:13:05 +0000
commitd8ac24b325a8db1f88c2eeb359ea55e6e53259bb (patch)
tree81a585224a19a680d861a282d2bdec9355f28c4d /target/linux/brcm63xx/patches-3.10/060-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch
parentd9a20b6f461c3be0278ab8e05c2338f7b232482f (diff)
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brcm63xx: update bmips patches with upstream submission
Update bmips cleanup patches with upstream submission and backport a few bmips fixes. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 39267
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/060-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.10/060-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch36
1 files changed, 36 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/060-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch b/target/linux/brcm63xx/patches-3.10/060-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch
new file mode 100644
index 0000000..b50f0b8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.10/060-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch
@@ -0,0 +1,36 @@
+From 8bd8f46cbc709974b26396aa440133db4484015e Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 28 Jun 2013 00:25:13 +0200
+Subject: [PATCH V2 01/13] MIPS: BCM63XX: disable SMP also on BCM3368
+
+BCM3368 has the same shared TLB as BCM6358.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/prom.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -64,9 +64,9 @@ void __init prom_init(void)
+ register_smp_ops(&bmips_smp_ops);
+
+ /*
+- * BCM6328 might not have its second CPU enabled, while BCM6358
+- * needs special handling for its shared TLB, so disable SMP
+- * for now.
++ * BCM6328 might not have its second CPU enabled, while BCM3368
++ * and BCM6358 need special handling for their shared TLB, so
++ * disable SMP for now.
+ */
+ if (BCMCPU_IS_6328()) {
+ reg = bcm_readl(BCM_6328_OTP_BASE +
+@@ -74,7 +74,7 @@ void __init prom_init(void)
+
+ if (reg & OTP_6328_REG3_TP1_DISABLED)
+ bmips_smp_enabled = 0;
+- } else if (BCMCPU_IS_6358()) {
++ } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
+ bmips_smp_enabled = 0;
+ }
+