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| author | Jonas Gorski <jogo@openwrt.org> | 2013-01-04 14:47:43 +0000 |
|---|---|---|
| committer | Jonas Gorski <jogo@openwrt.org> | 2013-01-04 14:47:43 +0000 |
| commit | 10fc07daacfee223f869397d356d1481e4094e12 (patch) | |
| tree | 6a82d3ed0768bbed69af8bdce78fa4434bb3cf72 /target/linux/brcm63xx/patches-3.3/003-MIPS-BCM63XX-add-IRQ_SPI-and-CPU-specific-SPI-IRQ-va.patch | |
| parent | 3b7882e7752f154ce6407c892e7b92015c5c3481 (diff) | |
| download | mtk-20170518-10fc07daacfee223f869397d356d1481e4094e12.zip mtk-20170518-10fc07daacfee223f869397d356d1481e4094e12.tar.gz mtk-20170518-10fc07daacfee223f869397d356d1481e4094e12.tar.bz2 | |
bcm63xx: remove 3.3 support
3.6 is tested enough to be considered stable.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 35009
Diffstat (limited to 'target/linux/brcm63xx/patches-3.3/003-MIPS-BCM63XX-add-IRQ_SPI-and-CPU-specific-SPI-IRQ-va.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.3/003-MIPS-BCM63XX-add-IRQ_SPI-and-CPU-specific-SPI-IRQ-va.patch | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/target/linux/brcm63xx/patches-3.3/003-MIPS-BCM63XX-add-IRQ_SPI-and-CPU-specific-SPI-IRQ-va.patch b/target/linux/brcm63xx/patches-3.3/003-MIPS-BCM63XX-add-IRQ_SPI-and-CPU-specific-SPI-IRQ-va.patch deleted file mode 100644 index b4c787c..0000000 --- a/target/linux/brcm63xx/patches-3.3/003-MIPS-BCM63XX-add-IRQ_SPI-and-CPU-specific-SPI-IRQ-va.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 04456614952a9a848192253439b4e361f0321cb5 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli <florian@openwrt.org> -Date: Wed, 25 Jan 2012 17:39:51 +0100 -Subject: [PATCH 05/63] MIPS: BCM63XX: add IRQ_SPI and CPU specific SPI IRQ values - -Signed-off-by: Florian Fainelli <florian@openwrt.org> ---- - arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 7 +++++++ - 1 files changed, 7 insertions(+), 0 deletions(-) - ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -@@ -478,6 +478,7 @@ static inline unsigned long bcm63xx_regs - */ - enum bcm63xx_irq { - IRQ_TIMER = 0, -+ IRQ_SPI, - IRQ_UART0, - IRQ_UART1, - IRQ_DSL, -@@ -509,6 +510,7 @@ enum bcm63xx_irq { - * 6338 irqs - */ - #define BCM_6338_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) -+#define BCM_6338_SPI_IRQ (IRQ_INTERNAL_BASE + 1) - #define BCM_6338_UART0_IRQ (IRQ_INTERNAL_BASE + 2) - #define BCM_6338_UART1_IRQ 0 - #define BCM_6338_DSL_IRQ (IRQ_INTERNAL_BASE + 5) -@@ -539,6 +541,7 @@ enum bcm63xx_irq { - * 6345 irqs - */ - #define BCM_6345_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) -+#define BCM_6345_SPI_IRQ 0 - #define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2) - #define BCM_6345_UART1_IRQ 0 - #define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3) -@@ -569,6 +572,7 @@ enum bcm63xx_irq { - * 6348 irqs - */ - #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) -+#define BCM_6348_SPI_IRQ (IRQ_INTERNAL_BASE + 1) - #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2) - #define BCM_6348_UART1_IRQ 0 - #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4) -@@ -599,6 +603,7 @@ enum bcm63xx_irq { - * 6358 irqs - */ - #define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) -+#define BCM_6358_SPI_IRQ (IRQ_INTERNAL_BASE + 1) - #define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2) - #define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3) - #define BCM_6358_DSL_IRQ (IRQ_INTERNAL_BASE + 29) -@@ -638,6 +643,7 @@ enum bcm63xx_irq { - #define BCM_6368_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32) - - #define BCM_6368_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) -+#define BCM_6368_SPI_IRQ (IRQ_INTERNAL_BASE + 1) - #define BCM_6368_UART0_IRQ (IRQ_INTERNAL_BASE + 2) - #define BCM_6368_UART1_IRQ (IRQ_INTERNAL_BASE + 3) - #define BCM_6368_DSL_IRQ (IRQ_INTERNAL_BASE + 4) -@@ -677,6 +683,7 @@ extern const int *bcm63xx_irqs; - - #define __GEN_CPU_IRQ_TABLE(__cpu) \ - [IRQ_TIMER] = BCM_## __cpu ##_TIMER_IRQ, \ -+ [IRQ_SPI] = BCM_## __cpu ##_SPI_IRQ, \ - [IRQ_UART0] = BCM_## __cpu ##_UART0_IRQ, \ - [IRQ_UART1] = BCM_## __cpu ##_UART1_IRQ, \ - [IRQ_DSL] = BCM_## __cpu ##_DSL_IRQ, \ |