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| author | Florian Fainelli <florian@openwrt.org> | 2012-10-25 21:16:51 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2012-10-25 21:16:51 +0000 |
| commit | 8d69af7c9fff947e2e53ba955cf6c84df3f1391e (patch) | |
| tree | 192a79439e8d6b82dd39af6ac6f019c472cdc1c3 /target/linux/brcm63xx/patches-3.6/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch | |
| parent | 6a699a8ae80b5b6ff6559bad1297242c8daf8934 (diff) | |
| download | mtk-20170518-8d69af7c9fff947e2e53ba955cf6c84df3f1391e.zip mtk-20170518-8d69af7c9fff947e2e53ba955cf6c84df3f1391e.tar.gz mtk-20170518-8d69af7c9fff947e2e53ba955cf6c84df3f1391e.tar.bz2 | |
add preliminary support for 3.6 kernel
SVN-Revision: 33936
Diffstat (limited to 'target/linux/brcm63xx/patches-3.6/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.6/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.6/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch b/target/linux/brcm63xx/patches-3.6/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch new file mode 100644 index 0000000..7561569 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.6/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch @@ -0,0 +1,56 @@ +From ed225910f0e062d9c28d5cf216f97b3cf457a8c5 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jonas.gorski@gmail.com> +Date: Mon, 21 Nov 2011 00:55:49 +0100 +Subject: [PATCH 58/81] MIPS: BCM63XX: wire up the HS SPI controller for BCM6362 + +Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> +--- + arch/mips/bcm63xx/clk.c | 2 ++ + arch/mips/bcm63xx/dev-hsspi.c | 7 +++++-- + .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 1 + + 3 files changed, 8 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -218,6 +218,8 @@ static void hsspi_set(struct clk *clk, i + + if (BCMCPU_IS_6328()) + mask = CKCTL_6328_HSSPI_EN; ++ else if (BCMCPU_IS_6362()) ++ mask = CKCTL_6362_HSSPI_EN; + else + return; + +--- a/arch/mips/bcm63xx/dev-hsspi.c ++++ b/arch/mips/bcm63xx/dev-hsspi.c +@@ -43,7 +43,7 @@ static struct platform_device bcm63xx_hs + int __init bcm63xx_hsspi_register(void) + { + +- if (!BCMCPU_IS_6328()) ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362()) + return -ENODEV; + + spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); +@@ -51,7 +51,10 @@ int __init bcm63xx_hsspi_register(void) + spi_resources[0].end += RSET_HSSPI_SIZE - 1; + spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI); + +- spi_pdata.speed_hz = HSSPI_PLL_HZ_6328; ++ if (BCMCPU_IS_6328()) ++ spi_pdata.speed_hz = HSSPI_PLL_HZ_6328; ++ else ++ spi_pdata.speed_hz = HSSPI_PLL_HZ; + + return platform_device_register(&bcm63xx_hsspi_device); + } +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h +@@ -16,6 +16,7 @@ struct bcm63xx_hsspi_pdata { + #define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o)) + + #define HSSPI_PLL_HZ_6328 133333333 ++#define HSSPI_PLL_HZ 400000000 + + #define HSSPI_BUFFER_LEN 512 + |