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authorFlorian Fainelli <florian@openwrt.org>2012-10-25 21:16:51 +0000
committerFlorian Fainelli <florian@openwrt.org>2012-10-25 21:16:51 +0000
commit8d69af7c9fff947e2e53ba955cf6c84df3f1391e (patch)
tree192a79439e8d6b82dd39af6ac6f019c472cdc1c3 /target/linux/brcm63xx/patches-3.6/520-bcm63xx-add-support-for-96368MVWG-board.patch
parent6a699a8ae80b5b6ff6559bad1297242c8daf8934 (diff)
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add preliminary support for 3.6 kernel
SVN-Revision: 33936
Diffstat (limited to 'target/linux/brcm63xx/patches-3.6/520-bcm63xx-add-support-for-96368MVWG-board.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.6/520-bcm63xx-add-support-for-96368MVWG-board.patch128
1 files changed, 128 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.6/520-bcm63xx-add-support-for-96368MVWG-board.patch b/target/linux/brcm63xx/patches-3.6/520-bcm63xx-add-support-for-96368MVWG-board.patch
new file mode 100644
index 0000000..6dc5ef3
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.6/520-bcm63xx-add-support-for-96368MVWG-board.patch
@@ -0,0 +1,128 @@
+From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001
+From: Maxime Bizon <mbizon@freebox.fr>
+Date: Wed, 20 Jan 2010 16:21:30 +0100
+Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 +
+ 2 files changed, 97 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -2147,6 +2147,78 @@ static struct board_info __initdata boar
+ #endif
+
+ /*
++ * known 6368 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6368
++static struct board_info __initdata board_96368mvwg = {
++ .name = "96368MVWG",
++ .expected_cpu_id = 0x6368,
++
++ .has_uart0 = 1,
++ .has_pci = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port1",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port2",
++ },
++
++ [4] = {
++ .used = 1,
++ .phy_id = 0x12,
++ .name = "port0",
++ },
++
++ [5] = {
++ .used = 1,
++ .phy_id = 0x11,
++ .name = "port3",
++ },
++ },
++ },
++
++ .leds = {
++ {
++ .name = "96368MVWG:green:adsl",
++ .gpio = 2,
++ .active_low = 1,
++ },
++ {
++ .name = "96368MVWG:green:ppp",
++ .gpio = 5,
++ },
++ {
++ .name = "96368MVWG:green:power",
++ .gpio = 22,
++ .active_low = 1,
++ .default_trigger = "default-on",
++ },
++ {
++ .name = "96368MVWG:green:wps",
++ .gpio = 23,
++ .active_low = 1,
++ },
++ {
++ .name = "96368MVWG:green:ppp-fail",
++ .gpio = 31,
++ },
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++};
++#endif
++
++/*
+ * all boards
+ */
+ static const struct board_info __initdata *bcm963xx_boards[] = {
+@@ -2198,6 +2270,10 @@ static const struct board_info __initdat
+ &board_HW553,
+ &board_spw303v,
+ #endif
++
++#ifdef CONFIG_BCM63XX_CPU_6368
++ &board_96368mvwg,
++#endif
+ };
+
+ /*
+@@ -2369,12 +2445,25 @@ void __init board_prom_init(void)
+ bcm63xx_pci_enabled = 1;
+ if (BCMCPU_IS_6348())
+ val |= GPIO_MODE_6348_G2_PCI;
++
++ if (BCMCPU_IS_6368())
++ val |= GPIO_MODE_6368_PCI_REQ1 |
++ GPIO_MODE_6368_PCI_GNT1 |
++ GPIO_MODE_6368_PCI_INTB |
++ GPIO_MODE_6368_PCI_REQ0 |
++ GPIO_MODE_6368_PCI_GNT0;
+ }
+ #endif
+
+ if (board.has_pccard) {
+ if (BCMCPU_IS_6348())
+ val |= GPIO_MODE_6348_G1_MII_PCCARD;
++
++ if (BCMCPU_IS_6368())
++ val |= GPIO_MODE_6368_PCMCIA_CD1 |
++ GPIO_MODE_6368_PCMCIA_CD2 |
++ GPIO_MODE_6368_PCMCIA_VS1 |
++ GPIO_MODE_6368_PCMCIA_VS2;
+ }
+
+ if (board.has_enet0 && !board.enet0.use_internal_phy) {