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author | Jonas Gorski <jogo@openwrt.org> | 2013-05-19 18:32:13 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2013-05-19 18:32:13 +0000 |
commit | 0a62b7c1484ee963726ffab11a86da4b2fe35a46 (patch) | |
tree | 6b553a9636a4b125e04e7ef6942d889c0dcbdd6c /target/linux/brcm63xx/patches-3.9/420-BCM63XX-add-endian-check-for-ath9k.patch | |
parent | 1f4e5f77a0d5bc3cce01c501409ccfdce08b0382 (diff) | |
download | mtk-20170518-0a62b7c1484ee963726ffab11a86da4b2fe35a46.zip mtk-20170518-0a62b7c1484ee963726ffab11a86da4b2fe35a46.tar.gz mtk-20170518-0a62b7c1484ee963726ffab11a86da4b2fe35a46.tar.bz2 |
bcm63xx: add 3.9 support
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 36660
Diffstat (limited to 'target/linux/brcm63xx/patches-3.9/420-BCM63XX-add-endian-check-for-ath9k.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.9/420-BCM63XX-add-endian-check-for-ath9k.patch | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.9/420-BCM63XX-add-endian-check-for-ath9k.patch b/target/linux/brcm63xx/patches-3.9/420-BCM63XX-add-endian-check-for-ath9k.patch new file mode 100644 index 0000000..bdcb3e0 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/420-BCM63XX-add-endian-check-for-ath9k.patch @@ -0,0 +1,51 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h ++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h +@@ -2,6 +2,7 @@ + #define _PCI_ATH9K_FIXUP + + +-void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init; ++void pci_enable_ath9k_fixup(unsigned slot, u32 offset, ++ unsigned endian_check) __init; + + #endif /* _PCI_ATH9K_FIXUP */ +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -19,6 +19,7 @@ + struct ath9k_caldata { + unsigned int slot; + u32 caldata_offset; ++ unsigned int endian_check:1; + }; + + /* +--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c ++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c +@@ -172,12 +172,14 @@ static void ath9k_pci_fixup(struct pci_d + } + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); + +-void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset) ++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset, ++ unsigned endian_check) + { + if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) + return; + + ath9k_fixups[ath9k_num_fixups].slot = slot; ++ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check; + + if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset)) + return; +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -992,7 +992,8 @@ int __init board_register_devices(void) + + /* register any fixups */ + for (i = 0; i < board.has_caldata; i++) +- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset); ++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, ++ board.caldata[i].endian_check); + + return 0; + } |