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authorJonas Gorski <jogo@openwrt.org>2015-06-22 12:28:46 +0000
committerJonas Gorski <jogo@openwrt.org>2015-06-22 12:28:46 +0000
commitbd398e1765ebd21024f6ceb303a78c9de79104e8 (patch)
tree60e6b748e6d51b6eb97623a2007dcd5b38b37e52 /target/linux/brcm63xx/patches-4.1/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch
parenta0c49ef46f7caf5eb02c635d446218201008ecff (diff)
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brcm63xx: add kernel 4.1 support
Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46113
Diffstat (limited to 'target/linux/brcm63xx/patches-4.1/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch')
-rw-r--r--target/linux/brcm63xx/patches-4.1/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch57
1 files changed, 57 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-4.1/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch b/target/linux/brcm63xx/patches-4.1/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch
new file mode 100644
index 0000000..0796bb5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch
@@ -0,0 +1,57 @@
+From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 20:20:30 +0100
+Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4
+ and 5
+
+Due to the external interrupts being non consecutive, the previous
+implementation did not support them. Now that we treat both registers
+as separate irq controllers, there is no such limitation anymore and
+we can expose them for drivers to use.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 5 ++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 +
+ 3 files changed, 7 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -109,11 +109,14 @@ void __init arch_init_irq(void)
+ periph_width = 1;
+
+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
+- ext_irq_count = 4;
++ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358;
++ ext_irq_count = 6;
+ ext_irqs[0] = BCM_6358_EXT_IRQ0;
+ ext_irqs[1] = BCM_6358_EXT_IRQ1;
+ ext_irqs[2] = BCM_6358_EXT_IRQ2;
+ ext_irqs[3] = BCM_6358_EXT_IRQ3;
++ ext_irqs[4] = BCM_6358_EXT_IRQ4;
++ ext_irqs[5] = BCM_6358_EXT_IRQ5;
+ ext_shift = 4;
+ break;
+ case BCM6362_CPU_ID:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -895,6 +895,8 @@ enum bcm63xx_irq {
+ #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
+ #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
+ #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
++#define BCM_6358_EXT_IRQ4 (IRQ_INTERNAL_BASE + 20)
++#define BCM_6358_EXT_IRQ5 (IRQ_INTERNAL_BASE + 21)
+
+ /*
+ * 6362 irqs
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -243,6 +243,7 @@
+ #define PERF_EXTIRQ_CFG_REG_6362 0x18
+ #define PERF_EXTIRQ_CFG_REG_6368 0x18
+
++#define PERF_EXTIRQ_CFG_REG2_6358 0x1c
+ #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
+
+ /* for 6348 only */