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author | Jonas Gorski <jogo@openwrt.org> | 2015-06-22 12:28:46 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2015-06-22 12:28:46 +0000 |
commit | bd398e1765ebd21024f6ceb303a78c9de79104e8 (patch) | |
tree | 60e6b748e6d51b6eb97623a2007dcd5b38b37e52 /target/linux/brcm63xx/patches-4.1/331-MIPS-BCM63XX-define-variant-id-field.patch | |
parent | a0c49ef46f7caf5eb02c635d446218201008ecff (diff) | |
download | mtk-20170518-bd398e1765ebd21024f6ceb303a78c9de79104e8.zip mtk-20170518-bd398e1765ebd21024f6ceb303a78c9de79104e8.tar.gz mtk-20170518-bd398e1765ebd21024f6ceb303a78c9de79104e8.tar.bz2 |
brcm63xx: add kernel 4.1 support
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46113
Diffstat (limited to 'target/linux/brcm63xx/patches-4.1/331-MIPS-BCM63XX-define-variant-id-field.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-4.1/331-MIPS-BCM63XX-define-variant-id-field.patch | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-4.1/331-MIPS-BCM63XX-define-variant-id-field.patch b/target/linux/brcm63xx/patches-4.1/331-MIPS-BCM63XX-define-variant-id-field.patch new file mode 100644 index 0000000..2e21c65 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.1/331-MIPS-BCM63XX-define-variant-id-field.patch @@ -0,0 +1,23 @@ +From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jogo@openwrt.org> +Date: Sat, 7 Dec 2013 14:22:41 +0100 +Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field + +Some SoC have a variant id field in the chip id register. + +Signed-off-by: Jonas Gorski <jogo@openwrt.org> +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -9,6 +9,8 @@ + #define PERF_REV_REG 0x0 + #define REV_CHIPID_SHIFT 16 + #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) ++#define REV_VARID_SHIFT 12 ++#define REV_VARID_MASK (0xf << REV_VARID_SHIFT) + #define REV_REVID_SHIFT 0 + #define REV_REVID_MASK (0xff << REV_REVID_SHIFT) + |