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| author | Álvaro Fernández Rojas <noltari@gmail.com> | 2016-06-02 20:41:17 +0200 |
|---|---|---|
| committer | Álvaro Fernández Rojas <noltari@gmail.com> | 2016-06-03 16:35:46 +0200 |
| commit | 7807c7e867d5cb080b1992a72f0a1a4af75c230a (patch) | |
| tree | be7132f19182f3e218d7dac8bc3dc35641c165bd /target/linux/brcm63xx | |
| parent | ec95509af426cf58652355e3276d23f157f327bb (diff) | |
| download | mtk-20170518-7807c7e867d5cb080b1992a72f0a1a4af75c230a.zip mtk-20170518-7807c7e867d5cb080b1992a72f0a1a4af75c230a.tar.gz mtk-20170518-7807c7e867d5cb080b1992a72f0a1a4af75c230a.tar.bz2 | |
brcm63xx: add support for inverting ath9k LED polarity
Some devices with ath9k WiFi require changing the default active low
polarity to high in order to correctly operate the WiFi status LEDs.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/brcm63xx')
| -rw-r--r-- | target/linux/brcm63xx/patches-4.4/421-BCM63XX-add-led-pin-for-ath9k.patch | 12 | ||||
| -rw-r--r-- | target/linux/brcm63xx/patches-4.4/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch | 9 |
2 files changed, 12 insertions, 9 deletions
diff --git a/target/linux/brcm63xx/patches-4.4/421-BCM63XX-add-led-pin-for-ath9k.patch b/target/linux/brcm63xx/patches-4.4/421-BCM63XX-add-led-pin-for-ath9k.patch index 07e5e21..c18d8db 100644 --- a/target/linux/brcm63xx/patches-4.4/421-BCM63XX-add-led-pin-for-ath9k.patch +++ b/target/linux/brcm63xx/patches-4.4/421-BCM63XX-add-led-pin-for-ath9k.patch @@ -5,18 +5,18 @@ for (i = 0; i < board.has_caldata; i++) pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, - board.caldata[i].endian_check); -+ board.caldata[i].endian_check, board.caldata[i].led_pin); ++ board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high); return 0; } --- a/arch/mips/bcm63xx/pci-ath9k-fixup.c +++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c -@@ -182,13 +182,14 @@ static void ath9k_pci_fixup(struct pci_d +@@ -182,13 +182,15 @@ static void ath9k_pci_fixup(struct pci_d DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset, - unsigned endian_check) -+ unsigned endian_check, int led_pin) ++ unsigned endian_check, int led_pin, bool led_active_high) { if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) return; @@ -24,16 +24,18 @@ ath9k_fixups[ath9k_num_fixups].slot = slot; ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check; + ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin; ++ ath9k_fixups[ath9k_num_fixups].pdata.led_active_high = led_active_high; if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset)) return; --- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h -@@ -21,6 +21,7 @@ struct ath9k_caldata { +@@ -21,6 +21,8 @@ struct ath9k_caldata { unsigned int slot; u32 caldata_offset; unsigned int endian_check:1; + int led_pin; ++ bool led_active_high; }; /* @@ -44,6 +46,6 @@ void pci_enable_ath9k_fixup(unsigned slot, u32 offset, - unsigned endian_check) __init; -+ unsigned endian_check, int led_pin) __init; ++ unsigned endian_check, int led_pin, bool led_active_high) __init; #endif /* _PCI_ATH9K_FIXUP */ diff --git a/target/linux/brcm63xx/patches-4.4/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch b/target/linux/brcm63xx/patches-4.4/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch index 1638c5e..cdbecfd 100644 --- a/target/linux/brcm63xx/patches-4.4/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch +++ b/target/linux/brcm63xx/patches-4.4/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch @@ -42,13 +42,13 @@ Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices /* register any fixups */ - for (i = 0; i < board.has_caldata; i++) - pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, -- board.caldata[i].endian_check, board.caldata[i].led_pin); +- board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high); + for (i = 0; i < board.has_caldata; i++) { + switch (board.caldata[i].vendor) { + case PCI_VENDOR_ID_ATHEROS: + pci_enable_ath9k_fixup(board.caldata[i].slot, + board.caldata[i].caldata_offset, board.caldata[i].endian_check, -+ board.caldata[i].led_pin); ++ board.caldata[i].led_pin, board.caldata[i].led_active_high); + break; + case PCI_VENDOR_ID_RALINK: + pci_enable_rt2x00_fixup(board.caldata[i].slot, @@ -166,7 +166,7 @@ Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices /* * flash mapping -@@ -17,11 +18,15 @@ +@@ -17,12 +18,16 @@ #define BCM963XX_CFE_VERSION_OFFSET 0x570 #define BCM963XX_NVRAM_OFFSET 0x580 @@ -178,12 +178,13 @@ Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices + /* Atheros */ unsigned int endian_check:1; int led_pin; + bool led_active_high; + /* Ralink */ + char* eeprom; }; /* -@@ -47,7 +52,7 @@ struct board_info { +@@ -48,7 +53,7 @@ struct board_info { unsigned int has_caldata:2; /* wifi calibration data config */ |