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authorLuka Perkov <luka@openwrt.org>2012-11-12 19:27:30 +0000
committerLuka Perkov <luka@openwrt.org>2012-11-12 19:27:30 +0000
commit00243027ddc9c894eabdd09fa475c918802d0e3a (patch)
tree4cc466ef7ed5b7182cf17df8874fbb364702f9f0 /target/linux/cns3xxx
parentfb9b572f0aa2a6793e286cb33136766eaf8ad7b7 (diff)
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cns3xxx: merge gpio patches
SVN-Revision: 34174
Diffstat (limited to 'target/linux/cns3xxx')
-rw-r--r--target/linux/cns3xxx/patches-3.3/095-gpio_support.patch113
-rw-r--r--target/linux/cns3xxx/patches-3.3/100-gpio_irq.patch128
2 files changed, 35 insertions, 206 deletions
diff --git a/target/linux/cns3xxx/patches-3.3/095-gpio_support.patch b/target/linux/cns3xxx/patches-3.3/095-gpio_support.patch
index 2a1d845..4364abf 100644
--- a/target/linux/cns3xxx/patches-3.3/095-gpio_support.patch
+++ b/target/linux/cns3xxx/patches-3.3/095-gpio_support.patch
@@ -1,6 +1,17 @@
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
-@@ -213,7 +213,7 @@ static struct map_desc cns3420_io_desc[]
+@@ -198,6 +198,10 @@ static void __init cns3420_init(void)
+
+ cns3xxx_ahci_init();
+ cns3xxx_sdhci_init();
++ cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT, IRQ_CNS3XXX_GPIOA,
++ NR_IRQS_CNS3XXX);
++ cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB,
++ NR_IRQS_CNS3XXX + 32);
+
+ pm_power_off = cns3xxx_power_off;
+ }
+@@ -213,7 +217,7 @@ static struct map_desc cns3420_io_desc[]
static void __init cns3420_map_io(void)
{
@@ -11,89 +22,15 @@
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -21,6 +21,7 @@
- #include <asm/hardware/gic.h>
- #include <asm/smp_twd.h>
- #include <asm/hardware/cache-l2x0.h>
-+#include <asm/gpio.h>
- #include <mach/cns3xxx.h>
- #include "core.h"
-
-@@ -82,12 +83,73 @@ static struct map_desc cns3xxx_io_desc[]
+@@ -82,7 +82,7 @@ static struct map_desc cns3xxx_io_desc[]
},
};
-void __init cns3xxx_map_io(void)
-+static inline void gpio_line_config(u8 line, u32 direction)
-+{
-+ u32 reg;
-+ if (direction) {
-+ if (line < 32) {
-+ reg = __raw_readl(CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
-+ reg |= (1 << line);
-+ __raw_writel(reg, CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
-+ } else {
-+ reg = __raw_readl(CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
-+ reg |= (1 << (line - 32));
-+ __raw_writel(reg, CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
-+ }
-+ } else {
-+ if (line < 32) {
-+ reg = __raw_readl(CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
-+ reg &= ~(1 << line);
-+ __raw_writel(reg, CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
-+ } else {
-+ reg = __raw_readl(CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
-+ reg &= ~(1 << (line - 32));
-+ __raw_writel(reg, CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
-+ }
-+ }
-+}
-+
-+static int cns3xxx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
-+{
-+ gpio_line_config(gpio, CNS3XXX_GPIO_IN);
-+ return 0;
-+}
-+
-+static int cns3xxx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
-+{
-+ gpio_line_set(gpio, level);
-+ gpio_line_config(gpio, CNS3XXX_GPIO_OUT);
-+ return 0;
-+}
-+
-+static int cns3xxx_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
-+{
-+ return gpio_get_value(gpio);
-+}
-+
-+static void cns3xxx_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
-+{
-+ gpio_set_value(gpio, value);
-+}
-+
-+static struct gpio_chip cns3xxx_gpio_chip = {
-+ .label = "CNS3XXX_GPIO_CHIP",
-+ .direction_input = cns3xxx_gpio_direction_input,
-+ .direction_output = cns3xxx_gpio_direction_output,
-+ .get = cns3xxx_gpio_get_value,
-+ .set = cns3xxx_gpio_set_value,
-+ .base = 0,
-+ .ngpio = 64,
-+};
-+
+void __init cns3xxx_common_init(void)
{
#ifdef CONFIG_LOCAL_TIMERS
twd_base = (void __iomem *) CNS3XXX_TC11MP_TWD_BASE_VIRT;
- #endif
- iotable_init(cns3xxx_io_desc, ARRAY_SIZE(cns3xxx_io_desc));
-+
-+ gpiochip_add(&cns3xxx_gpio_chip);
- }
-
- /* used by entry-macro.S */
--- a/arch/arm/mach-cns3xxx/core.h
+++ b/arch/arm/mach-cns3xxx/core.h
@@ -21,7 +21,7 @@ void __init cns3xxx_l2x0_init(void);
@@ -107,11 +44,31 @@
void cns3xxx_power_off(void);
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -366,6 +366,7 @@ config ARCH_CLPS711X
+@@ -366,6 +366,8 @@ config ARCH_CLPS711X
config ARCH_CNS3XXX
bool "Cavium Networks CNS3XXX family"
select CPU_V6K
-+ select ARCH_WANT_OPTIONAL_GPIOLIB
++ select ARCH_REQUIRE_GPIOLIB
++ select GENERIC_IRQ_CHIP
select GENERIC_CLOCKEVENTS
select ARM_GIC
select CLKDEV_LOOKUP
+--- a/arch/arm/mach-cns3xxx/Makefile
++++ b/arch/arm/mach-cns3xxx/Makefile
+@@ -1,4 +1,4 @@
+-obj-$(CONFIG_ARCH_CNS3XXX) += core.o pm.o devices.o
++obj-$(CONFIG_ARCH_CNS3XXX) += core.o gpio.o pm.o devices.o
+ obj-$(CONFIG_PCI) += pcie.o
+ obj-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
+ obj-$(CONFIG_SMP) += platsmp.o headsmp.o cns3xxx_fiq.o
+--- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
++++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
+@@ -627,7 +627,7 @@ int cns3xxx_cpu_clock(void);
+
+ #if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_CNS3XXX)
+ #undef NR_IRQS
+-#define NR_IRQS NR_IRQS_CNS3XXX
++#define NR_IRQS (NR_IRQS_CNS3XXX + 64)
+ #endif
+
+ #endif /* __MACH_BOARD_CNS3XXX_H */
diff --git a/target/linux/cns3xxx/patches-3.3/100-gpio_irq.patch b/target/linux/cns3xxx/patches-3.3/100-gpio_irq.patch
deleted file mode 100644
index a487d52..0000000
--- a/target/linux/cns3xxx/patches-3.3/100-gpio_irq.patch
+++ /dev/null
@@ -1,128 +0,0 @@
---- a/arch/arm/mach-cns3xxx/Makefile
-+++ b/arch/arm/mach-cns3xxx/Makefile
-@@ -1,4 +1,4 @@
--obj-$(CONFIG_ARCH_CNS3XXX) += core.o pm.o devices.o
-+obj-$(CONFIG_ARCH_CNS3XXX) += core.o gpio.o pm.o devices.o
- obj-$(CONFIG_PCI) += pcie.o
- obj-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
- obj-$(CONFIG_SMP) += platsmp.o headsmp.o cns3xxx_fiq.o
---- a/arch/arm/mach-cns3xxx/cns3420vb.c
-+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
-@@ -198,6 +198,10 @@ static void __init cns3420_init(void)
-
- cns3xxx_ahci_init();
- cns3xxx_sdhci_init();
-+ cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT, IRQ_CNS3XXX_GPIOA,
-+ NR_IRQS_CNS3XXX);
-+ cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB,
-+ NR_IRQS_CNS3XXX + 32);
-
- pm_power_off = cns3xxx_power_off;
- }
---- a/arch/arm/mach-cns3xxx/core.c
-+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -21,7 +21,6 @@
- #include <asm/hardware/gic.h>
- #include <asm/smp_twd.h>
- #include <asm/hardware/cache-l2x0.h>
--#include <asm/gpio.h>
- #include <mach/cns3xxx.h>
- #include "core.h"
-
-@@ -83,73 +82,12 @@ static struct map_desc cns3xxx_io_desc[]
- },
- };
-
--static inline void gpio_line_config(u8 line, u32 direction)
--{
-- u32 reg;
-- if (direction) {
-- if (line < 32) {
-- reg = __raw_readl(CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
-- reg |= (1 << line);
-- __raw_writel(reg, CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
-- } else {
-- reg = __raw_readl(CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
-- reg |= (1 << (line - 32));
-- __raw_writel(reg, CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
-- }
-- } else {
-- if (line < 32) {
-- reg = __raw_readl(CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
-- reg &= ~(1 << line);
-- __raw_writel(reg, CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
-- } else {
-- reg = __raw_readl(CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
-- reg &= ~(1 << (line - 32));
-- __raw_writel(reg, CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
-- }
-- }
--}
--
--static int cns3xxx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
--{
-- gpio_line_config(gpio, CNS3XXX_GPIO_IN);
-- return 0;
--}
--
--static int cns3xxx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
--{
-- gpio_line_set(gpio, level);
-- gpio_line_config(gpio, CNS3XXX_GPIO_OUT);
-- return 0;
--}
--
--static int cns3xxx_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
--{
-- return gpio_get_value(gpio);
--}
--
--static void cns3xxx_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
--{
-- gpio_set_value(gpio, value);
--}
--
--static struct gpio_chip cns3xxx_gpio_chip = {
-- .label = "CNS3XXX_GPIO_CHIP",
-- .direction_input = cns3xxx_gpio_direction_input,
-- .direction_output = cns3xxx_gpio_direction_output,
-- .get = cns3xxx_gpio_get_value,
-- .set = cns3xxx_gpio_set_value,
-- .base = 0,
-- .ngpio = 64,
--};
--
- void __init cns3xxx_common_init(void)
- {
- #ifdef CONFIG_LOCAL_TIMERS
- twd_base = (void __iomem *) CNS3XXX_TC11MP_TWD_BASE_VIRT;
- #endif
- iotable_init(cns3xxx_io_desc, ARRAY_SIZE(cns3xxx_io_desc));
--
-- gpiochip_add(&cns3xxx_gpio_chip);
- }
-
- /* used by entry-macro.S */
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -366,7 +366,8 @@ config ARCH_CLPS711X
- config ARCH_CNS3XXX
- bool "Cavium Networks CNS3XXX family"
- select CPU_V6K
-- select ARCH_WANT_OPTIONAL_GPIOLIB
-+ select ARCH_REQUIRE_GPIOLIB
-+ select GENERIC_IRQ_CHIP
- select GENERIC_CLOCKEVENTS
- select ARM_GIC
- select CLKDEV_LOOKUP
---- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
-+++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
-@@ -627,7 +627,7 @@ int cns3xxx_cpu_clock(void);
-
- #if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_CNS3XXX)
- #undef NR_IRQS
--#define NR_IRQS NR_IRQS_CNS3XXX
-+#define NR_IRQS (NR_IRQS_CNS3XXX + 64)
- #endif
-
- #endif /* __MACH_BOARD_CNS3XXX_H */