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authorLuka Perkov <luka@openwrt.org>2013-09-12 14:38:48 +0000
committerLuka Perkov <luka@openwrt.org>2013-09-12 14:38:48 +0000
commited6d759f394643c349c9baf268e3a24b7a1d2e13 (patch)
tree73f53642510f81d075756af02a68d1139c1d2b2b /target/linux/generic/patches-3.10
parenteba3ab9ade4a0f19e6ae33d8bbf953f4daefdc74 (diff)
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kernel: add support for ESMT F25L32PA with upstream submission
Signed-off-by: Flavio Silveira <fggs@terra.com.br> SVN-Revision: 37956
Diffstat (limited to 'target/linux/generic/patches-3.10')
-rw-r--r--target/linux/generic/patches-3.10/009-mtd_m25p80_add_support_for_esmt_f25l32pa.patch37
1 files changed, 37 insertions, 0 deletions
diff --git a/target/linux/generic/patches-3.10/009-mtd_m25p80_add_support_for_esmt_f25l32pa.patch b/target/linux/generic/patches-3.10/009-mtd_m25p80_add_support_for_esmt_f25l32pa.patch
new file mode 100644
index 0000000..7d56bfe
--- /dev/null
+++ b/target/linux/generic/patches-3.10/009-mtd_m25p80_add_support_for_esmt_f25l32pa.patch
@@ -0,0 +1,37 @@
+From 7d75ef5f56dbc2bedb9a893eb9ecfd03c456338d Mon Sep 17 00:00:00 2001
+From: Flavio Silveira <fggs@terra.com.br>
+Date: Thu, 29 Aug 2013 08:51:48 -0300
+Subject: [PATCH v2] mtd: m25p80: Add support for ESMT F25L32PA
+
+This flashchip is used in D-Link DIR-610 A1 router board
+and maybe several others, yet is not kernel upstream.
+
+So add support for it according to datasheet [0], making it easier
+to support other boards using this flashchip in the future.
+
+Changelog v2:
+ - Better description
+ - Datasheet link at the bottom, similar to other patches.
+
+[0] http://www.esmt.com.tw/DB/manager/upload/F25L32PA.pdf
+
+Signed-off-by: Flavio Silveira <fggs@terra.com.br>
+---
+ drivers/mtd/devices/m25p80.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+ http://patchwork.ozlabs.org/patch/272438/
+ http://lists.infradead.org/pipermail/linux-mtd/2013-September/048511.html
+
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -731,6 +731,9 @@ static const struct spi_device_id m25p_i
+ { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) },
+ { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) },
+
++ /* ESMT */
++ { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SECT_4K) },
++
+ /* Everspin */
+ { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2) },
+