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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-02-10 08:19:23 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-02-10 08:19:23 +0000 |
| commit | 69593176911e2ca512d526c91300df1fd2b42bc0 (patch) | |
| tree | 351fa1b00184021e75dbccf4455594db312d869d /target/linux/generic/patches-3.2/020-ssb_update.patch | |
| parent | f754063159a639a6aea076a75812d31d8f4e6b7f (diff) | |
| download | mtk-20170518-69593176911e2ca512d526c91300df1fd2b42bc0.zip mtk-20170518-69593176911e2ca512d526c91300df1fd2b42bc0.tar.gz mtk-20170518-69593176911e2ca512d526c91300df1fd2b42bc0.tar.bz2 | |
kernel: update linux 3.2 to 3.2.5
SVN-Revision: 30401
Diffstat (limited to 'target/linux/generic/patches-3.2/020-ssb_update.patch')
| -rw-r--r-- | target/linux/generic/patches-3.2/020-ssb_update.patch | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/target/linux/generic/patches-3.2/020-ssb_update.patch b/target/linux/generic/patches-3.2/020-ssb_update.patch index ca686f3..1fe1768 100644 --- a/target/linux/generic/patches-3.2/020-ssb_update.patch +++ b/target/linux/generic/patches-3.2/020-ssb_update.patch @@ -184,12 +184,10 @@ #define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */ #define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */ #define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */ -@@ -502,6 +553,46 @@ - #define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */ - #define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */ +@@ -464,6 +515,46 @@ -+/* Values for boardflags_lo read from SPROM */ -+#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */ + /* Values for boardflags_lo read from SPROM */ + #define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */ +#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */ +#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */ +#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */ @@ -228,6 +226,8 @@ +#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */ +#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */ + - /* Values for SSB_SPROM1_BINF_CCODE */ - enum { - SSB_SPROM1CCODE_WORLD = 0, ++/* Values for boardflags_lo read from SPROM */ ++#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */ + #define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */ + #define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */ + #define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */ |