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authorJohn Crispin <john@openwrt.org>2007-12-25 13:11:07 +0000
committerJohn Crispin <john@openwrt.org>2007-12-25 13:11:07 +0000
commit8c487df2463efbacdaf7ec355b116fe4d12346ff (patch)
treebc3a5208e4f5cfcc3378a7084e64565249025192 /target/linux/ifxmips
parent1263078f40ca60551d984becdd16a7eb2ddeec50 (diff)
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added framework for chip detection on the ifxmips
SVN-Revision: 9925
Diffstat (limited to 'target/linux/ifxmips')
-rw-r--r--target/linux/ifxmips/files/arch/mips/ifxmips/board.c23
-rw-r--r--target/linux/ifxmips/files/arch/mips/ifxmips/setup.c6
-rw-r--r--target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips.h6
3 files changed, 33 insertions, 2 deletions
diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/board.c b/target/linux/ifxmips/files/arch/mips/ifxmips/board.c
index 6df17d8..05a0715 100644
--- a/target/linux/ifxmips/files/arch/mips/ifxmips/board.c
+++ b/target/linux/ifxmips/files/arch/mips/ifxmips/board.c
@@ -33,9 +33,19 @@
#include <asm/time.h>
#include <asm/irq.h>
#include <asm/io.h>
+#include <asm/ifxmips/ifxmips.h>
#define MAX_IFXMIPS_DEVS 5
+#define BOARD_DANUBE "Danube"
+#define BOARD_DANUBE_CHIPID 0x10129083
+
+#define BOARD_TWINPASS "Twinpass"
+
+#define BOARD_DANUBE "Danube"
+
+static unsigned int chiprev;
+
static struct platform_device *ifxmips_devs[MAX_IFXMIPS_DEVS];
static struct platform_device ifxmips_led[] =
@@ -62,6 +72,19 @@ static struct platform_device ifxmips_mii[] =
},
};
+const char*
+get_system_type (void)
+{
+ chiprev = readl(IFXMIPS_MPS_CHIPID);
+ switch(chiprev)
+ {
+ case BOARD_DANUBE_CHIPID:
+ return BOARD_DANUBE;
+ }
+
+ return BOARD_SYSTEM_TYPE;
+}
+
int __init ifxmips_init_devices(void)
{
/*
diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/setup.c b/target/linux/ifxmips/files/arch/mips/ifxmips/setup.c
index 8aac788..4c25b58 100644
--- a/target/linux/ifxmips/files/arch/mips/ifxmips/setup.c
+++ b/target/linux/ifxmips/files/arch/mips/ifxmips/setup.c
@@ -146,7 +146,7 @@ plat_timer_setup (struct irqaction *irq)
writel(0xffff, IFXMIPS_GPTU_GPT_CAPREL);
writel(0x80C0, IFXMIPS_GPTU_GPT_T6CON);
- retval = setup_irq(IFXMIPS_TIMER6_INT, &hrt_irqaction);
+ //retval = setup_irq(IFXMIPS_TIMER6_INT, &hrt_irqaction);
if (retval)
{
@@ -154,11 +154,13 @@ plat_timer_setup (struct irqaction *irq)
}
}
+extern const char* get_system_type (void);
+
void __init
plat_mem_setup (void)
{
u32 status;
- prom_printf("This %s has a cpu rev of 0x%X\n", BOARD_SYSTEM_TYPE, ifxmips_get_cpu_ver());
+ prom_printf("This %s has a cpu rev of 0x%X\n", get_system_type(), ifxmips_get_cpu_ver());
//TODO WHY ???
/* clear RE bit*/
diff --git a/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips.h b/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips.h
index 21d72a2..cedab2c 100644
--- a/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips.h
+++ b/target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips.h
@@ -426,4 +426,10 @@
#define IFXMIPS_FUSE_BASE_ADDR (KSEG1 + 0x1F107354)
+/*------------ MPS */
+
+#define IFXMIPS_MPS_BASE_ADDR (KSEG1 + 0x1F107000)
+
+#define IFXMIPS_MPS_CHIPID ((u32*)(IFXMIPS_MPS_BASE_ADDR + 0x0344))
+
#endif