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| author | Felix Fietkau <nbd@openwrt.org> | 2015-11-21 10:54:58 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2015-11-21 10:54:58 +0000 |
| commit | 49d4a980d76d5601e9fe29941b5c04b6cea08a65 (patch) | |
| tree | fe0363706e3e984d1f9063c712f574c435cac04d /target/linux/ipq806x/patches-3.18/301-ARM-qcom-add-Netgear-Nighthawk-X4-R7500-device-tree.patch | |
| parent | 575413a779e97db85e42d20750272306bfbd3ff1 (diff) | |
| download | mtk-20170518-49d4a980d76d5601e9fe29941b5c04b6cea08a65.zip mtk-20170518-49d4a980d76d5601e9fe29941b5c04b6cea08a65.tar.gz mtk-20170518-49d4a980d76d5601e9fe29941b5c04b6cea08a65.tar.bz2 | |
ipq806x: fix pcie reset gpio definions and move them to the common .dtsi file
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 47544
Diffstat (limited to 'target/linux/ipq806x/patches-3.18/301-ARM-qcom-add-Netgear-Nighthawk-X4-R7500-device-tree.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-3.18/301-ARM-qcom-add-Netgear-Nighthawk-X4-R7500-device-tree.patch | 26 |
1 files changed, 1 insertions, 25 deletions
diff --git a/target/linux/ipq806x/patches-3.18/301-ARM-qcom-add-Netgear-Nighthawk-X4-R7500-device-tree.patch b/target/linux/ipq806x/patches-3.18/301-ARM-qcom-add-Netgear-Nighthawk-X4-R7500-device-tree.patch index a9b83a1..032b01c 100644 --- a/target/linux/ipq806x/patches-3.18/301-ARM-qcom-add-Netgear-Nighthawk-X4-R7500-device-tree.patch +++ b/target/linux/ipq806x/patches-3.18/301-ARM-qcom-add-Netgear-Nighthawk-X4-R7500-device-tree.patch @@ -22,7 +22,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org> qcom-msm8974-sony-xperia-honami.dtb --- /dev/null +++ b/arch/arm/boot/dts/qcom-ipq8064-r7500.dts -@@ -0,0 +1,362 @@ +@@ -0,0 +1,338 @@ +#include "qcom-ipq8064-v1.0.dtsi" + +#include <dt-bindings/input/input.h> @@ -64,24 +64,6 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org> + bias-disable; + }; + -+ pcie0_pins: pcie0_pinmux { -+ mux { -+ pins = "gpio3"; -+ function = "pcie1_rst"; -+ drive-strength = <12>; -+ bias-disable; -+ }; -+ }; -+ -+ pcie1_pins: pcie1_pinmux { -+ mux { -+ pins = "gpio48"; -+ function = "pcie2_rst"; -+ drive-strength = <12>; -+ bias-disable; -+ }; -+ }; -+ + nand_pins: nand_pins { + mux { + pins = "gpio34", "gpio35", "gpio36", @@ -173,16 +155,10 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org> + + pcie0: pci@1b500000 { + status = "ok"; -+ reset-gpio = <&qcom_pinmux 3 0>; -+ pinctrl-0 = <&pcie0_pins>; -+ pinctrl-names = "default"; + }; + + pcie1: pci@1b700000 { + status = "ok"; -+ reset-gpio = <&qcom_pinmux 48 0>; -+ pinctrl-0 = <&pcie1_pins>; -+ pinctrl-names = "default"; + }; + + nand@1ac00000 { |