ipq806x: update clk and cpufreq drivers

A newer clk and cpufreq drivers for ipq806x platform had been sent upstream.

A change that i have noticed is that now it's possible to set min, cur and max frequencies from sysfs (previously it was bugged and caused nothing).

Following patches are removed:
 - 0036-clk-Avoid-sending-high-rates-to-downstream-clocks-du.patch - seems it was dropped from the patchset by current committer.
 - 0044-clk-qcom-krait-Remove-CLK_IS_ROOT.patch - already applied to the driver itself in the corresponding patch.
 - 0057-clk-qcom-Add-regmap-mux-div-clocks-support.patch - seem to be irrelevant to ipq806x.

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>

1 files changed, 27 insertions, 17 deletions

diff --git a/target/linux/ipq806x/patches-4.9/0043-clk-qcom-Add-Krait-clock-controller-driver.patch b/target/linux/ipq806x/patches-4.9/0043-clk-qcom-Add-Krait-clock-controller-driver.patch
index 7e2e41e..1d32b2b 100644
--- a/target/linux/ipq806x/patches-4.9/0043-clk-qcom-Add-Krait-clock-controller-driver.patch
+++ b/target/linux/ipq806x/patches-4.9/0043-clk-qcom-Add-Krait-clock-controller-driver.patch
@@ -1,7 +1,19 @@
-From 7fb5976eb0231a06f484a6bde5e5fbfee7ee4f4a Mon Sep 17 00:00:00 2001
+From patchwork Fri Dec  8 09:42:27 2017
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [v4,09/12] clk: qcom: Add Krait clock controller driver
+From: Sricharan R <sricharan@codeaurora.org>
+X-Patchwork-Id: 10102061
+Message-Id: <1512726150-7204-10-git-send-email-sricharan@codeaurora.org>
+To: mturquette@baylibre.com, sboyd@codeaurora.org,
+ devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
+ linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
+ viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org
+Cc: sricharan@codeaurora.org
+Date: Fri,  8 Dec 2017 15:12:27 +0530
+
 From: Stephen Boyd <sboyd@codeaurora.org>
-Date: Fri, 20 Mar 2015 23:45:30 -0700
-Subject: [PATCH 43/69] clk: qcom: Add Krait clock controller driver
 
 The Krait CPU clocks are made up of a primary mux and secondary
 mux for each CPU and the L2, controlled via cp15 accessors. For
@@ -15,8 +27,8 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  .../devicetree/bindings/clock/qcom,krait-cc.txt    |  22 ++
  drivers/clk/qcom/Kconfig                           |   8 +
  drivers/clk/qcom/Makefile                          |   1 +
- drivers/clk/qcom/krait-cc.c                        | 352 +++++++++++++++++++++
- 4 files changed, 383 insertions(+)
+ drivers/clk/qcom/krait-cc.c                        | 350 +++++++++++++++++++++
+ 4 files changed, 381 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/clock/qcom,krait-cc.txt
  create mode 100644 drivers/clk/qcom/krait-cc.c
 
@@ -71,7 +83,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +obj-$(CONFIG_KRAITCC) += krait-cc.o
 --- /dev/null
 +++ b/drivers/clk/qcom/krait-cc.c
-@@ -0,0 +1,352 @@
+@@ -0,0 +1,350 @@
 +/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
 + *
 + * This program is free software; you can redistribute it and/or modify
@@ -110,7 +122,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +};
 +
 +static int
-+krait_add_div(struct device *dev, int id, const char *s, unsigned offset)
++krait_add_div(struct device *dev, int id, const char *s, unsigned int offset)
 +{
 +	struct krait_div2_clk *div;
 +	struct clk_init_data init = {
@@ -150,8 +162,8 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +}
 +
 +static int
-+krait_add_sec_mux(struct device *dev, int id, const char *s, unsigned offset,
-+		  bool unique_aux)
++krait_add_sec_mux(struct device *dev, int id, const char *s,
++		  unsigned int offset, bool unique_aux)
 +{
 +	struct krait_mux_clk *mux;
 +	static const char *sec_mux_list[] = {
@@ -172,8 +184,6 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +
 +	mux->offset = offset;
 +	mux->lpl = id >= 0;
-+	mux->has_safe_parent = true;
-+	mux->safe_sel = 2;
 +	mux->mask = 0x3;
 +	mux->shift = 2;
 +	mux->parent_map = sec_mux_map;
@@ -201,7 +211,8 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +}
 +
 +static struct clk *
-+krait_add_pri_mux(struct device *dev, int id, const char *s, unsigned offset)
++krait_add_pri_mux(struct device *dev, int id, const char *s,
++		  unsigned int offset)
 +{
 +	struct krait_mux_clk *mux;
 +	const char *p_names[3];
@@ -217,8 +228,6 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +	if (!mux)
 +		return ERR_PTR(-ENOMEM);
 +
-+	mux->has_safe_parent = true;
-+	mux->safe_sel = 0;
 +	mux->mask = 0x3;
 +	mux->shift = 0;
 +	mux->offset = offset;
@@ -264,7 +273,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux)
 +{
 +	int ret;
-+	unsigned offset;
++	unsigned int offset;
 +	void *p = NULL;
 +	const char *s;
 +	struct clk *clk;
@@ -332,7 +341,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +		return -ENODEV;
 +
 +	/* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */
-+	clk = clk_register_fixed_rate(dev, "qsb", NULL, CLK_IS_ROOT, 1);
++	clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1);
 +	if (IS_ERR(clk))
 +		return PTR_ERR(clk);
 +
@@ -370,7 +379,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +	for_each_online_cpu(cpu) {
 +		clk_prepare_enable(l2_pri_mux_clk);
 +		WARN(clk_prepare_enable(clks[cpu]),
-+			"Unable to turn on CPU%d clock", cpu);
++		     "Unable to turn on CPU%d clock", cpu);
 +	}
 +
 +	/*
@@ -401,6 +410,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +			pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu);
 +			cur_rate = aux_rate;
 +		}
++
 +		clk_set_rate(clk, aux_rate);
 +		clk_set_rate(clk, 2);
 +		clk_set_rate(clk, cur_rate);