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authorStefan Lippers-Hollmann <s.l-h@gmx.de>2018-05-18 04:50:09 +0200
committerJohn Crispin <john@phrozen.org>2018-05-22 20:34:14 +0200
commit2819732219904a81205abe0fa3fbe9c06884f119 (patch)
treee8b946f62b0d16ec44cbe41d07e9a271b6d16ceb /target/linux/ipq806x/patches-4.9/0071-6-PCI-qcom-Force-GEN1-support.patch
parent18e9ed2482d6988b5962e856ec0792d5794ad93f (diff)
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ipq806x: drop linux 4.9 support
Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
Diffstat (limited to 'target/linux/ipq806x/patches-4.9/0071-6-PCI-qcom-Force-GEN1-support.patch')
-rw-r--r--target/linux/ipq806x/patches-4.9/0071-6-PCI-qcom-Force-GEN1-support.patch61
1 files changed, 0 insertions, 61 deletions
diff --git a/target/linux/ipq806x/patches-4.9/0071-6-PCI-qcom-Force-GEN1-support.patch b/target/linux/ipq806x/patches-4.9/0071-6-PCI-qcom-Force-GEN1-support.patch
deleted file mode 100644
index 91891a5..0000000
--- a/target/linux/ipq806x/patches-4.9/0071-6-PCI-qcom-Force-GEN1-support.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 4910cfd150342ec7b038892262923c725a9c4001 Mon Sep 17 00:00:00 2001
-From: Sham Muthayyan <smuthayy@codeaurora.org>
-Date: Wed, 7 Sep 2016 16:44:28 +0530
-Subject: PCI: qcom: Force GEN1 support
-
-Change-Id: Ica54ddb737d7b851469deab1745f54bf431bd3f0
-Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
----
- drivers/pci/host/pcie-qcom.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/drivers/pci/host/pcie-qcom.c
-+++ b/drivers/pci/host/pcie-qcom.c
-@@ -90,6 +90,8 @@
- #define PCIE20_PARF_CONFIG_BITS 0x50
- #define PHY_RX0_EQ(x) (x << 24)
-
-+#define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xA0
-+
- struct qcom_pcie_resources_v0 {
- struct clk *iface_clk;
- struct clk *core_clk;
-@@ -138,6 +140,7 @@ struct qcom_pcie {
- struct phy *phy;
- struct gpio_desc *reset;
- struct qcom_pcie_ops *ops;
-+ uint32_t force_gen1;
- };
-
- #define to_qcom_pcie(x) container_of(x, struct qcom_pcie, pp)
-@@ -477,6 +480,11 @@ static int qcom_pcie_init_v0(struct qcom
-
- /* wait for clock acquisition */
- usleep_range(1000, 1500);
-+ if (pcie->force_gen1) {
-+ writel_relaxed((readl_relaxed(
-+ pcie->pp.dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2) | 1),
-+ pcie->pp.dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2);
-+ }
-
- qcom_pcie_prog_viewport_cfg0(pcie, MSM_PCIE_DEV_CFG_ADDR);
- qcom_pcie_prog_viewport_mem2_outbound(pcie);
-@@ -666,6 +674,8 @@ static int qcom_pcie_probe(struct platfo
- struct qcom_pcie *pcie;
- struct pcie_port *pp;
- int ret;
-+ uint32_t force_gen1 = 0;
-+ struct device_node *np = pdev->dev.of_node;
-
- pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
- if (!pcie)
-@@ -678,6 +688,9 @@ static int qcom_pcie_probe(struct platfo
- if (IS_ERR(pcie->reset))
- return PTR_ERR(pcie->reset);
-
-+ of_property_read_u32(np, "force_gen1", &force_gen1);
-+ pcie->force_gen1 = force_gen1;
-+
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf");
- pcie->parf = devm_ioremap_resource(dev, res);
- if (IS_ERR(pcie->parf))