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authorMathias Kresin <dev@kresin.me>2016-05-26 23:08:19 +0200
committerJohn Crispin <john@phrozen.org>2016-05-27 15:50:16 +0200
commit8a382f122136c8160c2dd606cd09c29d0603f0dc (patch)
tree8f4870ec21beda687239aa125681c50ede7898e4 /target/linux/lantiq/dts/VGV7519.dtsi
parentf778cdd9c9527d36871d0f013410c1713bc50621 (diff)
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lantiq: VGV7519 - remove/merge redundant parts in dts
Signed-off-by: Mathias Kresin <dev@kresin.me>
Diffstat (limited to 'target/linux/lantiq/dts/VGV7519.dtsi')
-rw-r--r--target/linux/lantiq/dts/VGV7519.dtsi54
1 files changed, 20 insertions, 34 deletions
diff --git a/target/linux/lantiq/dts/VGV7519.dtsi b/target/linux/lantiq/dts/VGV7519.dtsi
index 95de6e5..9313fda 100644
--- a/target/linux/lantiq/dts/VGV7519.dtsi
+++ b/target/linux/lantiq/dts/VGV7519.dtsi
@@ -23,30 +23,32 @@
};
fpi@10000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "lantiq,fpi", "simple-bus";
- ranges = <0x0 0x10000000 0xEEFFFFF>;
- reg = <0x10000000 0xEF00000>;
-
localbus@0 {
- #address-cells = <2>;
- #size-cells = <1>;
- compatible = "lantiq,localbus", "simple-bus";
+ nor-boot@0 {
+ compatible = "lantiq,nor";
+ bank-width = <2>;
+ reg = <0 0x0 0x800000>, <1 0x800000 0x800000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ boardconfig: partition@40000 {
+ label = "board_config";
+ reg = <0x40000 0x10000>;
+ read-only;
+ };
+ };
+ };
};
gpio: pinmux@E100B10 {
- compatible = "lantiq,pinctrl-xr9";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
- interrupt-parent = <&icu0>;
- interrupts = <166 135 66 40 41 42 38>;
-
- #gpio-cells = <2>;
- gpio-controller;
- reg = <0xE100B10 0xA0>;
-
state_default: pinmux {
stp {
lantiq,groups = "stp";
@@ -109,19 +111,7 @@
pci@E105400 {
status = "okay";
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- compatible = "lantiq,pci-xway";
- bus-range = <0x0 0x0>;
- ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
- 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
- reg = <0x7000000 0x8000 /* config space */
- 0xE105400 0x400>; /* pci bridge */
lantiq,bus-clock = <33333333>;
- /*lantiq,external-clock;*/
- lantiq,delay-hi = <0>; /* 0ns delay */
- lantiq,delay-lo = <0>; /* 0.0ns delay */
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
@@ -278,6 +268,7 @@
reg = <1>;
mac-address = [ 00 11 22 33 44 56 ];
lantiq,wan;
+
ethernet@5 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
@@ -293,27 +284,22 @@
phy0: ethernet-phy@0 {
reg = <0x0>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,c45-reg-init = <1 0 0 0>;
};
phy1: ethernet-phy@1 {
reg = <0x1>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,c45-reg-init = <1 0 0 0>;
};
phy5: ethernet-phy@5 {
reg = <0x5>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,c45-reg-init = <1 0 0 0>;
};
phy11: ethernet-phy@11 {
reg = <0x11>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,c45-reg-init = <1 0 0 0>;
};
phy13: ethernet-phy@13 {
reg = <0x13>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,c45-reg-init = <1 0 0 0>;
};
};
};