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authorJohn Crispin <john@openwrt.org>2011-06-08 17:57:55 +0000
committerJohn Crispin <john@openwrt.org>2011-06-08 17:57:55 +0000
commited0e649a5b0b4664eeb85a6137542ec4c0de7513 (patch)
tree300e49443e1fb32c602242aeb9e7ce0cb70b1e60 /target/linux/lantiq/patches-2.6.39
parent4cbdfb6d927540302db026e032a13a92cbf135d3 (diff)
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* fixes spi flash for ar9
* adds limited support for netgear dgn3500 (enough for others to start working with) SVN-Revision: 27137
Diffstat (limited to 'target/linux/lantiq/patches-2.6.39')
-rw-r--r--target/linux/lantiq/patches-2.6.39/410-spi2.patch11
-rw-r--r--target/linux/lantiq/patches-2.6.39/420-spi3.patch26
-rw-r--r--target/linux/lantiq/patches-2.6.39/999-dgn3500.patch111
3 files changed, 141 insertions, 7 deletions
diff --git a/target/linux/lantiq/patches-2.6.39/410-spi2.patch b/target/linux/lantiq/patches-2.6.39/410-spi2.patch
index e37790a..ee07188 100644
--- a/target/linux/lantiq/patches-2.6.39/410-spi2.patch
+++ b/target/linux/lantiq/patches-2.6.39/410-spi2.patch
@@ -10,13 +10,13 @@ Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
-@@ -193,6 +193,14 @@ config SPI_IMX
+@@ -193,6 +193,14 @@
This enables using the Freescale i.MX SPI controllers in master
mode.
+config SPI_LANTIQ
+ tristate "Lantiq SoC SPI controller"
-+ depends on SOC_LANTIQ_XWAY
++ depends on SOC_TYPE_XWAY
+ select SPI_BITBANG
+ help
+ This driver supports the Lantiq SoC SPI controller in master
@@ -27,7 +27,7 @@ Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
depends on PARPORT && EXPERIMENTAL
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
-@@ -26,6 +26,7 @@ obj-$(CONFIG_SPI_EP93XX) += ep93xx_spi.
+@@ -26,6 +26,7 @@
obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
obj-$(CONFIG_SPI_GPIO_OLD) += spi_gpio_old.o
obj-$(CONFIG_SPI_IMX) += spi_imx.o
@@ -37,7 +37,7 @@ Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
obj-$(CONFIG_SPI_PXA2XX_PCI) += pxa2xx_spi_pci.o
--- /dev/null
+++ b/drivers/spi/spi_lantiq.c
-@@ -0,0 +1,1063 @@
+@@ -0,0 +1,1062 @@
+/*
+ * Lantiq SoC SPI controller
+ *
@@ -64,8 +64,7 @@ Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_bitbang.h>
+
-+#include <xway.h>
-+#include <xway_irq.h>
++#include <lantiq_soc.h>
+#include <lantiq_platform.h>
+
+#define LTQ_SPI_CLC 0x00 /* Clock control */
diff --git a/target/linux/lantiq/patches-2.6.39/420-spi3.patch b/target/linux/lantiq/patches-2.6.39/420-spi3.patch
index f89886f..a0e517a 100644
--- a/target/linux/lantiq/patches-2.6.39/420-spi3.patch
+++ b/target/linux/lantiq/patches-2.6.39/420-spi3.patch
@@ -18,7 +18,7 @@ Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
#include <asm/bootinfo.h>
#include <asm/irq.h>
-@@ -119,3 +120,28 @@ ltq_register_etop(struct ltq_eth_data *e
+@@ -119,3 +120,41 @@
platform_device_register(&ltq_etop);
}
}
@@ -34,6 +34,17 @@ Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
+ IRQ_RES(spi_err, LTQ_SSC_EIR),
+};
+
++static struct resource ltq_spi_resources_ar9[] = {
++ {
++ .start = LTQ_SSC_BASE_ADDR,
++ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1,
++ .flags = IORESOURCE_MEM,
++ },
++ IRQ_RES(spi_tx, LTQ_SSC_TIR_AR9),
++ IRQ_RES(spi_rx, LTQ_SSC_RIR_AR9),
++ IRQ_RES(spi_err, LTQ_SSC_EIR),
++};
++
+static struct platform_device ltq_spi = {
+ .name = "ltq-spi",
+ .resource = ltq_spi_resources,
@@ -43,7 +54,20 @@ Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
+void __init ltq_register_spi(struct ltq_spi_platform_data *pdata,
+ struct spi_board_info const *info, unsigned n)
+{
++ if(ltq_is_ar9())
++ ltq_spi.resource = ltq_spi_resources_ar9;
+ spi_register_board_info(info, n);
+ ltq_spi.dev.platform_data = pdata;
+ platform_device_register(&ltq_spi);
+}
+--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
++++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
+@@ -27,6 +27,8 @@
+
+ #define LTQ_SSC_TIR (INT_NUM_IM0_IRL0 + 15)
+ #define LTQ_SSC_RIR (INT_NUM_IM0_IRL0 + 14)
++#define LTQ_SSC_TIR_AR9 (INT_NUM_IM0_IRL0 + 14)
++#define LTQ_SSC_RIR_AR9 (INT_NUM_IM0_IRL0 + 15)
+ #define LTQ_SSC_EIR (INT_NUM_IM0_IRL0 + 16)
+
+ #define LTQ_MEI_DYING_GASP_INT (INT_NUM_IM1_IRL0 + 21)
diff --git a/target/linux/lantiq/patches-2.6.39/999-dgn3500.patch b/target/linux/lantiq/patches-2.6.39/999-dgn3500.patch
new file mode 100644
index 0000000..aa8db10
--- /dev/null
+++ b/target/linux/lantiq/patches-2.6.39/999-dgn3500.patch
@@ -0,0 +1,111 @@
+--- a/arch/mips/lantiq/machtypes.h
++++ b/arch/mips/lantiq/machtypes.h
+@@ -32,6 +32,9 @@
+ LANTIQ_MACH_ARV752DPW, /* Arcor easybox a802 */
+ LANTIQ_MACH_ARV752DPW22, /* Arcor easybox a803 */
+ LANTIQ_MACH_ARV7518PW, /* ASTORIA */
++
++ /* Netgear */
++ LANTIQ_MACH_DGN3500B, /* Netgear DGN3500 */
+ };
+
+ #endif
+--- a/arch/mips/lantiq/xway/Kconfig
++++ b/arch/mips/lantiq/xway/Kconfig
+@@ -10,6 +10,10 @@
+ bool "ARV45XX"
+ default y
+
++config LANTIQ_MACH_NETGEAR
++ bool "Netgear"
++ default y
++
+ endmenu
+
+ endif
+--- a/arch/mips/lantiq/xway/Makefile
++++ b/arch/mips/lantiq/xway/Makefile
+@@ -6,4 +6,5 @@
+ obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o
+ obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o
+ obj-$(CONFIG_LANTIQ_MACH_ARV45XX) += mach-arv45xx.o
++obj-$(CONFIG_LANTIQ_MACH_NETGEAR) += mach-netgear.o
+ obj-y += dev-dwc_otg.o
+--- a/arch/mips/lantiq/xway/devices.h
++++ b/arch/mips/lantiq/xway/devices.h
+@@ -12,6 +12,7 @@
+ #include "../devices.h"
+ #include <linux/phy.h>
+ #include <linux/gpio_buttons.h>
++#include <linux/spi/spi.h>
+
+ extern void ltq_register_gpio(void);
+ extern void ltq_register_gpio_stp(void);
+@@ -20,5 +21,7 @@
+ extern void ltq_register_gpio_ebu(unsigned int value);
+ extern void ltq_register_madwifi_eep(void);
+ extern void ltq_register_gpio_buttons(struct gpio_button *buttons, int cnt);
++extern void ltq_register_spi(struct ltq_spi_platform_data *pdata,
++ struct spi_board_info const *info, unsigned n);
+
+ #endif
+--- /dev/null
++++ b/arch/mips/lantiq/xway/mach-netgear.c
+@@ -0,0 +1,57 @@
++/*
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/mtd/physmap.h>
++#include <linux/input.h>
++#include <linux/phy.h>
++#include <linux/spi/spi.h>
++
++#include <lantiq_soc.h>
++#include <irq.h>
++
++#include "../machtypes.h"
++#include "devices.h"
++
++static struct ltq_pci_data ltq_pci_data = {
++ .clock = PCI_CLOCK_INT,
++ .gpio = PCI_GNT1 | PCI_REQ1,
++ .irq = {
++ [14] = INT_NUM_IM0_IRL0 + 22,
++ },
++};
++
++static struct ltq_eth_data ltq_eth_data = {
++ .mii_mode = PHY_INTERFACE_MODE_MII,
++};
++
++struct spi_board_info spi_info = {
++ .bus_num = 0,
++ .chip_select = 3,
++ .max_speed_hz = 25000000,
++ .modalias = "mx25l12805d",
++};
++
++struct ltq_spi_platform_data ltq_spi_data = {
++ .num_chipselect = 4,
++};
++
++static void __init dgn3500_init(void)
++{
++ ltq_register_pci(&ltq_pci_data);
++ ltq_register_etop(&ltq_eth_data);
++ ltq_register_spi(&ltq_spi_data, &spi_info, 1);
++}
++
++MIPS_MACHINE(LANTIQ_MACH_DGN3500B,
++ "DGN3500B",
++ "Netgear DGN3500B",
++ dgn3500_init);