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author | John Crispin <john@openwrt.org> | 2011-10-10 15:13:46 +0000 |
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committer | John Crispin <john@openwrt.org> | 2011-10-10 15:13:46 +0000 |
commit | 0a866293bd9e204978c995cb0545c20f8ab63c7e (patch) | |
tree | 7d7a9ef25035a4afd4b371b85506fe062bac125a /target/linux/lantiq/patches-3.0/190-falcon-fix_include.patch | |
parent | 1359fe4fcf0a6cef3eced837d63c866cc75a52fc (diff) | |
download | mtk-20170518-0a866293bd9e204978c995cb0545c20f8ab63c7e.zip mtk-20170518-0a866293bd9e204978c995cb0545c20f8ab63c7e.tar.gz mtk-20170518-0a866293bd9e204978c995cb0545c20f8ab63c7e.tar.bz2 |
* update patches to 3.0
* add basic vr9 support
* backport 3.1 fixes
* backport 3.2 queue (falcon)
SVN-Revision: 28405
Diffstat (limited to 'target/linux/lantiq/patches-3.0/190-falcon-fix_include.patch')
-rw-r--r-- | target/linux/lantiq/patches-3.0/190-falcon-fix_include.patch | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/target/linux/lantiq/patches-3.0/190-falcon-fix_include.patch b/target/linux/lantiq/patches-3.0/190-falcon-fix_include.patch deleted file mode 100644 index 371a94b..0000000 --- a/target/linux/lantiq/patches-3.0/190-falcon-fix_include.patch +++ /dev/null @@ -1,48 +0,0 @@ ---- /dev/null -+++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h -@@ -0,0 +1,45 @@ -+/* -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ * -+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org> -+ */ -+ -+#ifndef _LTQ_FALCON_H__ -+#define _LTQ_FALCON_H__ -+ -+#ifdef CONFIG_SOC_FALCON -+ -+#include <lantiq.h> -+ -+/* Chip IDs */ -+#define SOC_ID_FALCON 0x01B8 -+ -+/* SoC Types */ -+#define SOC_TYPE_FALCON 0x01 -+ -+/* ASC0/1 - serial port */ -+#define LTQ_ASC0_BASE_ADDR 0x1E100C00 -+#define LTQ_ASC1_BASE_ADDR 0x1E100B00 -+#define LTQ_ASC_SIZE 0x100 -+ -+#define LTQ_ASC_TIR(x) (INT_NUM_IM3_IRL0 + (x * 8)) -+#define LTQ_ASC_RIR(x) (INT_NUM_IM3_IRL0 + (x * 8) + 1) -+#define LTQ_ASC_EIR(x) (INT_NUM_IM3_IRL0 + (x * 8) + 2) -+ -+/* ICU - interrupt control unit */ -+#define LTQ_ICU_BASE_ADDR 0x1F880200 -+#define LTQ_ICU_SIZE 0x100 -+ -+/* WDT */ -+#define LTQ_WDT_BASE_ADDR 0x1F8803F0 -+#define LTQ_WDT_SIZE 0x10 -+ -+extern int ltq_gpio_request(unsigned int pin, unsigned int alt0, -+ unsigned int alt1, unsigned int dir, -+ const char *name); -+extern int ltq_gpio_mux_set(unsigned int pin, unsigned int mux); -+ -+#endif /* CONFIG_SOC_FALCON */ -+#endif /* _LTQ_XWAY_H__ */ |