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authorFelix Fietkau <nbd@openwrt.org>2015-12-05 09:51:25 +0000
committerFelix Fietkau <nbd@openwrt.org>2015-12-05 09:51:25 +0000
commitfff859a1f6a7a319053e4efce787b88bc76985ab (patch)
tree6ca955ea78af5b99d8ac17e57747b6a1e69027d5 /target/linux/lantiq/patches-3.18/0015-MTD-lantiq-xway-remove-endless-loop.patch
parentba0ba1e1f5b403e83a8cbdd90ba065e626318e30 (diff)
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lantiq: remove 3.18 support
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 47774
Diffstat (limited to 'target/linux/lantiq/patches-3.18/0015-MTD-lantiq-xway-remove-endless-loop.patch')
-rw-r--r--target/linux/lantiq/patches-3.18/0015-MTD-lantiq-xway-remove-endless-loop.patch41
1 files changed, 0 insertions, 41 deletions
diff --git a/target/linux/lantiq/patches-3.18/0015-MTD-lantiq-xway-remove-endless-loop.patch b/target/linux/lantiq/patches-3.18/0015-MTD-lantiq-xway-remove-endless-loop.patch
deleted file mode 100644
index 4bd1668..0000000
--- a/target/linux/lantiq/patches-3.18/0015-MTD-lantiq-xway-remove-endless-loop.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 76e153079f02d26e3357302d2886a0c8aaaec64d Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sun, 28 Jul 2013 18:02:06 +0200
-Subject: [PATCH 15/36] MTD: lantiq: xway: remove endless loop
-
-The reset loop logic could run into a endless loop. Lets fix it as requested.
-
---> http://lists.infradead.org/pipermail/linux-mtd/2012-September/044240.html
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- drivers/mtd/nand/xway_nand.c | 10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
---- a/drivers/mtd/nand/xway_nand.c
-+++ b/drivers/mtd/nand/xway_nand.c
-@@ -59,16 +59,22 @@ static u32 xway_latchcmd;
- static void xway_reset_chip(struct nand_chip *chip)
- {
- unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W;
-+ unsigned long timeout;
- unsigned long flags;
-
- nandaddr &= ~NAND_WRITE_ADDR;
- nandaddr |= NAND_WRITE_CMD;
-
- /* finish with a reset */
-+ timeout = jiffies + msecs_to_jiffies(20);
-+
- spin_lock_irqsave(&ebu_lock, flags);
- writeb(NAND_WRITE_CMD_RESET, (void __iomem *) nandaddr);
-- while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
-- ;
-+ do {
-+ if ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
-+ break;
-+ cond_resched();
-+ } while (!time_after_eq(jiffies, timeout));
- spin_unlock_irqrestore(&ebu_lock, flags);
- }
-