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authorJohn Crispin <john@openwrt.org>2012-12-21 13:47:55 +0000
committerJohn Crispin <john@openwrt.org>2012-12-21 13:47:55 +0000
commit54c096527a43bf70a8cf158e081274158534e829 (patch)
tree6eddad07b41010d60196a5ef0407da5ab22342ea /target/linux/lantiq/patches-3.7/0102-MIPS-lantiq-add-GPHY-clock-gate-bits.patch
parent59cc6d9dddcead0f72277d0d13eb0dd773741349 (diff)
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more devicetree fixes
SVN-Revision: 34824
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