bump to v3.8

Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 36014

1 files changed, 43 insertions, 0 deletions

diff --git a/target/linux/lantiq/patches-3.8/0014-PINCTRL-lantiq-fix-pin-availability-check.patch b/target/linux/lantiq/patches-3.8/0014-PINCTRL-lantiq-fix-pin-availability-check.patch
new file mode 100644
index 0000000..d1d2ff2
--- /dev/null
+++ b/target/linux/lantiq/patches-3.8/0014-PINCTRL-lantiq-fix-pin-availability-check.patch
@@ -0,0 +1,43 @@
+From 51d5029bd9cd0ff85e1df87a4df57e544c52dc34 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Wed, 30 Jan 2013 20:16:22 +0100
+Subject: [PATCH 14/40] PINCTRL: lantiq: fix pin availability check
+
+The clock needs to be activated for the check to work. In order to be compatible
+with future silicon make sure that at least 1 pin is available before probing
+the pad controller.
+
+Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/pinctrl/pinctrl-falcon.c |   11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
+index 4a0d54a..de9d1db 100644
+--- a/drivers/pinctrl/pinctrl-falcon.c
++++ b/drivers/pinctrl/pinctrl-falcon.c
+@@ -455,12 +455,17 @@ static int pinctrl_falcon_probe(struct platform_device *pdev)
+ 				*bank);
+ 			return -ENOMEM;
+ 		}
++		clk_activate(falcon_info.clk[*bank]);
+ 		avail = pad_r32(falcon_info.membase[*bank],
+ 					LTQ_PADC_AVAIL);
+ 		pins = fls(avail);
+-		lantiq_load_pin_desc(&falcon_pads[pad_count], *bank, pins);
+-		pad_count += pins;
+-		clk_enable(falcon_info.clk[*bank]);
++		if (pins) {
++			lantiq_load_pin_desc(&falcon_pads[pad_count],
++								*bank, pins);
++			pad_count += pins;
++		} else {
++			clk_deactivate(falcon_info.clk[*bank]);
++		}
+ 		dev_dbg(&pdev->dev, "found %s with %d pads\n",
+ 				res.name, pins);
+ 	}
+-- 
+1.7.10.4
+