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authorFelix Fietkau <nbd@openwrt.org>2016-01-18 11:40:19 +0000
committerFelix Fietkau <nbd@openwrt.org>2016-01-18 11:40:19 +0000
commitf577cb25c09daad670755b9b46622258cf999421 (patch)
treeee7361facfb1c544bab629f3fe11376b71f3d4d7 /target/linux/lantiq/patches-4.4/0151-lantiq-ifxmips_pcie-use-of.patch
parente0bfd2529592313a163fcae4d99351d69dc637bf (diff)
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lantiq: Add support for linux 4.4
The following patches were dropped because they are already applied upstream: - 0038-MIPS-lantiq-fpi-on-ar9.patch - 0039-MIPS-lantiq-initialize-usb-on-boot.patch - 0042-USB-DWC2-big-endian-support.patch - 0043-gpio-stp-xway-fix-phy-mask.patch All other patches were simply refreshed, except the following: - 0001-MIPS-lantiq-add-pcie-driver.patch Changes to arch/mips/lantiq/xway/sysctrl.c (these changes disabled some PMU gates for the vrx200 / VR9 SoCs) were removed since the upstream kernel disables unused PMU gates automatically (since 95135bfa7ead1becc2879230f72583dde2b71a0c "MIPS: Lantiq: Deactivate most of the devices by default"). - 0025-NET-MIPS-lantiq-adds-xrx200-net.patch Since OpenWrt commit 55ba20afcc2fe785146316e5be2c2473cb329885 drivers should use of_get_mac_address(). of_get_mac_address_mtd is not available for drivers anymore since it's called automatically within of_get_mac_address(). - 0028-NET-lantiq-various-etop-fixes.patch Same changes as in 0025-NET-MIPS-lantiq-adds-xrx200-net.patch While refreshing the kernel configuration SPI support had to be moved to config-4.4 because otherwise M25P80 was disabled. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48307
Diffstat (limited to 'target/linux/lantiq/patches-4.4/0151-lantiq-ifxmips_pcie-use-of.patch')
-rw-r--r--target/linux/lantiq/patches-4.4/0151-lantiq-ifxmips_pcie-use-of.patch158
1 files changed, 158 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-4.4/0151-lantiq-ifxmips_pcie-use-of.patch b/target/linux/lantiq/patches-4.4/0151-lantiq-ifxmips_pcie-use-of.patch
new file mode 100644
index 0000000..ed7927e
--- /dev/null
+++ b/target/linux/lantiq/patches-4.4/0151-lantiq-ifxmips_pcie-use-of.patch
@@ -0,0 +1,158 @@
+--- a/arch/mips/pci/ifxmips_pcie.c
++++ b/arch/mips/pci/ifxmips_pcie.c
+@@ -18,6 +18,9 @@
+ #include <linux/pci_regs.h>
+ #include <linux/module.h>
+
++#include <linux/of_gpio.h>
++#include <linux/of_platform.h>
++
+ #include "ifxmips_pcie.h"
+ #include "ifxmips_pcie_reg.h"
+
+@@ -40,6 +43,7 @@
+ static DEFINE_SPINLOCK(ifx_pcie_lock);
+
+ u32 g_pcie_debug_flag = PCIE_MSG_ANY & (~PCIE_MSG_CFG);
++static int pcie_reset_gpio;
+
+ static ifx_pcie_irq_t pcie_irqs[IFX_PCIE_CORE_NR] = {
+ {
+@@ -82,6 +86,22 @@ void ifx_pcie_debug(const char *fmt, ...
+ printk("%s", buf);
+ }
+
++static inline void pcie_ep_gpio_rst_init(int pcie_port)
++{
++ gpio_direction_output(pcie_reset_gpio, 1);
++ gpio_set_value(pcie_reset_gpio, 1);
++}
++
++static inline void pcie_device_rst_assert(int pcie_port)
++{
++ gpio_set_value(pcie_reset_gpio, 0);
++}
++
++static inline void pcie_device_rst_deassert(int pcie_port)
++{
++ mdelay(100);
++ gpio_direction_output(pcie_reset_gpio, 1);
++}
+
+ static inline int pcie_ltssm_enable(int pcie_port)
+ {
+@@ -1045,8 +1065,9 @@ pcie_rc_initialize(int pcie_port)
+ return 0;
+ }
+
+-static int __init ifx_pcie_bios_init(void)
++static int __init ifx_pcie_bios_probe(struct platform_device *pdev)
+ {
++ struct device_node *node = pdev->dev.of_node;
+ void __iomem *io_map_base;
+ int pcie_port;
+ int startup_port;
+@@ -1055,7 +1076,17 @@ static int __init ifx_pcie_bios_init(voi
+ pcie_ahb_pmu_setup();
+
+ startup_port = IFX_PCIE_PORT0;
+-
++
++ pcie_reset_gpio = of_get_named_gpio(node, "gpio-reset", 0);
++ if (gpio_is_valid(pcie_reset_gpio)) {
++ int ret = devm_gpio_request(&pdev->dev, pcie_reset_gpio, "pcie-reset");
++ if (ret) {
++ dev_err(&pdev->dev, "failed to request gpio %d\n", pcie_reset_gpio);
++ return ret;
++ }
++ gpio_direction_output(pcie_reset_gpio, 1);
++ }
++
+ for (pcie_port = startup_port; pcie_port < IFX_PCIE_CORE_NR; pcie_port++){
+ if (pcie_rc_initialize(pcie_port) == 0) {
+ IFX_PCIE_PRINT(PCIE_MSG_INIT, "%s: ifx_pcie_cfg_base 0x%p\n",
+@@ -1083,6 +1114,30 @@ static int __init ifx_pcie_bios_init(voi
+
+ return 0;
+ }
++
++static const struct of_device_id ifxmips_pcie_match[] = {
++ { .compatible = "lantiq,pcie-xrx200" },
++ {},
++};
++MODULE_DEVICE_TABLE(of, ifxmips_pcie_match);
++
++static struct platform_driver ltq_pci_driver = {
++ .probe = ifx_pcie_bios_probe,
++ .driver = {
++ .name = "pcie-xrx200",
++ .owner = THIS_MODULE,
++ .of_match_table = ifxmips_pcie_match,
++ },
++};
++
++int __init ifx_pcie_bios_init(void)
++{
++ int ret = platform_driver_register(&ltq_pci_driver);
++ if (ret)
++ pr_info("pcie-xrx200: Error registering platform driver!");
++ return ret;
++}
++
+ arch_initcall(ifx_pcie_bios_init);
+
+ MODULE_LICENSE("GPL");
+--- a/arch/mips/pci/ifxmips_pcie_vr9.h
++++ b/arch/mips/pci/ifxmips_pcie_vr9.h
+@@ -22,8 +22,6 @@
+ #include <linux/gpio.h>
+ #include <lantiq_soc.h>
+
+-#define IFX_PCIE_GPIO_RESET 494
+-
+ #define IFX_REG_R32 ltq_r32
+ #define IFX_REG_W32 ltq_w32
+ #define CONFIG_IFX_PCIE_HW_SWAP
+@@ -53,21 +51,6 @@
+ #define OUT ((volatile u32*)(IFX_GPIO + 0x0070))
+
+
+-static inline void pcie_ep_gpio_rst_init(int pcie_port)
+-{
+-
+- gpio_request(IFX_PCIE_GPIO_RESET, "pcie-reset");
+- gpio_direction_output(IFX_PCIE_GPIO_RESET, 1);
+- gpio_set_value(IFX_PCIE_GPIO_RESET, 1);
+-
+-/* ifx_gpio_pin_reserve(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id);
+- ifx_gpio_output_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id);
+- ifx_gpio_dir_out_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id);
+- ifx_gpio_altsel0_clear(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id);
+- ifx_gpio_altsel1_clear(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id);
+- ifx_gpio_open_drain_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id);*/
+-}
+-
+ static inline void pcie_ahb_pmu_setup(void)
+ {
+ /* Enable AHB bus master/slave */
+@@ -180,20 +163,6 @@ static inline void pcie_phy_rst_deassert
+ IFX_REG_W32(reg, IFX_RCU_RST_REQ);
+ }
+
+-static inline void pcie_device_rst_assert(int pcie_port)
+-{
+- gpio_set_value(IFX_PCIE_GPIO_RESET, 0);
+-// ifx_gpio_output_clear(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id);
+-}
+-
+-static inline void pcie_device_rst_deassert(int pcie_port)
+-{
+- mdelay(100);
+- gpio_direction_output(IFX_PCIE_GPIO_RESET, 1);
+-// gpio_set_value(IFX_PCIE_GPIO_RESET, 1);
+- //ifx_gpio_output_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id);
+-}
+-
+ static inline void pcie_core_pmu_setup(int pcie_port)
+ {
+ struct clk *clk;