layerscape: add 64b/32b target for ls1043ardb device

Add support for NXP layerscape ls1043ardb 64b/32b Dev board.

LS1043a is an SoC with 4x64-bit up to 1.6 GHz ARMv8 A53 cores.
ls1043ardb support features as: 2GB DDR4, 128MB NOR/512MB NAND, USB3.0, eSDHC,
I2C, GPIO, PCIe/Mini-PCIe, 6x1G/1x10G network port, etc.

64b/32b ls1043ardb target is using 4.4 kernel, and rcw/u-boot/fman images from
NXP QorIQ SDK release.

All of 4.4 kernel patches porting from SDK release or upstream.

QorIQ SDK ISOs can be downloaded from this location:
http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>

1 files changed, 99 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-4.4/3011-arm-add-new-non-shareable-ioremap.patch b/target/linux/layerscape/patches-4.4/3011-arm-add-new-non-shareable-ioremap.patch
new file mode 100644
index 0000000..f3ef2b3
--- /dev/null
+++ b/target/linux/layerscape/patches-4.4/3011-arm-add-new-non-shareable-ioremap.patch
@@ -0,0 +1,99 @@
+From 707627a28924320a7a36bdb8b02c05651c0c384d Mon Sep 17 00:00:00 2001
+From: Pan Jiafei <Jiafei.Pan@nxp.com>
+Date: Fri, 8 Jul 2016 11:16:13 +0800
+Subject: [PATCH 11/70] arm: add new non-shareable ioremap
+
+commit 17d7448eef0fa57a0899e6a864d875e7a9082561
+[modify ioremap_cache_ns according to Linux v4.4.7]
+
+Signed-off-by: Pan Jiafei <Jiafei.Pan@nxp.com>
+Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
+---
+ arch/arm/include/asm/io.h       |    4 ++++
+ arch/arm/include/asm/mach/map.h |    4 ++--
+ arch/arm/mm/ioremap.c           |    7 +++++++
+ arch/arm/mm/mmu.c               |    9 +++++++++
+ 4 files changed, 22 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/include/asm/io.h
++++ b/arch/arm/include/asm/io.h
+@@ -129,6 +129,7 @@ static inline u32 __raw_readl(const vola
+ #define MT_DEVICE_NONSHARED	1
+ #define MT_DEVICE_CACHED	2
+ #define MT_DEVICE_WC		3
++#define MT_MEMORY_RW_NS		4
+ /*
+  * types 4 onwards can be found in asm/mach/map.h and are undefined
+  * for ioremap
+@@ -399,6 +400,9 @@ void __iomem *ioremap_wc(resource_size_t
+ #define ioremap_wc ioremap_wc
+ #define ioremap_wt ioremap_wc
+ 
++void __iomem *ioremap_cache_ns(resource_size_t res_cookie, size_t size);
++#define ioremap_cache_ns ioremap_cache_ns
++
+ void iounmap(volatile void __iomem *iomem_cookie);
+ #define iounmap iounmap
+ 
+--- a/arch/arm/include/asm/mach/map.h
++++ b/arch/arm/include/asm/mach/map.h
+@@ -21,9 +21,9 @@ struct map_desc {
+ 	unsigned int type;
+ };
+ 
+-/* types 0-3 are defined in asm/io.h */
++/* types 0-4 are defined in asm/io.h */
+ enum {
+-	MT_UNCACHED = 4,
++	MT_UNCACHED = 5,
+ 	MT_CACHECLEAN,
+ 	MT_MINICLEAN,
+ 	MT_LOW_VECTORS,
+--- a/arch/arm/mm/ioremap.c
++++ b/arch/arm/mm/ioremap.c
+@@ -394,6 +394,13 @@ void __iomem *ioremap_wc(resource_size_t
+ }
+ EXPORT_SYMBOL(ioremap_wc);
+ 
++void __iomem *ioremap_cache_ns(resource_size_t res_cookie, size_t size)
++{
++	return arch_ioremap_caller(res_cookie, size, MT_MEMORY_RW_NS,
++				   __builtin_return_address(0));
++}
++EXPORT_SYMBOL(ioremap_cache_ns);
++
+ /*
+  * Remap an arbitrary physical address space into the kernel virtual
+  * address space as memory. Needed when the kernel wants to execute
+--- a/arch/arm/mm/mmu.c
++++ b/arch/arm/mm/mmu.c
+@@ -313,6 +313,13 @@ static struct mem_type mem_types[] = {
+ 		.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
+ 		.domain    = DOMAIN_KERNEL,
+ 	},
++	[MT_MEMORY_RW_NS] = {
++		.prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
++			     L_PTE_XN,
++		.prot_l1   = PMD_TYPE_TABLE,
++		.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_XN,
++		.domain    = DOMAIN_KERNEL,
++	},
+ 	[MT_ROM] = {
+ 		.prot_sect = PMD_TYPE_SECT,
+ 		.domain    = DOMAIN_KERNEL,
+@@ -644,6 +651,7 @@ static void __init build_mem_type_table(
+ 	}
+ 	kern_pgprot |= PTE_EXT_AF;
+ 	vecs_pgprot |= PTE_EXT_AF;
++	mem_types[MT_MEMORY_RW_NS].prot_pte |= PTE_EXT_AF | cp->pte;
+ 
+ 	/*
+ 	 * Set PXN for user mappings
+@@ -672,6 +680,7 @@ static void __init build_mem_type_table(
+ 	mem_types[MT_MEMORY_RWX].prot_pte |= kern_pgprot;
+ 	mem_types[MT_MEMORY_RW].prot_sect |= ecc_mask | cp->pmd;
+ 	mem_types[MT_MEMORY_RW].prot_pte |= kern_pgprot;
++	mem_types[MT_MEMORY_RW_NS].prot_sect |= ecc_mask | cp->pmd;
+ 	mem_types[MT_MEMORY_DMA_READY].prot_pte |= kern_pgprot;
+ 	mem_types[MT_MEMORY_RWX_NONCACHED].prot_sect |= ecc_mask;
+ 	mem_types[MT_ROM].prot_sect |= cp->pmd;