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| author | Yangbo Lu <yangbo.lu@nxp.com> | 2017-09-22 15:57:12 +0800 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2017-10-07 23:13:22 +0200 |
| commit | 19951bbf57da87093f7bde25bad41571fbdaf4d9 (patch) | |
| tree | 459e3c2b49cfa9bf34e124b2e45e14849a29fc21 /target/linux/layerscape/patches-4.4/3035-arm64-pgtable-add-support-to-map-cacheable-and-non-s.patch | |
| parent | e3f47958dd16137ea903ca3733435862d9f602ae (diff) | |
| download | mtk-20170518-19951bbf57da87093f7bde25bad41571fbdaf4d9.zip mtk-20170518-19951bbf57da87093f7bde25bad41571fbdaf4d9.tar.gz mtk-20170518-19951bbf57da87093f7bde25bad41571fbdaf4d9.tar.bz2 | |
layerscape: drop linux 4.4 support
This patch is to drop linux 4.4 for layerscape.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-4.4/3035-arm64-pgtable-add-support-to-map-cacheable-and-non-s.patch')
| -rw-r--r-- | target/linux/layerscape/patches-4.4/3035-arm64-pgtable-add-support-to-map-cacheable-and-non-s.patch | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/target/linux/layerscape/patches-4.4/3035-arm64-pgtable-add-support-to-map-cacheable-and-non-s.patch b/target/linux/layerscape/patches-4.4/3035-arm64-pgtable-add-support-to-map-cacheable-and-non-s.patch deleted file mode 100644 index 841d5ef..0000000 --- a/target/linux/layerscape/patches-4.4/3035-arm64-pgtable-add-support-to-map-cacheable-and-non-s.patch +++ /dev/null @@ -1,22 +0,0 @@ -From 1d6d5b6d2363cf5a0d175f086209fb208692ec00 Mon Sep 17 00:00:00 2001 -From: Haiying Wang <Haiying.wang@freescale.com> -Date: Sat, 8 Aug 2015 07:25:02 -0400 -Subject: [PATCH 35/70] arm64/pgtable: add support to map cacheable and non - shareable memory - -Signed-off-by: Haiying Wang <Haiying.wang@freescale.com> ---- - arch/arm64/include/asm/pgtable.h | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/include/asm/pgtable.h -+++ b/arch/arm64/include/asm/pgtable.h -@@ -392,6 +392,8 @@ static inline int has_transparent_hugepa - #define pgprot_cached(prot) \ - __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL) | \ - PTE_PXN | PTE_UXN) -+#define pgprot_cached_ns(prot) \ -+ __pgprot(pgprot_val(pgprot_cached(prot)) ^ PTE_SHARED) - #define pgprot_device(prot) \ - __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN) - #define __HAVE_PHYS_MEM_ACCESS_PROT |