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authorFlorian Fainelli <florian@openwrt.org>2013-03-16 22:25:47 +0000
committerFlorian Fainelli <florian@openwrt.org>2013-03-16 22:25:47 +0000
commita9ef927cce2c1d053b84d07717dc9c10ac64c2a9 (patch)
treef47a334d00e849269e48a7c96408d64c1c0f0417 /target/linux/mcs814x/files-3.3/arch
parent18908139f3811f4d7012fbc87aef951eb993775c (diff)
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mcs814x: implement MULTI_IRQ_HANDLER
Allows us to get rid of the IRQ entry point assembly Signed-off-by: Florian Fainelli <florian@openwrt.org> SVN-Revision: 36060
Diffstat (limited to 'target/linux/mcs814x/files-3.3/arch')
-rw-r--r--target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/board-mcs8140-dt.c1
-rw-r--r--target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/entry-macro.S23
-rw-r--r--target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c22
3 files changed, 22 insertions, 24 deletions
diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/board-mcs8140-dt.c b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/board-mcs8140-dt.c
index 5d13283..9f6625c 100644
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/board-mcs8140-dt.c
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/board-mcs8140-dt.c
@@ -40,5 +40,6 @@ DT_MACHINE_START(mcs8140_dt, "Moschip MCS8140 board")
.init_machine = mcs814x_dt_device_init,
.restart = mcs814x_restart,
.dt_compat = mcs8140_dt_board_compat,
+ .handle_irq = mcs814x_handle_irq,
MACHINE_END
diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/entry-macro.S b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/entry-macro.S
index eaca592..16d2d6d 100644
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/entry-macro.S
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/entry-macro.S
@@ -4,26 +4,3 @@
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =mcs814x_intc_base @ base virtual address of AIC peripheral
- ldr \base, [\base]
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- mov \tmp, #MCS814X_IRQ_STS0 @ load tmp with STS0 register offset
- ldr \irqstat, [\base, \tmp] @ load value at base + tmp
- tst \irqstat, \irqstat @ test if no active IRQ's
- beq 1002f @ if no active irqs return with status 0
- mov \irqnr, #0 @ start from irq zero
- mov \tmp, #1 @ the mask initially 1
-1001:
- tst \irqstat, \tmp @ and with mask
- addeq \irqnr, \irqnr, #1 @ if zero then add one to nr
- moveq \tmp, \tmp, lsl #1 @ shift mask one to left
- beq 1001b @ if zero then loop again
- mov \irqstat, \tmp @ save the return mask
- mov \tmp, #MCS814X_IRQ_STS0 @ load tmp with ICR offset
- str \irqstat, [\base, \tmp] @ clear irq with selected mask
-1002:
- .endm
diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c
index c1e4892..b49e511 100644
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c
@@ -16,7 +16,7 @@
#include <asm/mach/irq.h>
#include <mach/mcs814x.h>
-void __iomem *mcs814x_intc_base;
+static void __iomem *mcs814x_intc_base;
static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
unsigned int num)
@@ -43,6 +43,26 @@ static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
writel_relaxed(0xffffffff, base + MCS814X_IRQ_ICR);
}
+asmlinkage void __exception_irq_entry mcs814x_handle_irq(struct pt_regs *regs)
+{
+ u32 status, irq;
+
+ do {
+ /* read the status register */
+ status = __raw_readl(mcs814x_intc_base + MCS814X_IRQ_STS0);
+ if (!status)
+ break;
+
+ irq = ffs(status) - 1;
+ status |= (1 << irq);
+ /* clear the interrupt */
+ __raw_writel(status, mcs814x_intc_base + MCS814X_IRQ_STS0);
+ /* call the generic handler */
+ handle_IRQ(irq, regs);
+
+ } while (1);
+}
+
static const struct of_device_id mcs814x_intc_ids[] = {
{ .compatible = "moschip,mcs814x-intc" },
{ /* sentinel */ },