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| author | John Crispin <john@openwrt.org> | 2016-04-26 11:43:38 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2016-04-26 11:43:38 +0000 |
| commit | 301d48b8f03c7460efac50007154ab2426db188a (patch) | |
| tree | 3b0e00138bd3020f682470e90bcf357cd2529a2f /target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch | |
| parent | 0a4f2b5920a8c4fa5afc021bc95a6aa781984013 (diff) | |
| download | mtk-20170518-301d48b8f03c7460efac50007154ab2426db188a.zip mtk-20170518-301d48b8f03c7460efac50007154ab2426db188a.tar.gz mtk-20170518-301d48b8f03c7460efac50007154ab2426db188a.tar.bz2 | |
mediatek: update patches
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 49243
Diffstat (limited to 'target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch')
| -rw-r--r-- | target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch b/target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch index 81f5048..057eb44 100644 --- a/target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch +++ b/target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch @@ -1,7 +1,7 @@ From 2fcbc15da2f13164e0851b9c7fae290249f0b44d Mon Sep 17 00:00:00 2001 From: Shunli Wang <shunli.wang@mediatek.com> Date: Tue, 5 Jan 2016 14:30:19 +0800 -Subject: [PATCH 08/81] clk: mediatek: Add dt-bindings for MT2701 clocks +Subject: [PATCH 08/91] clk: mediatek: Add dt-bindings for MT2701 clocks Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. @@ -13,6 +13,9 @@ Signed-off-by: James Liao <jamesjj.liao@mediatek.com> 1 file changed, 481 insertions(+) create mode 100644 include/dt-bindings/clock/mt2701-clk.h +diff --git a/include/dt-bindings/clock/mt2701-clk.h b/include/dt-bindings/clock/mt2701-clk.h +new file mode 100644 +index 0000000..50972d1 --- /dev/null +++ b/include/dt-bindings/clock/mt2701-clk.h @@ -0,0 +1,481 @@ @@ -497,3 +500,6 @@ Signed-off-by: James Liao <jamesjj.liao@mediatek.com> +#define CLK_BDP_NR 50 + +#endif /* _DT_BINDINGS_CLK_MT2701_H */ +-- +1.7.10.4 + |