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| author | John Crispin <john@openwrt.org> | 2016-04-26 11:43:38 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2016-04-26 11:43:38 +0000 |
| commit | 301d48b8f03c7460efac50007154ab2426db188a (patch) | |
| tree | 3b0e00138bd3020f682470e90bcf357cd2529a2f /target/linux/mediatek/patches-4.4/0011-reset-mediatek-mt2701-reset-driver.patch | |
| parent | 0a4f2b5920a8c4fa5afc021bc95a6aa781984013 (diff) | |
| download | mtk-20170518-301d48b8f03c7460efac50007154ab2426db188a.zip mtk-20170518-301d48b8f03c7460efac50007154ab2426db188a.tar.gz mtk-20170518-301d48b8f03c7460efac50007154ab2426db188a.tar.bz2 | |
mediatek: update patches
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 49243
Diffstat (limited to 'target/linux/mediatek/patches-4.4/0011-reset-mediatek-mt2701-reset-driver.patch')
| -rw-r--r-- | target/linux/mediatek/patches-4.4/0011-reset-mediatek-mt2701-reset-driver.patch | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/target/linux/mediatek/patches-4.4/0011-reset-mediatek-mt2701-reset-driver.patch b/target/linux/mediatek/patches-4.4/0011-reset-mediatek-mt2701-reset-driver.patch index e27e620..bbb123e 100644 --- a/target/linux/mediatek/patches-4.4/0011-reset-mediatek-mt2701-reset-driver.patch +++ b/target/linux/mediatek/patches-4.4/0011-reset-mediatek-mt2701-reset-driver.patch @@ -1,7 +1,7 @@ From b86d3303db25a8296e4c3de46ee1470f60f71b0c Mon Sep 17 00:00:00 2001 From: Shunli Wang <shunli.wang@mediatek.com> Date: Tue, 5 Jan 2016 14:30:22 +0800 -Subject: [PATCH 11/81] reset: mediatek: mt2701 reset driver +Subject: [PATCH 11/91] reset: mediatek: mt2701 reset driver In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are @@ -14,9 +14,11 @@ Acked-by: Philipp Zabel <p.zabel@pengutronix.de> drivers/clk/mediatek/clk-mt2701.c | 4 ++++ 1 file changed, 4 insertions(+) +diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c +index 2f521f4..39472e4 100644 --- a/drivers/clk/mediatek/clk-mt2701.c +++ b/drivers/clk/mediatek/clk-mt2701.c -@@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(str +@@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(struct device_node *node) if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); @@ -25,7 +27,7 @@ Acked-by: Philipp Zabel <p.zabel@pengutronix.de> } CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init); -@@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(stru +@@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(struct device_node *node) if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); @@ -34,3 +36,6 @@ Acked-by: Philipp Zabel <p.zabel@pengutronix.de> } CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init); +-- +1.7.10.4 + |